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-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h55
1 files changed, 54 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 651f6d8158fa..983da6e4554c 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -180,6 +180,53 @@
180#define DA8XX_LPSC1_CR_P3_SS 26 180#define DA8XX_LPSC1_CR_P3_SS 26
181#define DA8XX_LPSC1_L3_CBA_RAM 31 181#define DA8XX_LPSC1_L3_CBA_RAM 31
182 182
183/* TNETV107X LPSC Assignments */
184#define TNETV107X_LPSC_ARM 0
185#define TNETV107X_LPSC_GEM 1
186#define TNETV107X_LPSC_DDR2_PHY 2
187#define TNETV107X_LPSC_TPCC 3
188#define TNETV107X_LPSC_TPTC0 4
189#define TNETV107X_LPSC_TPTC1 5
190#define TNETV107X_LPSC_RAM 6
191#define TNETV107X_LPSC_MBX_LITE 7
192#define TNETV107X_LPSC_LCD 8
193#define TNETV107X_LPSC_ETHSS 9
194#define TNETV107X_LPSC_AEMIF 10
195#define TNETV107X_LPSC_CHIP_CFG 11
196#define TNETV107X_LPSC_TSC 12
197#define TNETV107X_LPSC_ROM 13
198#define TNETV107X_LPSC_UART2 14
199#define TNETV107X_LPSC_PKTSEC 15
200#define TNETV107X_LPSC_SECCTL 16
201#define TNETV107X_LPSC_KEYMGR 17
202#define TNETV107X_LPSC_KEYPAD 18
203#define TNETV107X_LPSC_GPIO 19
204#define TNETV107X_LPSC_MDIO 20
205#define TNETV107X_LPSC_SDIO0 21
206#define TNETV107X_LPSC_UART0 22
207#define TNETV107X_LPSC_UART1 23
208#define TNETV107X_LPSC_TIMER0 24
209#define TNETV107X_LPSC_TIMER1 25
210#define TNETV107X_LPSC_WDT_ARM 26
211#define TNETV107X_LPSC_WDT_DSP 27
212#define TNETV107X_LPSC_SSP 28
213#define TNETV107X_LPSC_TDM0 29
214#define TNETV107X_LPSC_VLYNQ 30
215#define TNETV107X_LPSC_MCDMA 31
216#define TNETV107X_LPSC_USB0 32
217#define TNETV107X_LPSC_TDM1 33
218#define TNETV107X_LPSC_DEBUGSS 34
219#define TNETV107X_LPSC_ETHSS_RGMII 35
220#define TNETV107X_LPSC_SYSTEM 36
221#define TNETV107X_LPSC_IMCOP 37
222#define TNETV107X_LPSC_SPARE 38
223#define TNETV107X_LPSC_SDIO1 39
224#define TNETV107X_LPSC_USB1 40
225#define TNETV107X_LPSC_USBSS 41
226#define TNETV107X_LPSC_DDR2_EMIF1_VRST 42
227#define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43
228#define TNETV107X_LPSC_MAX 44
229
183/* PSC register offsets */ 230/* PSC register offsets */
184#define EPCPR 0x070 231#define EPCPR 0x070
185#define PTCMD 0x120 232#define PTCMD 0x120
@@ -189,13 +236,19 @@
189#define MDSTAT 0x800 236#define MDSTAT 0x800
190#define MDCTL 0xA00 237#define MDCTL 0xA00
191 238
239/* PSC module states */
240#define PSC_STATE_SWRSTDISABLE 0
241#define PSC_STATE_SYNCRST 1
242#define PSC_STATE_DISABLE 2
243#define PSC_STATE_ENABLE 3
244
192#define MDSTAT_STATE_MASK 0x1f 245#define MDSTAT_STATE_MASK 0x1f
193 246
194#ifndef __ASSEMBLER__ 247#ifndef __ASSEMBLER__
195 248
196extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); 249extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
197extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, 250extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
198 unsigned int id, char enable); 251 unsigned int id, u32 next_state);
199 252
200#endif 253#endif
201 254