diff options
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/nand.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/nand.h | 90 |
1 files changed, 0 insertions, 90 deletions
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h deleted file mode 100644 index 1cf555aef896..000000000000 --- a/arch/arm/mach-davinci/include/mach/nand.h +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | /* | ||
2 | * mach-davinci/nand.h | ||
3 | * | ||
4 | * Copyright © 2006 Texas Instruments. | ||
5 | * | ||
6 | * Ported to 2.6.23 Copyright © 2008 by | ||
7 | * Sander Huijsen <Shuijsen@optelecom-nkf.com> | ||
8 | * Troy Kisky <troy.kisky@boundarydevices.com> | ||
9 | * Dirk Behme <Dirk.Behme@gmail.com> | ||
10 | * | ||
11 | * -------------------------------------------------------------------------- | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | */ | ||
27 | |||
28 | #ifndef __ARCH_ARM_DAVINCI_NAND_H | ||
29 | #define __ARCH_ARM_DAVINCI_NAND_H | ||
30 | |||
31 | #include <linux/mtd/nand.h> | ||
32 | |||
33 | #define NANDFCR_OFFSET 0x60 | ||
34 | #define NANDFSR_OFFSET 0x64 | ||
35 | #define NANDF1ECC_OFFSET 0x70 | ||
36 | |||
37 | /* 4-bit ECC syndrome registers */ | ||
38 | #define NAND_4BIT_ECC_LOAD_OFFSET 0xbc | ||
39 | #define NAND_4BIT_ECC1_OFFSET 0xc0 | ||
40 | #define NAND_4BIT_ECC2_OFFSET 0xc4 | ||
41 | #define NAND_4BIT_ECC3_OFFSET 0xc8 | ||
42 | #define NAND_4BIT_ECC4_OFFSET 0xcc | ||
43 | #define NAND_ERR_ADD1_OFFSET 0xd0 | ||
44 | #define NAND_ERR_ADD2_OFFSET 0xd4 | ||
45 | #define NAND_ERR_ERRVAL1_OFFSET 0xd8 | ||
46 | #define NAND_ERR_ERRVAL2_OFFSET 0xdc | ||
47 | |||
48 | /* NOTE: boards don't need to use these address bits | ||
49 | * for ALE/CLE unless they support booting from NAND. | ||
50 | * They're used unless platform data overrides them. | ||
51 | */ | ||
52 | #define MASK_ALE 0x08 | ||
53 | #define MASK_CLE 0x10 | ||
54 | |||
55 | struct davinci_nand_pdata { /* platform_data */ | ||
56 | uint32_t mask_ale; | ||
57 | uint32_t mask_cle; | ||
58 | |||
59 | /* for packages using two chipselects */ | ||
60 | uint32_t mask_chipsel; | ||
61 | |||
62 | /* board's default static partition info */ | ||
63 | struct mtd_partition *parts; | ||
64 | unsigned nr_parts; | ||
65 | |||
66 | /* none == NAND_ECC_NONE (strongly *not* advised!!) | ||
67 | * soft == NAND_ECC_SOFT | ||
68 | * else == NAND_ECC_HW, according to ecc_bits | ||
69 | * | ||
70 | * All DaVinci-family chips support 1-bit hardware ECC. | ||
71 | * Newer ones also support 4-bit ECC, but are awkward | ||
72 | * using it with large page chips. | ||
73 | */ | ||
74 | nand_ecc_modes_t ecc_mode; | ||
75 | u8 ecc_bits; | ||
76 | |||
77 | /* e.g. NAND_BUSWIDTH_16 */ | ||
78 | unsigned options; | ||
79 | /* e.g. NAND_BBT_USE_FLASH */ | ||
80 | unsigned bbt_options; | ||
81 | |||
82 | /* Main and mirror bbt descriptor overrides */ | ||
83 | struct nand_bbt_descr *bbt_td; | ||
84 | struct nand_bbt_descr *bbt_md; | ||
85 | |||
86 | /* Access timings */ | ||
87 | struct davinci_aemif_timing *timing; | ||
88 | }; | ||
89 | |||
90 | #endif /* __ARCH_ARM_DAVINCI_NAND_H */ | ||