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Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 90704910d343..cc9be7fee627 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -13,15 +13,17 @@
13 13
14#include <video/da8xx-fb.h> 14#include <video/da8xx-fb.h>
15 15
16#include <linux/davinci_emac.h>
16#include <mach/serial.h> 17#include <mach/serial.h>
17#include <mach/edma.h> 18#include <mach/edma.h>
18#include <mach/i2c.h> 19#include <mach/i2c.h>
19#include <mach/emac.h>
20#include <mach/asp.h> 20#include <mach/asp.h>
21#include <mach/mmc.h> 21#include <mach/mmc.h>
22#include <mach/usb.h> 22#include <mach/usb.h>
23#include <mach/pm.h>
23 24
24extern void __iomem *da8xx_syscfg_base; 25extern void __iomem *da8xx_syscfg0_base;
26extern void __iomem *da8xx_syscfg1_base;
25 27
26/* 28/*
27 * The cp_intc interrupt controller for the da8xx isn't in the same 29 * The cp_intc interrupt controller for the da8xx isn't in the same
@@ -34,13 +36,17 @@ extern void __iomem *da8xx_syscfg_base;
34#define DA8XX_CP_INTC_SIZE SZ_8K 36#define DA8XX_CP_INTC_SIZE SZ_8K
35#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) 37#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
36 38
37#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) 39#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
38#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) 40#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
39#define DA8XX_JTAG_ID_REG 0x18 41#define DA8XX_JTAG_ID_REG 0x18
40#define DA8XX_CFGCHIP0_REG 0x17c 42#define DA8XX_CFGCHIP0_REG 0x17c
41#define DA8XX_CFGCHIP2_REG 0x184 43#define DA8XX_CFGCHIP2_REG 0x184
42#define DA8XX_CFGCHIP3_REG 0x188 44#define DA8XX_CFGCHIP3_REG 0x188
43 45
46#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
47#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
48#define DA8XX_DEEPSLEEP_REG 0x8
49
44#define DA8XX_PSC0_BASE 0x01c10000 50#define DA8XX_PSC0_BASE 0x01c10000
45#define DA8XX_PLL0_BASE 0x01c11000 51#define DA8XX_PLL0_BASE 0x01c11000
46#define DA8XX_TIMER64P0_BASE 0x01c20000 52#define DA8XX_TIMER64P0_BASE 0x01c20000
@@ -48,11 +54,13 @@ extern void __iomem *da8xx_syscfg_base;
48#define DA8XX_GPIO_BASE 0x01e26000 54#define DA8XX_GPIO_BASE 0x01e26000
49#define DA8XX_PSC1_BASE 0x01e27000 55#define DA8XX_PSC1_BASE 0x01e27000
50#define DA8XX_LCD_CNTRL_BASE 0x01e13000 56#define DA8XX_LCD_CNTRL_BASE 0x01e13000
57#define DA8XX_PLL1_BASE 0x01e1a000
51#define DA8XX_MMCSD0_BASE 0x01c40000 58#define DA8XX_MMCSD0_BASE 0x01c40000
52#define DA8XX_AEMIF_CS2_BASE 0x60000000 59#define DA8XX_AEMIF_CS2_BASE 0x60000000
53#define DA8XX_AEMIF_CS3_BASE 0x62000000 60#define DA8XX_AEMIF_CS3_BASE 0x62000000
54#define DA8XX_AEMIF_CTL_BASE 0x68000000 61#define DA8XX_AEMIF_CTL_BASE 0x68000000
55#define DA8XX_DDR2_CTL_BASE 0xb0000000 62#define DA8XX_DDR2_CTL_BASE 0xb0000000
63#define DA8XX_ARM_RAM_BASE 0xffff0000
56 64
57#define PINMUX0 0x00 65#define PINMUX0 0x00
58#define PINMUX1 0x04 66#define PINMUX1 0x04
@@ -90,6 +98,8 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
90int da8xx_register_rtc(void); 98int da8xx_register_rtc(void);
91int da850_register_cpufreq(void); 99int da850_register_cpufreq(void);
92int da8xx_register_cpuidle(void); 100int da8xx_register_cpuidle(void);
101void __iomem * __init da8xx_get_mem_ctlr(void);
102int da850_register_pm(struct platform_device *pdev);
93 103
94extern struct platform_device da8xx_serial_device; 104extern struct platform_device da8xx_serial_device;
95extern struct emac_platform_data da8xx_emac_pdata; 105extern struct emac_platform_data da8xx_emac_pdata;