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-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index cdf1f4442330..f3c97ac3425c 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -15,6 +15,9 @@
15#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 15#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
16#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 16#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
17 17
18/* Bases of da830 McASP1 register banks */
19#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
20
18/* EDMA channels of dm644x and dm355 */ 21/* EDMA channels of dm644x and dm355 */
19#define DAVINCI_DMA_ASP0_TX 2 22#define DAVINCI_DMA_ASP0_TX 2
20#define DAVINCI_DMA_ASP0_RX 3 23#define DAVINCI_DMA_ASP0_RX 3
@@ -26,6 +29,10 @@
26#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 29#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
27#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 30#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
28 31
32/* EDMA channels of da830 McASP1 */
33#define DAVINCI_DA830_DMA_MCASP1_AREVT 2
34#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
35
29/* Interrupts */ 36/* Interrupts */
30#define DAVINCI_ASP0_RX_INT IRQ_MBRINT 37#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
31#define DAVINCI_ASP0_TX_INT IRQ_MBXINT 38#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
@@ -43,6 +50,14 @@ struct snd_platform_data {
43 u8 op_mode; 50 u8 op_mode;
44 u8 num_serializer; 51 u8 num_serializer;
45 u8 *serial_dir; 52 u8 *serial_dir;
53 u8 version;
54 u8 txnumevt;
55 u8 rxnumevt;
56};
57
58enum {
59 MCASP_VERSION_1 = 0, /* DM646x */
60 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
46}; 61};
47 62
48#define INACTIVE_MODE 0 63#define INACTIVE_MODE 0