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-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h35
1 files changed, 33 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index e0abc437d796..038ecb7c231b 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -5,21 +5,52 @@
5#define __ASM_ARCH_DAVINCI_ASP_H 5#define __ASM_ARCH_DAVINCI_ASP_H
6 6
7#include <mach/irqs.h> 7#include <mach/irqs.h>
8#include <mach/edma.h>
8 9
9/* Bases of register banks */ 10/* Bases of dm644x and dm355 register banks */
10#define DAVINCI_ASP0_BASE 0x01E02000 11#define DAVINCI_ASP0_BASE 0x01E02000
11#define DAVINCI_ASP1_BASE 0x01E04000 12#define DAVINCI_ASP1_BASE 0x01E04000
12 13
13/* EDMA channels */ 14/* Bases of dm646x register banks */
15#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
16#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
17
18/* EDMA channels of dm644x and dm355 */
14#define DAVINCI_DMA_ASP0_TX 2 19#define DAVINCI_DMA_ASP0_TX 2
15#define DAVINCI_DMA_ASP0_RX 3 20#define DAVINCI_DMA_ASP0_RX 3
16#define DAVINCI_DMA_ASP1_TX 8 21#define DAVINCI_DMA_ASP1_TX 8
17#define DAVINCI_DMA_ASP1_RX 9 22#define DAVINCI_DMA_ASP1_RX 9
18 23
24/* EDMA channels of dm646x */
25#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6
26#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
27#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
28
19/* Interrupts */ 29/* Interrupts */
20#define DAVINCI_ASP0_RX_INT IRQ_MBRINT 30#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
21#define DAVINCI_ASP0_TX_INT IRQ_MBXINT 31#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
22#define DAVINCI_ASP1_RX_INT IRQ_MBRINT 32#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
23#define DAVINCI_ASP1_TX_INT IRQ_MBXINT 33#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
24 34
35struct snd_platform_data {
36 char *clk_name;
37 u32 tx_dma_offset;
38 u32 rx_dma_offset;
39 enum dma_event_q eventq_no; /* event queue number */
40 unsigned int codec_fmt;
41
42 /* McASP specific fields */
43 int tdm_slots;
44 u8 op_mode;
45 u8 num_serializer;
46 u8 *serial_dir;
47};
48
49#define INACTIVE_MODE 0
50#define TX_MODE 1
51#define RX_MODE 2
52
53#define DAVINCI_MCASP_IIS_MODE 0
54#define DAVINCI_MCASP_DIT_MODE 1
55
25#endif /* __ASM_ARCH_DAVINCI_ASP_H */ 56#endif /* __ASM_ARCH_DAVINCI_ASP_H */