diff options
Diffstat (limited to 'arch/arm/mach-davinci/gpio.c')
-rw-r--r-- | arch/arm/mach-davinci/gpio.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index bf0ff587e46a..20d66e5e4663 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c | |||
@@ -205,20 +205,20 @@ pure_initcall(davinci_gpio_setup); | |||
205 | * serve as EDMA event triggers. | 205 | * serve as EDMA event triggers. |
206 | */ | 206 | */ |
207 | 207 | ||
208 | static void gpio_irq_disable(unsigned irq) | 208 | static void gpio_irq_disable(struct irq_data *d) |
209 | { | 209 | { |
210 | struct davinci_gpio_regs __iomem *g = irq2regs(irq); | 210 | struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); |
211 | u32 mask = (u32) get_irq_data(irq); | 211 | u32 mask = (u32) irq_data_get_irq_data(d); |
212 | 212 | ||
213 | __raw_writel(mask, &g->clr_falling); | 213 | __raw_writel(mask, &g->clr_falling); |
214 | __raw_writel(mask, &g->clr_rising); | 214 | __raw_writel(mask, &g->clr_rising); |
215 | } | 215 | } |
216 | 216 | ||
217 | static void gpio_irq_enable(unsigned irq) | 217 | static void gpio_irq_enable(struct irq_data *d) |
218 | { | 218 | { |
219 | struct davinci_gpio_regs __iomem *g = irq2regs(irq); | 219 | struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); |
220 | u32 mask = (u32) get_irq_data(irq); | 220 | u32 mask = (u32) irq_data_get_irq_data(d); |
221 | unsigned status = irq_desc[irq].status; | 221 | unsigned status = irq_desc[d->irq].status; |
222 | 222 | ||
223 | status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; | 223 | status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; |
224 | if (!status) | 224 | if (!status) |
@@ -230,19 +230,19 @@ static void gpio_irq_enable(unsigned irq) | |||
230 | __raw_writel(mask, &g->set_rising); | 230 | __raw_writel(mask, &g->set_rising); |
231 | } | 231 | } |
232 | 232 | ||
233 | static int gpio_irq_type(unsigned irq, unsigned trigger) | 233 | static int gpio_irq_type(struct irq_data *d, unsigned trigger) |
234 | { | 234 | { |
235 | struct davinci_gpio_regs __iomem *g = irq2regs(irq); | 235 | struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); |
236 | u32 mask = (u32) get_irq_data(irq); | 236 | u32 mask = (u32) irq_data_get_irq_data(d); |
237 | 237 | ||
238 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 238 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
239 | return -EINVAL; | 239 | return -EINVAL; |
240 | 240 | ||
241 | irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; | 241 | irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK; |
242 | irq_desc[irq].status |= trigger; | 242 | irq_desc[d->irq].status |= trigger; |
243 | 243 | ||
244 | /* don't enable the IRQ if it's currently disabled */ | 244 | /* don't enable the IRQ if it's currently disabled */ |
245 | if (irq_desc[irq].depth == 0) { | 245 | if (irq_desc[d->irq].depth == 0) { |
246 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) | 246 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) |
247 | ? &g->set_falling : &g->clr_falling); | 247 | ? &g->set_falling : &g->clr_falling); |
248 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) | 248 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) |
@@ -253,9 +253,9 @@ static int gpio_irq_type(unsigned irq, unsigned trigger) | |||
253 | 253 | ||
254 | static struct irq_chip gpio_irqchip = { | 254 | static struct irq_chip gpio_irqchip = { |
255 | .name = "GPIO", | 255 | .name = "GPIO", |
256 | .enable = gpio_irq_enable, | 256 | .irq_enable = gpio_irq_enable, |
257 | .disable = gpio_irq_disable, | 257 | .irq_disable = gpio_irq_disable, |
258 | .set_type = gpio_irq_type, | 258 | .irq_set_type = gpio_irq_type, |
259 | }; | 259 | }; |
260 | 260 | ||
261 | static void | 261 | static void |
@@ -269,8 +269,8 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
269 | mask <<= 16; | 269 | mask <<= 16; |
270 | 270 | ||
271 | /* temporarily mask (level sensitive) parent IRQ */ | 271 | /* temporarily mask (level sensitive) parent IRQ */ |
272 | desc->chip->mask(irq); | 272 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
273 | desc->chip->ack(irq); | 273 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
274 | while (1) { | 274 | while (1) { |
275 | u32 status; | 275 | u32 status; |
276 | int n; | 276 | int n; |
@@ -293,7 +293,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
293 | status >>= res; | 293 | status >>= res; |
294 | } | 294 | } |
295 | } | 295 | } |
296 | desc->chip->unmask(irq); | 296 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
297 | /* now it may re-trigger */ | 297 | /* now it may re-trigger */ |
298 | } | 298 | } |
299 | 299 | ||
@@ -320,10 +320,10 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) | |||
320 | return -ENODEV; | 320 | return -ENODEV; |
321 | } | 321 | } |
322 | 322 | ||
323 | static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) | 323 | static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) |
324 | { | 324 | { |
325 | struct davinci_gpio_regs __iomem *g = irq2regs(irq); | 325 | struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); |
326 | u32 mask = (u32) get_irq_data(irq); | 326 | u32 mask = (u32) irq_data_get_irq_data(d); |
327 | 327 | ||
328 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 328 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
329 | return -EINVAL; | 329 | return -EINVAL; |
@@ -397,7 +397,7 @@ static int __init davinci_gpio_irq_setup(void) | |||
397 | irq = bank_irq; | 397 | irq = bank_irq; |
398 | gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); | 398 | gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); |
399 | gpio_irqchip_unbanked.name = "GPIO-AINTC"; | 399 | gpio_irqchip_unbanked.name = "GPIO-AINTC"; |
400 | gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked; | 400 | gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; |
401 | 401 | ||
402 | /* default trigger: both edges */ | 402 | /* default trigger: both edges */ |
403 | g = gpio2regs(0); | 403 | g = gpio2regs(0); |