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-rw-r--r--arch/arm/mach-davinci/dm646x.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 829a44bcf799..893baf4ad37d 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -42,7 +42,6 @@
42/* 42/*
43 * Device specific clocks 43 * Device specific clocks
44 */ 44 */
45#define DM646X_REF_FREQ 27000000
46#define DM646X_AUX_FREQ 24000000 45#define DM646X_AUX_FREQ 24000000
47 46
48static struct pll_data pll1_data = { 47static struct pll_data pll1_data = {
@@ -57,7 +56,6 @@ static struct pll_data pll2_data = {
57 56
58static struct clk ref_clk = { 57static struct clk ref_clk = {
59 .name = "ref_clk", 58 .name = "ref_clk",
60 .rate = DM646X_REF_FREQ,
61}; 59};
62 60
63static struct clk aux_clkin = { 61static struct clk aux_clkin = {
@@ -313,7 +311,7 @@ static struct clk vpif1_clk = {
313 .flags = ALWAYS_ENABLED, 311 .flags = ALWAYS_ENABLED,
314}; 312};
315 313
316struct davinci_clk dm646x_clks[] = { 314struct clk_lookup dm646x_clks[] = {
317 CLK(NULL, "ref", &ref_clk), 315 CLK(NULL, "ref", &ref_clk),
318 CLK(NULL, "aux", &aux_clkin), 316 CLK(NULL, "aux", &aux_clkin),
319 CLK(NULL, "pll1", &pll1_clk), 317 CLK(NULL, "pll1", &pll1_clk),
@@ -513,14 +511,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
513 511
514/*----------------------------------------------------------------------*/ 512/*----------------------------------------------------------------------*/
515 513
516static const s8 dma_chan_dm646x_no_event[] = {
517 0, 1, 2, 3, 13,
518 14, 15, 24, 25, 26,
519 27, 30, 31, 54, 55,
520 56,
521 -1
522};
523
524/* Four Transfer Controllers on DM646x */ 514/* Four Transfer Controllers on DM646x */
525static const s8 515static const s8
526dm646x_queue_tc_mapping[][2] = { 516dm646x_queue_tc_mapping[][2] = {
@@ -549,7 +539,6 @@ static struct edma_soc_info dm646x_edma_info[] = {
549 .n_slot = 512, 539 .n_slot = 512,
550 .n_tc = 4, 540 .n_tc = 4,
551 .n_cc = 1, 541 .n_cc = 1,
552 .noevent = dma_chan_dm646x_no_event,
553 .queue_tc_mapping = dm646x_queue_tc_mapping, 542 .queue_tc_mapping = dm646x_queue_tc_mapping,
554 .queue_priority_mapping = dm646x_queue_priority_mapping, 543 .queue_priority_mapping = dm646x_queue_priority_mapping,
555 }, 544 },
@@ -925,6 +914,7 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config,
925 914
926void __init dm646x_init(void) 915void __init dm646x_init(void)
927{ 916{
917 dm646x_board_setup_refclk(&ref_clk);
928 davinci_common_init(&davinci_soc_info_dm646x); 918 davinci_common_init(&davinci_soc_info_dm646x);
929} 919}
930 920