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-rw-r--r--arch/arm/mach-davinci/devices.c45
1 files changed, 31 insertions, 14 deletions
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 385e8332fc2f..a55b650db71e 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -31,6 +31,8 @@
31#define DAVINCI_MMCSD0_BASE 0x01E10000 31#define DAVINCI_MMCSD0_BASE 0x01E10000
32#define DM355_MMCSD0_BASE 0x01E11000 32#define DM355_MMCSD0_BASE 0x01E11000
33#define DM355_MMCSD1_BASE 0x01E00000 33#define DM355_MMCSD1_BASE 0x01E00000
34#define DM365_MMCSD0_BASE 0x01D11000
35#define DM365_MMCSD1_BASE 0x01D00000
34 36
35static struct resource i2c_resources[] = { 37static struct resource i2c_resources[] = {
36 { 38 {
@@ -154,19 +156,31 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
154 */ 156 */
155 switch (module) { 157 switch (module) {
156 case 1: 158 case 1:
157 if (!cpu_is_davinci_dm355()) 159 if (cpu_is_davinci_dm355()) {
160 /* REVISIT we may not need all these pins if e.g. this
161 * is a hard-wired SDIO device...
162 */
163 davinci_cfg_reg(DM355_SD1_CMD);
164 davinci_cfg_reg(DM355_SD1_CLK);
165 davinci_cfg_reg(DM355_SD1_DATA0);
166 davinci_cfg_reg(DM355_SD1_DATA1);
167 davinci_cfg_reg(DM355_SD1_DATA2);
168 davinci_cfg_reg(DM355_SD1_DATA3);
169 } else if (cpu_is_davinci_dm365()) {
170 void __iomem *pupdctl1 =
171 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
172
173 /* Configure pull down control */
174 __raw_writel((__raw_readl(pupdctl1) & ~0x400),
175 pupdctl1);
176
177 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
178 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
179 SZ_4K - 1;
180 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1;
181 } else
158 break; 182 break;
159 183
160 /* REVISIT we may not need all these pins if e.g. this
161 * is a hard-wired SDIO device...
162 */
163 davinci_cfg_reg(DM355_SD1_CMD);
164 davinci_cfg_reg(DM355_SD1_CLK);
165 davinci_cfg_reg(DM355_SD1_DATA0);
166 davinci_cfg_reg(DM355_SD1_DATA1);
167 davinci_cfg_reg(DM355_SD1_DATA2);
168 davinci_cfg_reg(DM355_SD1_DATA3);
169
170 pdev = &davinci_mmcsd1_device; 184 pdev = &davinci_mmcsd1_device;
171 break; 185 break;
172 case 0: 186 case 0:
@@ -180,9 +194,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
180 194
181 /* enable RX EDMA */ 195 /* enable RX EDMA */
182 davinci_cfg_reg(DM355_EVT26_MMC0_RX); 196 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
183 } 197 } else if (cpu_is_davinci_dm365()) {
184 198 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
185 else if (cpu_is_davinci_dm644x()) { 199 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
200 SZ_4K - 1;
201 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
202 } else if (cpu_is_davinci_dm644x()) {
186 /* REVISIT: should this be in board-init code? */ 203 /* REVISIT: should this be in board-init code? */
187 void __iomem *base = 204 void __iomem *base =
188 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); 205 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);