diff options
Diffstat (limited to 'arch/arm/mach-davinci/devices.c')
-rw-r--r-- | arch/arm/mach-davinci/devices.c | 50 |
1 files changed, 48 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 147949650c25..8b7201e4c79c 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -23,7 +23,10 @@ | |||
23 | #include <mach/mmc.h> | 23 | #include <mach/mmc.h> |
24 | #include <mach/time.h> | 24 | #include <mach/time.h> |
25 | 25 | ||
26 | #include "clock.h" | ||
27 | |||
26 | #define DAVINCI_I2C_BASE 0x01C21000 | 28 | #define DAVINCI_I2C_BASE 0x01C21000 |
29 | #define DAVINCI_ATA_BASE 0x01C66000 | ||
27 | #define DAVINCI_MMCSD0_BASE 0x01E10000 | 30 | #define DAVINCI_MMCSD0_BASE 0x01E10000 |
28 | #define DM355_MMCSD0_BASE 0x01E11000 | 31 | #define DM355_MMCSD0_BASE 0x01E11000 |
29 | #define DM355_MMCSD1_BASE 0x01E00000 | 32 | #define DM355_MMCSD1_BASE 0x01E00000 |
@@ -58,6 +61,49 @@ void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) | |||
58 | (void) platform_device_register(&davinci_i2c_device); | 61 | (void) platform_device_register(&davinci_i2c_device); |
59 | } | 62 | } |
60 | 63 | ||
64 | static struct resource ide_resources[] = { | ||
65 | { | ||
66 | .start = DAVINCI_ATA_BASE, | ||
67 | .end = DAVINCI_ATA_BASE + 0x7ff, | ||
68 | .flags = IORESOURCE_MEM, | ||
69 | }, | ||
70 | { | ||
71 | .start = IRQ_IDE, | ||
72 | .end = IRQ_IDE, | ||
73 | .flags = IORESOURCE_IRQ, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | static u64 ide_dma_mask = DMA_BIT_MASK(32); | ||
78 | |||
79 | static struct platform_device ide_device = { | ||
80 | .name = "palm_bk3710", | ||
81 | .id = -1, | ||
82 | .resource = ide_resources, | ||
83 | .num_resources = ARRAY_SIZE(ide_resources), | ||
84 | .dev = { | ||
85 | .dma_mask = &ide_dma_mask, | ||
86 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
87 | }, | ||
88 | }; | ||
89 | |||
90 | void __init davinci_init_ide(void) | ||
91 | { | ||
92 | if (cpu_is_davinci_dm644x()) { | ||
93 | davinci_cfg_reg(DM644X_HPIEN_DISABLE); | ||
94 | davinci_cfg_reg(DM644X_ATAEN); | ||
95 | davinci_cfg_reg(DM644X_HDIREN); | ||
96 | } else if (cpu_is_davinci_dm646x()) { | ||
97 | /* IRQ_DM646X_IDE is the same as IRQ_IDE */ | ||
98 | davinci_cfg_reg(DM646X_ATAEN); | ||
99 | } else { | ||
100 | WARN_ON(1); | ||
101 | return; | ||
102 | } | ||
103 | |||
104 | platform_device_register(&ide_device); | ||
105 | } | ||
106 | |||
61 | #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) | 107 | #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) |
62 | 108 | ||
63 | static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); | 109 | static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); |
@@ -251,12 +297,12 @@ static void davinci_init_wdt(void) | |||
251 | 297 | ||
252 | struct davinci_timer_instance davinci_timer_instance[2] = { | 298 | struct davinci_timer_instance davinci_timer_instance[2] = { |
253 | { | 299 | { |
254 | .base = IO_ADDRESS(DAVINCI_TIMER0_BASE), | 300 | .base = DAVINCI_TIMER0_BASE, |
255 | .bottom_irq = IRQ_TINT0_TINT12, | 301 | .bottom_irq = IRQ_TINT0_TINT12, |
256 | .top_irq = IRQ_TINT0_TINT34, | 302 | .top_irq = IRQ_TINT0_TINT34, |
257 | }, | 303 | }, |
258 | { | 304 | { |
259 | .base = IO_ADDRESS(DAVINCI_TIMER1_BASE), | 305 | .base = DAVINCI_TIMER1_BASE, |
260 | .bottom_irq = IRQ_TINT1_TINT12, | 306 | .bottom_irq = IRQ_TINT1_TINT12, |
261 | .top_irq = IRQ_TINT1_TINT34, | 307 | .top_irq = IRQ_TINT1_TINT34, |
262 | }, | 308 | }, |