diff options
Diffstat (limited to 'arch/arm/mach-davinci/devices-da8xx.c')
| -rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 70 |
1 files changed, 66 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 52bc7b1c6ca3..9eec63070e0c 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include "clock.h" | 24 | #include "clock.h" |
| 25 | 25 | ||
| 26 | #define DA8XX_TPCC_BASE 0x01c00000 | 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
| 27 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
| 27 | #define DA850_TPCC1_BASE 0x01e30000 | 28 | #define DA850_TPCC1_BASE 0x01e30000 |
| 28 | #define DA8XX_TPTC0_BASE 0x01c08000 | 29 | #define DA8XX_TPTC0_BASE 0x01c08000 |
| 29 | #define DA8XX_TPTC1_BASE 0x01c08400 | 30 | #define DA8XX_TPTC1_BASE 0x01c08400 |
| @@ -41,7 +42,6 @@ | |||
| 41 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 42 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
| 42 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 43 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
| 43 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 | 44 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 |
| 44 | #define DA8XX_MDIO_REG_OFFSET 0x4000 | ||
| 45 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K | 45 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K |
| 46 | 46 | ||
| 47 | void __iomem *da8xx_syscfg0_base; | 47 | void __iomem *da8xx_syscfg0_base; |
| @@ -351,7 +351,7 @@ int __init da8xx_register_watchdog(void) | |||
| 351 | static struct resource da8xx_emac_resources[] = { | 351 | static struct resource da8xx_emac_resources[] = { |
| 352 | { | 352 | { |
| 353 | .start = DA8XX_EMAC_CPPI_PORT_BASE, | 353 | .start = DA8XX_EMAC_CPPI_PORT_BASE, |
| 354 | .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, | 354 | .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1, |
| 355 | .flags = IORESOURCE_MEM, | 355 | .flags = IORESOURCE_MEM, |
| 356 | }, | 356 | }, |
| 357 | { | 357 | { |
| @@ -380,7 +380,6 @@ struct emac_platform_data da8xx_emac_pdata = { | |||
| 380 | .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, | 380 | .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, |
| 381 | .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, | 381 | .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, |
| 382 | .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, | 382 | .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, |
| 383 | .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET, | ||
| 384 | .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, | 383 | .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, |
| 385 | .version = EMAC_VERSION_2, | 384 | .version = EMAC_VERSION_2, |
| 386 | }; | 385 | }; |
| @@ -395,9 +394,34 @@ static struct platform_device da8xx_emac_device = { | |||
| 395 | .resource = da8xx_emac_resources, | 394 | .resource = da8xx_emac_resources, |
| 396 | }; | 395 | }; |
| 397 | 396 | ||
| 397 | static struct resource da8xx_mdio_resources[] = { | ||
| 398 | { | ||
| 399 | .start = DA8XX_EMAC_MDIO_BASE, | ||
| 400 | .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1, | ||
| 401 | .flags = IORESOURCE_MEM, | ||
| 402 | }, | ||
| 403 | }; | ||
| 404 | |||
| 405 | static struct platform_device da8xx_mdio_device = { | ||
| 406 | .name = "davinci_mdio", | ||
| 407 | .id = 0, | ||
| 408 | .num_resources = ARRAY_SIZE(da8xx_mdio_resources), | ||
| 409 | .resource = da8xx_mdio_resources, | ||
| 410 | }; | ||
| 411 | |||
| 398 | int __init da8xx_register_emac(void) | 412 | int __init da8xx_register_emac(void) |
| 399 | { | 413 | { |
| 400 | return platform_device_register(&da8xx_emac_device); | 414 | int ret; |
| 415 | |||
| 416 | ret = platform_device_register(&da8xx_mdio_device); | ||
| 417 | if (ret < 0) | ||
| 418 | return ret; | ||
| 419 | ret = platform_device_register(&da8xx_emac_device); | ||
| 420 | if (ret < 0) | ||
| 421 | return ret; | ||
| 422 | ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev), | ||
| 423 | NULL, &da8xx_emac_device.dev); | ||
| 424 | return ret; | ||
| 401 | } | 425 | } |
| 402 | 426 | ||
| 403 | static struct resource da830_mcasp1_resources[] = { | 427 | static struct resource da830_mcasp1_resources[] = { |
| @@ -566,6 +590,44 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) | |||
| 566 | return platform_device_register(&da8xx_mmcsd0_device); | 590 | return platform_device_register(&da8xx_mmcsd0_device); |
| 567 | } | 591 | } |
| 568 | 592 | ||
| 593 | #ifdef CONFIG_ARCH_DAVINCI_DA850 | ||
| 594 | static struct resource da850_mmcsd1_resources[] = { | ||
| 595 | { /* registers */ | ||
| 596 | .start = DA850_MMCSD1_BASE, | ||
| 597 | .end = DA850_MMCSD1_BASE + SZ_4K - 1, | ||
| 598 | .flags = IORESOURCE_MEM, | ||
| 599 | }, | ||
| 600 | { /* interrupt */ | ||
| 601 | .start = IRQ_DA850_MMCSDINT0_1, | ||
| 602 | .end = IRQ_DA850_MMCSDINT0_1, | ||
| 603 | .flags = IORESOURCE_IRQ, | ||
| 604 | }, | ||
| 605 | { /* DMA RX */ | ||
| 606 | .start = EDMA_CTLR_CHAN(1, 28), | ||
| 607 | .end = EDMA_CTLR_CHAN(1, 28), | ||
| 608 | .flags = IORESOURCE_DMA, | ||
| 609 | }, | ||
| 610 | { /* DMA TX */ | ||
| 611 | .start = EDMA_CTLR_CHAN(1, 29), | ||
| 612 | .end = EDMA_CTLR_CHAN(1, 29), | ||
| 613 | .flags = IORESOURCE_DMA, | ||
| 614 | }, | ||
| 615 | }; | ||
| 616 | |||
| 617 | static struct platform_device da850_mmcsd1_device = { | ||
| 618 | .name = "davinci_mmc", | ||
| 619 | .id = 1, | ||
| 620 | .num_resources = ARRAY_SIZE(da850_mmcsd1_resources), | ||
| 621 | .resource = da850_mmcsd1_resources, | ||
| 622 | }; | ||
| 623 | |||
| 624 | int __init da850_register_mmcsd1(struct davinci_mmc_config *config) | ||
| 625 | { | ||
| 626 | da850_mmcsd1_device.dev.platform_data = config; | ||
| 627 | return platform_device_register(&da850_mmcsd1_device); | ||
| 628 | } | ||
| 629 | #endif | ||
| 630 | |||
| 569 | static struct resource da8xx_rtc_resources[] = { | 631 | static struct resource da8xx_rtc_resources[] = { |
| 570 | { | 632 | { |
| 571 | .start = DA8XX_RTC_BASE, | 633 | .start = DA8XX_RTC_BASE, |
