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-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c106
1 files changed, 87 insertions, 19 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 58ad5b66fd60..dd2d32c4ce86 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -10,8 +10,6 @@
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version. 11 * (at your option) any later version.
12 */ 12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h> 13#include <linux/init.h>
16#include <linux/platform_device.h> 14#include <linux/platform_device.h>
17#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
@@ -21,7 +19,7 @@
21#include <mach/common.h> 19#include <mach/common.h>
22#include <mach/time.h> 20#include <mach/time.h>
23#include <mach/da8xx.h> 21#include <mach/da8xx.h>
24#include <video/da8xx-fb.h> 22#include <mach/cpuidle.h>
25 23
26#include "clock.h" 24#include "clock.h"
27 25
@@ -30,6 +28,7 @@
30#define DA8XX_TPTC1_BASE 0x01c08400 28#define DA8XX_TPTC1_BASE 0x01c08400
31#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ 29#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
32#define DA8XX_I2C0_BASE 0x01c22000 30#define DA8XX_I2C0_BASE 0x01c22000
31#define DA8XX_RTC_BASE 0x01C23000
33#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 32#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
34#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 33#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
35#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 34#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
@@ -43,6 +42,8 @@
43#define DA8XX_MDIO_REG_OFFSET 0x4000 42#define DA8XX_MDIO_REG_OFFSET 0x4000
44#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K 43#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
45 44
45void __iomem *da8xx_syscfg_base;
46
46static struct plat_serial8250_port da8xx_serial_pdata[] = { 47static struct plat_serial8250_port da8xx_serial_pdata[] = {
47 { 48 {
48 .mapbase = DA8XX_UART0_BASE, 49 .mapbase = DA8XX_UART0_BASE,
@@ -282,6 +283,11 @@ static struct platform_device da8xx_emac_device = {
282 .resource = da8xx_emac_resources, 283 .resource = da8xx_emac_resources,
283}; 284};
284 285
286int __init da8xx_register_emac(void)
287{
288 return platform_device_register(&da8xx_emac_device);
289}
290
285static struct resource da830_mcasp1_resources[] = { 291static struct resource da830_mcasp1_resources[] = {
286 { 292 {
287 .name = "mcasp1", 293 .name = "mcasp1",
@@ -338,12 +344,7 @@ static struct platform_device da850_mcasp_device = {
338 .resource = da850_mcasp_resources, 344 .resource = da850_mcasp_resources,
339}; 345};
340 346
341int __init da8xx_register_emac(void) 347void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
342{
343 return platform_device_register(&da8xx_emac_device);
344}
345
346void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
347{ 348{
348 /* DA830/OMAP-L137 has 3 instances of McASP */ 349 /* DA830/OMAP-L137 has 3 instances of McASP */
349 if (cpu_is_davinci_da830() && id == 1) { 350 if (cpu_is_davinci_da830() && id == 1) {
@@ -379,10 +380,16 @@ static struct lcd_ctrl_config lcd_cfg = {
379 .raster_order = 0, 380 .raster_order = 0,
380}; 381};
381 382
382static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = { 383struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
383 .manu_name = "sharp", 384 .manu_name = "sharp",
384 .controller_data = &lcd_cfg, 385 .controller_data = &lcd_cfg,
385 .type = "Sharp_LK043T1DG01", 386 .type = "Sharp_LCD035Q3DG01",
387};
388
389struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
390 .manu_name = "sharp",
391 .controller_data = &lcd_cfg,
392 .type = "Sharp_LK043T1DG01",
386}; 393};
387 394
388static struct resource da8xx_lcdc_resources[] = { 395static struct resource da8xx_lcdc_resources[] = {
@@ -398,19 +405,17 @@ static struct resource da8xx_lcdc_resources[] = {
398 }, 405 },
399}; 406};
400 407
401static struct platform_device da850_lcdc_device = { 408static struct platform_device da8xx_lcdc_device = {
402 .name = "da8xx_lcdc", 409 .name = "da8xx_lcdc",
403 .id = 0, 410 .id = 0,
404 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources), 411 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
405 .resource = da8xx_lcdc_resources, 412 .resource = da8xx_lcdc_resources,
406 .dev = {
407 .platform_data = &da850_evm_lcdc_pdata,
408 }
409}; 413};
410 414
411int __init da8xx_register_lcdc(void) 415int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
412{ 416{
413 return platform_device_register(&da850_lcdc_device); 417 da8xx_lcdc_device.dev.platform_data = pdata;
418 return platform_device_register(&da8xx_lcdc_device);
414} 419}
415 420
416static struct resource da8xx_mmcsd0_resources[] = { 421static struct resource da8xx_mmcsd0_resources[] = {
@@ -448,3 +453,66 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
448 da8xx_mmcsd0_device.dev.platform_data = config; 453 da8xx_mmcsd0_device.dev.platform_data = config;
449 return platform_device_register(&da8xx_mmcsd0_device); 454 return platform_device_register(&da8xx_mmcsd0_device);
450} 455}
456
457static struct resource da8xx_rtc_resources[] = {
458 {
459 .start = DA8XX_RTC_BASE,
460 .end = DA8XX_RTC_BASE + SZ_4K - 1,
461 .flags = IORESOURCE_MEM,
462 },
463 { /* timer irq */
464 .start = IRQ_DA8XX_RTC,
465 .end = IRQ_DA8XX_RTC,
466 .flags = IORESOURCE_IRQ,
467 },
468 { /* alarm irq */
469 .start = IRQ_DA8XX_RTC,
470 .end = IRQ_DA8XX_RTC,
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device da8xx_rtc_device = {
476 .name = "omap_rtc",
477 .id = -1,
478 .num_resources = ARRAY_SIZE(da8xx_rtc_resources),
479 .resource = da8xx_rtc_resources,
480};
481
482int da8xx_register_rtc(void)
483{
484 /* Unlock the rtc's registers */
485 __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c));
486 __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70));
487
488 return platform_device_register(&da8xx_rtc_device);
489}
490
491static struct resource da8xx_cpuidle_resources[] = {
492 {
493 .start = DA8XX_DDR2_CTL_BASE,
494 .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
495 .flags = IORESOURCE_MEM,
496 },
497};
498
499/* DA8XX devices support DDR2 power down */
500static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
501 .ddr2_pdown = 1,
502};
503
504
505static struct platform_device da8xx_cpuidle_device = {
506 .name = "cpuidle-davinci",
507 .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources),
508 .resource = da8xx_cpuidle_resources,
509 .dev = {
510 .platform_data = &da8xx_cpuidle_pdata,
511 },
512};
513
514int __init da8xx_register_cpuidle(void)
515{
516 return platform_device_register(&da8xx_cpuidle_device);
517}
518