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-rw-r--r--arch/arm/mach-davinci/da850.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e440c09c5576..e6e605bf1516 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -297,6 +297,13 @@ static struct clk mcasp_clk = {
297 .psc_ctlr = 1, 297 .psc_ctlr = 1,
298}; 298};
299 299
300static struct clk lcdc_clk = {
301 .name = "lcdc",
302 .parent = &pll0_sysclk2,
303 .lpsc = DA8XX_LPSC1_LCDC,
304 .psc_ctlr = 1,
305};
306
300static struct davinci_clk da850_clks[] = { 307static struct davinci_clk da850_clks[] = {
301 CLK(NULL, "ref", &ref_clk), 308 CLK(NULL, "ref", &ref_clk),
302 CLK(NULL, "pll0", &pll0_clk), 309 CLK(NULL, "pll0", &pll0_clk),
@@ -335,6 +342,7 @@ static struct davinci_clk da850_clks[] = {
335 CLK(NULL, "rmii", &rmii_clk), 342 CLK(NULL, "rmii", &rmii_clk),
336 CLK("davinci_emac.1", NULL, &emac_clk), 343 CLK("davinci_emac.1", NULL, &emac_clk),
337 CLK("davinci-mcasp.0", NULL, &mcasp_clk), 344 CLK("davinci-mcasp.0", NULL, &mcasp_clk),
345 CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
338 CLK(NULL, NULL, NULL), 346 CLK(NULL, NULL, NULL),
339}; 347};
340 348
@@ -405,6 +413,30 @@ static const struct mux_config da850_pins[] = {
405 MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false) 413 MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false)
406 MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false) 414 MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false)
407 MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false) 415 MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false)
416 /* LCD function */
417 MUX_CFG(DA850, LCD_D_7, 16, 8, 15, 2, false)
418 MUX_CFG(DA850, LCD_D_6, 16, 12, 15, 2, false)
419 MUX_CFG(DA850, LCD_D_5, 16, 16, 15, 2, false)
420 MUX_CFG(DA850, LCD_D_4, 16, 20, 15, 2, false)
421 MUX_CFG(DA850, LCD_D_3, 16, 24, 15, 2, false)
422 MUX_CFG(DA850, LCD_D_2, 16, 28, 15, 2, false)
423 MUX_CFG(DA850, LCD_D_1, 17, 0, 15, 2, false)
424 MUX_CFG(DA850, LCD_D_0, 17, 4, 15, 2, false)
425 MUX_CFG(DA850, LCD_D_15, 17, 8, 15, 2, false)
426 MUX_CFG(DA850, LCD_D_14, 17, 12, 15, 2, false)
427 MUX_CFG(DA850, LCD_D_13, 17, 16, 15, 2, false)
428 MUX_CFG(DA850, LCD_D_12, 17, 20, 15, 2, false)
429 MUX_CFG(DA850, LCD_D_11, 17, 24, 15, 2, false)
430 MUX_CFG(DA850, LCD_D_10, 17, 28, 15, 2, false)
431 MUX_CFG(DA850, LCD_D_9, 18, 0, 15, 2, false)
432 MUX_CFG(DA850, LCD_D_8, 18, 4, 15, 2, false)
433 MUX_CFG(DA850, LCD_PCLK, 18, 24, 15, 2, false)
434 MUX_CFG(DA850, LCD_HSYNC, 19, 0, 15, 2, false)
435 MUX_CFG(DA850, LCD_VSYNC, 19, 4, 15, 2, false)
436 MUX_CFG(DA850, NLCD_AC_ENB_CS, 19, 24, 15, 2, false)
437 /* GPIO function */
438 MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
439 MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false)
408#endif 440#endif
409}; 441};
410 442
@@ -449,6 +481,16 @@ const short da850_mcasp_pins[] __initdata = {
449 -1 481 -1
450}; 482};
451 483
484const short da850_lcdcntl_pins[] __initdata = {
485 DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4,
486 DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, DA850_LCD_D_8,
487 DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, DA850_LCD_D_12,
488 DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, DA850_LCD_PCLK,
489 DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, DA850_GPIO2_15,
490 DA850_GPIO8_10,
491 -1
492};
493
452/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ 494/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
453static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { 495static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
454 [IRQ_DA8XX_COMMTX] = 7, 496 [IRQ_DA8XX_COMMTX] = 7,