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-rw-r--r--arch/arm/mach-davinci/da850.c152
1 files changed, 152 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e517e1036b09..b90c172d5541 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -347,6 +347,13 @@ static struct clk spi1_clk = {
347 .flags = DA850_CLK_ASYNC3, 347 .flags = DA850_CLK_ASYNC3,
348}; 348};
349 349
350static struct clk vpif_clk = {
351 .name = "vpif",
352 .parent = &pll0_sysclk2,
353 .lpsc = DA850_LPSC1_VPIF,
354 .gpsc = 1,
355};
356
350static struct clk sata_clk = { 357static struct clk sata_clk = {
351 .name = "sata", 358 .name = "sata",
352 .parent = &pll0_sysclk2, 359 .parent = &pll0_sysclk2,
@@ -397,6 +404,7 @@ static struct clk_lookup da850_clks[] = {
397 CLK(NULL, "usb20", &usb20_clk), 404 CLK(NULL, "usb20", &usb20_clk),
398 CLK("spi_davinci.0", NULL, &spi0_clk), 405 CLK("spi_davinci.0", NULL, &spi0_clk),
399 CLK("spi_davinci.1", NULL, &spi1_clk), 406 CLK("spi_davinci.1", NULL, &spi1_clk),
407 CLK("vpif", NULL, &vpif_clk),
400 CLK("ahci", NULL, &sata_clk), 408 CLK("ahci", NULL, &sata_clk),
401 CLK(NULL, NULL, NULL), 409 CLK(NULL, NULL, NULL),
402}; 410};
@@ -573,6 +581,46 @@ static const struct mux_config da850_pins[] = {
573 MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false) 581 MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false)
574 MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false) 582 MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
575 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) 583 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
584 /* VPIF Capture */
585 MUX_CFG(DA850, VPIF_DIN0, 15, 4, 15, 1, false)
586 MUX_CFG(DA850, VPIF_DIN1, 15, 0, 15, 1, false)
587 MUX_CFG(DA850, VPIF_DIN2, 14, 28, 15, 1, false)
588 MUX_CFG(DA850, VPIF_DIN3, 14, 24, 15, 1, false)
589 MUX_CFG(DA850, VPIF_DIN4, 14, 20, 15, 1, false)
590 MUX_CFG(DA850, VPIF_DIN5, 14, 16, 15, 1, false)
591 MUX_CFG(DA850, VPIF_DIN6, 14, 12, 15, 1, false)
592 MUX_CFG(DA850, VPIF_DIN7, 14, 8, 15, 1, false)
593 MUX_CFG(DA850, VPIF_DIN8, 16, 4, 15, 1, false)
594 MUX_CFG(DA850, VPIF_DIN9, 16, 0, 15, 1, false)
595 MUX_CFG(DA850, VPIF_DIN10, 15, 28, 15, 1, false)
596 MUX_CFG(DA850, VPIF_DIN11, 15, 24, 15, 1, false)
597 MUX_CFG(DA850, VPIF_DIN12, 15, 20, 15, 1, false)
598 MUX_CFG(DA850, VPIF_DIN13, 15, 16, 15, 1, false)
599 MUX_CFG(DA850, VPIF_DIN14, 15, 12, 15, 1, false)
600 MUX_CFG(DA850, VPIF_DIN15, 15, 8, 15, 1, false)
601 MUX_CFG(DA850, VPIF_CLKIN0, 14, 0, 15, 1, false)
602 MUX_CFG(DA850, VPIF_CLKIN1, 14, 4, 15, 1, false)
603 MUX_CFG(DA850, VPIF_CLKIN2, 19, 8, 15, 1, false)
604 MUX_CFG(DA850, VPIF_CLKIN3, 19, 16, 15, 1, false)
605 /* VPIF Display */
606 MUX_CFG(DA850, VPIF_DOUT0, 17, 4, 15, 1, false)
607 MUX_CFG(DA850, VPIF_DOUT1, 17, 0, 15, 1, false)
608 MUX_CFG(DA850, VPIF_DOUT2, 16, 28, 15, 1, false)
609 MUX_CFG(DA850, VPIF_DOUT3, 16, 24, 15, 1, false)
610 MUX_CFG(DA850, VPIF_DOUT4, 16, 20, 15, 1, false)
611 MUX_CFG(DA850, VPIF_DOUT5, 16, 16, 15, 1, false)
612 MUX_CFG(DA850, VPIF_DOUT6, 16, 12, 15, 1, false)
613 MUX_CFG(DA850, VPIF_DOUT7, 16, 8, 15, 1, false)
614 MUX_CFG(DA850, VPIF_DOUT8, 18, 4, 15, 1, false)
615 MUX_CFG(DA850, VPIF_DOUT9, 18, 0, 15, 1, false)
616 MUX_CFG(DA850, VPIF_DOUT10, 17, 28, 15, 1, false)
617 MUX_CFG(DA850, VPIF_DOUT11, 17, 24, 15, 1, false)
618 MUX_CFG(DA850, VPIF_DOUT12, 17, 20, 15, 1, false)
619 MUX_CFG(DA850, VPIF_DOUT13, 17, 16, 15, 1, false)
620 MUX_CFG(DA850, VPIF_DOUT14, 17, 12, 15, 1, false)
621 MUX_CFG(DA850, VPIF_DOUT15, 17, 8, 15, 1, false)
622 MUX_CFG(DA850, VPIF_CLKO2, 19, 12, 15, 1, false)
623 MUX_CFG(DA850, VPIF_CLKO3, 19, 20, 15, 1, false)
576#endif 624#endif
577}; 625};
578 626
@@ -595,6 +643,26 @@ const short da850_lcdcntl_pins[] __initconst = {
595 -1 643 -1
596}; 644};
597 645
646const short da850_vpif_capture_pins[] __initdata = {
647 DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
648 DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
649 DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
650 DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
651 DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
652 DA850_VPIF_CLKIN3,
653 -1
654};
655
656const short da850_vpif_display_pins[] __initdata = {
657 DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
658 DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
659 DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
660 DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
661 DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
662 DA850_VPIF_CLKO3,
663 -1
664};
665
598/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ 666/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
599static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { 667static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
600 [IRQ_DA8XX_COMMTX] = 7, 668 [IRQ_DA8XX_COMMTX] = 7,
@@ -1064,6 +1132,90 @@ no_ddrpll_mem:
1064 return ret; 1132 return ret;
1065} 1133}
1066 1134
1135/* VPIF resource, platform data */
1136static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
1137
1138static struct resource da850_vpif_resource[] = {
1139 {
1140 .start = DA8XX_VPIF_BASE,
1141 .end = DA8XX_VPIF_BASE + 0xfff,
1142 .flags = IORESOURCE_MEM,
1143 }
1144};
1145
1146static struct platform_device da850_vpif_dev = {
1147 .name = "vpif",
1148 .id = -1,
1149 .dev = {
1150 .dma_mask = &da850_vpif_dma_mask,
1151 .coherent_dma_mask = DMA_BIT_MASK(32),
1152 },
1153 .resource = da850_vpif_resource,
1154 .num_resources = ARRAY_SIZE(da850_vpif_resource),
1155};
1156
1157static struct resource da850_vpif_display_resource[] = {
1158 {
1159 .start = IRQ_DA850_VPIFINT,
1160 .end = IRQ_DA850_VPIFINT,
1161 .flags = IORESOURCE_IRQ,
1162 },
1163};
1164
1165static struct platform_device da850_vpif_display_dev = {
1166 .name = "vpif_display",
1167 .id = -1,
1168 .dev = {
1169 .dma_mask = &da850_vpif_dma_mask,
1170 .coherent_dma_mask = DMA_BIT_MASK(32),
1171 },
1172 .resource = da850_vpif_display_resource,
1173 .num_resources = ARRAY_SIZE(da850_vpif_display_resource),
1174};
1175
1176static struct resource da850_vpif_capture_resource[] = {
1177 {
1178 .start = IRQ_DA850_VPIFINT,
1179 .end = IRQ_DA850_VPIFINT,
1180 .flags = IORESOURCE_IRQ,
1181 },
1182 {
1183 .start = IRQ_DA850_VPIFINT,
1184 .end = IRQ_DA850_VPIFINT,
1185 .flags = IORESOURCE_IRQ,
1186 },
1187};
1188
1189static struct platform_device da850_vpif_capture_dev = {
1190 .name = "vpif_capture",
1191 .id = -1,
1192 .dev = {
1193 .dma_mask = &da850_vpif_dma_mask,
1194 .coherent_dma_mask = DMA_BIT_MASK(32),
1195 },
1196 .resource = da850_vpif_capture_resource,
1197 .num_resources = ARRAY_SIZE(da850_vpif_capture_resource),
1198};
1199
1200int __init da850_register_vpif(void)
1201{
1202 return platform_device_register(&da850_vpif_dev);
1203}
1204
1205int __init da850_register_vpif_display(struct vpif_display_config
1206 *display_config)
1207{
1208 da850_vpif_display_dev.dev.platform_data = display_config;
1209 return platform_device_register(&da850_vpif_display_dev);
1210}
1211
1212int __init da850_register_vpif_capture(struct vpif_capture_config
1213 *capture_config)
1214{
1215 da850_vpif_capture_dev.dev.platform_data = capture_config;
1216 return platform_device_register(&da850_vpif_capture_dev);
1217}
1218
1067static struct davinci_soc_info davinci_soc_info_da850 = { 1219static struct davinci_soc_info davinci_soc_info_da850 = {
1068 .io_desc = da850_io_desc, 1220 .io_desc = da850_io_desc,
1069 .io_desc_num = ARRAY_SIZE(da850_io_desc), 1221 .io_desc_num = ARRAY_SIZE(da850_io_desc),