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-rw-r--r--arch/arm/mach-davinci/clock.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 01e36483ac3d..11099980b58b 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -70,6 +70,9 @@
70#include <linux/list.h> 70#include <linux/list.h>
71#include <asm/clkdev.h> 71#include <asm/clkdev.h>
72 72
73#define PLLSTAT_GOSTAT BIT(0)
74#define PLLCMD_GOSET BIT(0)
75
73struct pll_data { 76struct pll_data {
74 u32 phys_base; 77 u32 phys_base;
75 void __iomem *base; 78 void __iomem *base;
@@ -86,6 +89,7 @@ struct clk {
86 struct module *owner; 89 struct module *owner;
87 const char *name; 90 const char *name;
88 unsigned long rate; 91 unsigned long rate;
92 unsigned long maxrate; /* H/W supported max rate */
89 u8 usecount; 93 u8 usecount;
90 u8 lpsc; 94 u8 lpsc;
91 u8 gpsc; 95 u8 gpsc;
@@ -118,6 +122,7 @@ struct clk {
118int davinci_clk_init(struct clk_lookup *clocks); 122int davinci_clk_init(struct clk_lookup *clocks);
119int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, 123int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
120 unsigned int mult, unsigned int postdiv); 124 unsigned int mult, unsigned int postdiv);
125int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
121 126
122extern struct platform_device davinci_wdt_device; 127extern struct platform_device davinci_wdt_device;
123extern void davinci_watchdog_reset(struct platform_device *); 128extern void davinci_watchdog_reset(struct platform_device *);