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-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index aa48e3f69715..a0ad7d9f5c85 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -33,9 +33,6 @@
33#include <mach/mmc.h> 33#include <mach/mmc.h>
34#include <mach/usb.h> 34#include <mach/usb.h>
35 35
36#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
37#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
38
39/* NOTE: this is geared for the standard config, with a socketed 36/* NOTE: this is geared for the standard config, with a socketed
40 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you 37 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
41 * swap chips, maybe with a different block size, partitioning may 38 * swap chips, maybe with a different block size, partitioning may
@@ -86,12 +83,12 @@ static struct davinci_nand_pdata davinci_nand_data = {
86 83
87static struct resource davinci_nand_resources[] = { 84static struct resource davinci_nand_resources[] = {
88 { 85 {
89 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 86 .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
90 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 87 .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
91 .flags = IORESOURCE_MEM, 88 .flags = IORESOURCE_MEM,
92 }, { 89 }, {
93 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 90 .start = DM355_ASYNC_EMIF_CONTROL_BASE,
94 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 91 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
95 .flags = IORESOURCE_MEM, 92 .flags = IORESOURCE_MEM,
96 }, 93 },
97}; 94};