diff options
Diffstat (limited to 'arch/arm/mach-clps711x')
-rw-r--r-- | arch/arm/mach-clps711x/Kconfig | 6 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/ceiva.c | 64 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/common.c | 89 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/clps711x.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/debug-macro.S | 8 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/hardware.h | 48 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/timex.h | 23 |
8 files changed, 79 insertions, 169 deletions
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index ea036d621581..e6135363765a 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig | |||
@@ -16,12 +16,6 @@ config ARCH_CDB89712 | |||
16 | The board includes 2 serial ports, Ethernet, IRDA, and expansion | 16 | The board includes 2 serial ports, Ethernet, IRDA, and expansion |
17 | headers. It comes with 16 MB SDRAM and 8 MB flash ROM. | 17 | headers. It comes with 16 MB SDRAM and 8 MB flash ROM. |
18 | 18 | ||
19 | config ARCH_CEIVA | ||
20 | bool "CEIVA" | ||
21 | help | ||
22 | Say Y here if you intend to run this kernel on the Ceiva/Polaroid | ||
23 | PhotoMax Digital Picture Frame. | ||
24 | |||
25 | config ARCH_CLEP7312 | 19 | config ARCH_CLEP7312 |
26 | bool "CLEP7312" | 20 | bool "CLEP7312" |
27 | help | 21 | help |
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile index f2f0256232e3..aed9eb664499 100644 --- a/arch/arm/mach-clps711x/Makefile +++ b/arch/arm/mach-clps711x/Makefile | |||
@@ -9,7 +9,6 @@ obj-m := | |||
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
11 | 11 | ||
12 | obj-$(CONFIG_ARCH_CEIVA) += ceiva.o | ||
13 | obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o | 12 | obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o |
14 | obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o | 13 | obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o |
15 | obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o | 14 | obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o |
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c deleted file mode 100644 index a70147e347ac..000000000000 --- a/arch/arm/mach-clps711x/ceiva.c +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-clps711x/arch-ceiva.c | ||
3 | * | ||
4 | * Copyright (C) 2002, Rob Scott <rscott@mtrob.fdns.net> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/types.h> | ||
22 | #include <linux/string.h> | ||
23 | |||
24 | #include <asm/setup.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | |||
28 | #include <linux/kernel.h> | ||
29 | |||
30 | #include <mach/hardware.h> | ||
31 | #include <asm/page.h> | ||
32 | #include <asm/pgtable.h> | ||
33 | #include <asm/sizes.h> | ||
34 | |||
35 | #include <asm/mach/map.h> | ||
36 | |||
37 | #include "common.h" | ||
38 | |||
39 | static struct map_desc ceiva_io_desc[] __initdata = { | ||
40 | /* SED1355 controlled video RAM & registers */ | ||
41 | { | ||
42 | .virtual = CEIVA_VIRT_SED1355, | ||
43 | .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355), | ||
44 | .length = SZ_2M, | ||
45 | .type = MT_DEVICE | ||
46 | } | ||
47 | }; | ||
48 | |||
49 | |||
50 | static void __init ceiva_map_io(void) | ||
51 | { | ||
52 | clps711x_map_io(); | ||
53 | iotable_init(ceiva_io_desc, ARRAY_SIZE(ceiva_io_desc)); | ||
54 | } | ||
55 | |||
56 | |||
57 | MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") | ||
58 | /* Maintainer: Rob Scott */ | ||
59 | .atag_offset = 0x100, | ||
60 | .map_io = ceiva_map_io, | ||
61 | .init_irq = clps711x_init_irq, | ||
62 | .timer = &clps711x_timer, | ||
63 | .restart = clps711x_restart, | ||
64 | MACHINE_END | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index f15293bd7974..509243d89a32 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -19,24 +19,25 @@ | |||
19 | * along with this program; if not, write to the Free Software | 19 | * along with this program; if not, write to the Free Software |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 | */ | 21 | */ |
22 | #include <linux/kernel.h> | 22 | #include <linux/io.h> |
23 | #include <linux/mm.h> | ||
24 | #include <linux/init.h> | 23 | #include <linux/init.h> |
25 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
26 | #include <linux/io.h> | ||
27 | #include <linux/irq.h> | 25 | #include <linux/irq.h> |
28 | #include <linux/sched.h> | 26 | #include <linux/clk.h> |
27 | #include <linux/clkdev.h> | ||
28 | #include <linux/clk-provider.h> | ||
29 | 29 | ||
30 | #include <asm/sizes.h> | 30 | #include <asm/sizes.h> |
31 | #include <mach/hardware.h> | ||
32 | #include <asm/irq.h> | ||
33 | #include <asm/leds.h> | ||
34 | #include <asm/pgtable.h> | ||
35 | #include <asm/page.h> | ||
36 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
37 | #include <asm/mach/time.h> | 32 | #include <asm/mach/time.h> |
38 | #include <asm/system_misc.h> | 33 | #include <asm/system_misc.h> |
39 | 34 | ||
35 | #include <mach/hardware.h> | ||
36 | |||
37 | static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh, | ||
38 | *clk_tint, *clk_spi; | ||
39 | static unsigned long latch; | ||
40 | |||
40 | /* | 41 | /* |
41 | * This maps the generic CLPS711x registers | 42 | * This maps the generic CLPS711x registers |
42 | */ | 43 | */ |
@@ -166,8 +167,8 @@ void __init clps711x_init_irq(void) | |||
166 | static unsigned long clps711x_gettimeoffset(void) | 167 | static unsigned long clps711x_gettimeoffset(void) |
167 | { | 168 | { |
168 | unsigned long hwticks; | 169 | unsigned long hwticks; |
169 | hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */ | 170 | hwticks = latch - (clps_readl(TC2D) & 0xffff); |
170 | return (hwticks * (tick_nsec / 1000)) / LATCH; | 171 | return (hwticks * (tick_nsec / 1000)) / latch; |
171 | } | 172 | } |
172 | 173 | ||
173 | /* | 174 | /* |
@@ -185,15 +186,71 @@ static struct irqaction clps711x_timer_irq = { | |||
185 | .handler = p720t_timer_interrupt, | 186 | .handler = p720t_timer_interrupt, |
186 | }; | 187 | }; |
187 | 188 | ||
189 | static void add_fixed_clk(struct clk *clk, const char *name, int rate) | ||
190 | { | ||
191 | clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); | ||
192 | clk_register_clkdev(clk, name, NULL); | ||
193 | } | ||
194 | |||
188 | static void __init clps711x_timer_init(void) | 195 | static void __init clps711x_timer_init(void) |
189 | { | 196 | { |
190 | unsigned int syscon; | 197 | int osc, ext, pll, cpu, bus, timl, timh, uart, spi; |
198 | u32 tmp; | ||
199 | |||
200 | osc = 3686400; | ||
201 | ext = 13000000; | ||
202 | |||
203 | tmp = clps_readl(PLLR) >> 24; | ||
204 | if (tmp) | ||
205 | pll = (osc * tmp) / 2; | ||
206 | else | ||
207 | pll = 73728000; /* Default value */ | ||
208 | |||
209 | tmp = clps_readl(SYSFLG2); | ||
210 | if (tmp & SYSFLG2_CKMODE) { | ||
211 | cpu = ext; | ||
212 | bus = cpu; | ||
213 | spi = 135400; | ||
214 | } else { | ||
215 | cpu = pll; | ||
216 | if (cpu >= 36864000) | ||
217 | bus = cpu / 2; | ||
218 | else | ||
219 | bus = 36864000 / 2; | ||
220 | spi = cpu / 576; | ||
221 | } | ||
222 | |||
223 | uart = bus / 10; | ||
224 | |||
225 | if (tmp & SYSFLG2_CKMODE) { | ||
226 | tmp = clps_readl(SYSCON2); | ||
227 | if (tmp & SYSCON2_OSTB) | ||
228 | timh = ext / 26; | ||
229 | else | ||
230 | timh = 541440; | ||
231 | } else | ||
232 | timh = cpu / 144; | ||
233 | |||
234 | timl = timh / 256; | ||
235 | |||
236 | /* All clocks are fixed */ | ||
237 | add_fixed_clk(clk_pll, "pll", pll); | ||
238 | add_fixed_clk(clk_bus, "bus", bus); | ||
239 | add_fixed_clk(clk_uart, "uart", uart); | ||
240 | add_fixed_clk(clk_timerl, "timer_lf", timl); | ||
241 | add_fixed_clk(clk_timerh, "timer_hf", timh); | ||
242 | add_fixed_clk(clk_tint, "tint", 64); | ||
243 | add_fixed_clk(clk_spi, "spi", spi); | ||
244 | |||
245 | pr_info("CPU frequency set at %i Hz.\n", cpu); | ||
246 | |||
247 | latch = (timh + HZ / 2) / HZ; | ||
191 | 248 | ||
192 | syscon = clps_readl(SYSCON1); | 249 | tmp = clps_readl(SYSCON1); |
193 | syscon |= SYSCON1_TC2S | SYSCON1_TC2M; | 250 | tmp |= SYSCON1_TC2S | SYSCON1_TC2M; |
194 | clps_writel(syscon, SYSCON1); | 251 | clps_writel(tmp, SYSCON1); |
195 | 252 | ||
196 | clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ | 253 | clps_writel(latch - 1, TC2D); |
197 | 254 | ||
198 | setup_irq(IRQ_TC2OI, &clps711x_timer_irq); | 255 | setup_irq(IRQ_TC2OI, &clps711x_timer_irq); |
199 | } | 256 | } |
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h index 1dd806f2847e..c82e21ca49c7 100644 --- a/arch/arm/mach-clps711x/include/mach/clps711x.h +++ b/arch/arm/mach-clps711x/include/mach/clps711x.h | |||
@@ -31,8 +31,8 @@ | |||
31 | #define PBDDR (0x0041) | 31 | #define PBDDR (0x0041) |
32 | #define PCDDR (0x0042) | 32 | #define PCDDR (0x0042) |
33 | #define PDDDR (0x0043) | 33 | #define PDDDR (0x0043) |
34 | #define PEDR (0x0080) | 34 | #define PEDR (0x0083) |
35 | #define PEDDR (0x00c0) | 35 | #define PEDDR (0x00c3) |
36 | #define SYSCON1 (0x0100) | 36 | #define SYSCON1 (0x0100) |
37 | #define SYSFLG1 (0x0140) | 37 | #define SYSFLG1 (0x0140) |
38 | #define MEMCFG1 (0x0180) | 38 | #define MEMCFG1 (0x0180) |
@@ -77,7 +77,7 @@ | |||
77 | #define KBDEOI (0x1700) | 77 | #define KBDEOI (0x1700) |
78 | 78 | ||
79 | #define DAIR (0x2000) | 79 | #define DAIR (0x2000) |
80 | #define DAIR0 (0x2040) | 80 | #define DAIDR0 (0x2040) |
81 | #define DAIDR1 (0x2080) | 81 | #define DAIDR1 (0x2080) |
82 | #define DAIDR2 (0x20c0) | 82 | #define DAIDR2 (0x20c0) |
83 | #define DAISR (0x2100) | 83 | #define DAISR (0x2100) |
@@ -191,8 +191,7 @@ | |||
191 | #define UBRLCR_WRDLEN8 (3 << 17) | 191 | #define UBRLCR_WRDLEN8 (3 << 17) |
192 | #define UBRLCR_WRDLEN_MASK (3 << 17) | 192 | #define UBRLCR_WRDLEN_MASK (3 << 17) |
193 | 193 | ||
194 | #define SYNCIO_FRMLEN(x) (((x) & 0x3f) << 7) | 194 | #define SYNCIO_FRMLEN(x) (((x) & 0x1f) << 8) |
195 | #define SYNCIO_CFGLEN(x) ((x) & 0x7f) | ||
196 | #define SYNCIO_SMCKEN (1 << 13) | 195 | #define SYNCIO_SMCKEN (1 << 13) |
197 | #define SYNCIO_TXFRMEN (1 << 14) | 196 | #define SYNCIO_TXFRMEN (1 << 14) |
198 | 197 | ||
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index 118b3d930573..cb3684f8dae0 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S | |||
@@ -28,17 +28,11 @@ | |||
28 | .endm | 28 | .endm |
29 | 29 | ||
30 | .macro waituart,rd,rx | 30 | .macro waituart,rd,rx |
31 | 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx | ||
32 | tst \rd, #1 << 11 @ UBUSYx | ||
33 | bne 1001b | ||
34 | .endm | 31 | .endm |
35 | 32 | ||
36 | .macro busyuart,rd,rx | 33 | .macro busyuart,rd,rx |
37 | tst \rx, #0x1000 @ UART2 does not have CTS here | ||
38 | bne 1002f | ||
39 | 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx | 34 | 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx |
40 | tst \rd, #1 << 8 @ CTS | 35 | tst \rd, #1 << 11 @ UBUSYx |
41 | bne 1001b | 36 | bne 1001b |
42 | 1002: | ||
43 | .endm | 37 | .endm |
44 | 38 | ||
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index 13a64fcd7dd1..8497775d6ee5 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h | |||
@@ -116,7 +116,6 @@ | |||
116 | 116 | ||
117 | #endif /* CONFIG_ARCH_EDB7211 */ | 117 | #endif /* CONFIG_ARCH_EDB7211 */ |
118 | 118 | ||
119 | |||
120 | /* | 119 | /* |
121 | * Relevant bits in port D, which controls power to the various parts of | 120 | * Relevant bits in port D, which controls power to the various parts of |
122 | * the LCD on the EDB7211. | 121 | * the LCD on the EDB7211. |
@@ -125,51 +124,4 @@ | |||
125 | #define EDB_PD2_LCDEN (1<<2) | 124 | #define EDB_PD2_LCDEN (1<<2) |
126 | #define EDB_PD3_LCDBL (1<<3) | 125 | #define EDB_PD3_LCDBL (1<<3) |
127 | 126 | ||
128 | |||
129 | #if defined (CONFIG_ARCH_CEIVA) | ||
130 | |||
131 | /* | ||
132 | * The two flash banks are wired to chip selects 0 and 1. This is the mapping | ||
133 | * for them. | ||
134 | * | ||
135 | * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running | ||
136 | * in jumpered boot mode. | ||
137 | */ | ||
138 | #define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ | ||
139 | #define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ | ||
140 | |||
141 | #define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */ | ||
142 | #define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */ | ||
143 | |||
144 | #define CEIVA_FLASH_SIZE 0x100000 | ||
145 | #define CEIVA_FLASH_WIDTH 2 | ||
146 | |||
147 | /* | ||
148 | * SED1355 LCD controller | ||
149 | */ | ||
150 | #define CEIVA_PHYS_SED1355 CS2_PHYS_BASE | ||
151 | #define CEIVA_VIRT_SED1355 (0xfc000000) | ||
152 | |||
153 | /* | ||
154 | * Relevant bits in port D, which controls power to the various parts of | ||
155 | * the LCD on the Ceiva Photo Max, and reset to the LCD controller. | ||
156 | */ | ||
157 | |||
158 | // Reset line to SED1355 (must be high to operate) | ||
159 | #define CEIVA_PD1_LCDRST (1<<1) | ||
160 | // LCD panel enable (set to one, to enable LCD) | ||
161 | #define CEIVA_PD4_LCDEN (1<<4) | ||
162 | // Backlight (set to one, to turn on backlight | ||
163 | #define CEIVA_PD5_LCDBL (1<<5) | ||
164 | |||
165 | /* | ||
166 | * Relevant bits in port B, which report the status of the buttons. | ||
167 | */ | ||
168 | |||
169 | // White button | ||
170 | #define CEIVA_PB4_WHT_BTN (1<<4) | ||
171 | // Black button | ||
172 | #define CEIVA_PB0_BLK_BTN (1<<0) | ||
173 | #endif // #if defined (CONFIG_ARCH_CEIVA) | ||
174 | |||
175 | #endif | 127 | #endif |
diff --git a/arch/arm/mach-clps711x/include/mach/timex.h b/arch/arm/mach-clps711x/include/mach/timex.h index ac8823ccff93..de6fd192d1c3 100644 --- a/arch/arm/mach-clps711x/include/mach/timex.h +++ b/arch/arm/mach-clps711x/include/mach/timex.h | |||
@@ -1,23 +1,2 @@ | |||
1 | /* | 1 | /* Bogus value */ |
2 | * arch/arm/mach-clps711x/include/mach/timex.h | ||
3 | * | ||
4 | * Prospector 720T architecture timex specifications | ||
5 | * | ||
6 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #define CLOCK_TICK_RATE 512000 | 2 | #define CLOCK_TICK_RATE 512000 |