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-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h9
-rw-r--r--arch/arm/mach-clps711x/include/mach/debug-macro.S8
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h48
-rw-r--r--arch/arm/mach-clps711x/include/mach/timex.h23
4 files changed, 6 insertions, 82 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index 1dd806f2847e..c82e21ca49c7 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -31,8 +31,8 @@
31#define PBDDR (0x0041) 31#define PBDDR (0x0041)
32#define PCDDR (0x0042) 32#define PCDDR (0x0042)
33#define PDDDR (0x0043) 33#define PDDDR (0x0043)
34#define PEDR (0x0080) 34#define PEDR (0x0083)
35#define PEDDR (0x00c0) 35#define PEDDR (0x00c3)
36#define SYSCON1 (0x0100) 36#define SYSCON1 (0x0100)
37#define SYSFLG1 (0x0140) 37#define SYSFLG1 (0x0140)
38#define MEMCFG1 (0x0180) 38#define MEMCFG1 (0x0180)
@@ -77,7 +77,7 @@
77#define KBDEOI (0x1700) 77#define KBDEOI (0x1700)
78 78
79#define DAIR (0x2000) 79#define DAIR (0x2000)
80#define DAIR0 (0x2040) 80#define DAIDR0 (0x2040)
81#define DAIDR1 (0x2080) 81#define DAIDR1 (0x2080)
82#define DAIDR2 (0x20c0) 82#define DAIDR2 (0x20c0)
83#define DAISR (0x2100) 83#define DAISR (0x2100)
@@ -191,8 +191,7 @@
191#define UBRLCR_WRDLEN8 (3 << 17) 191#define UBRLCR_WRDLEN8 (3 << 17)
192#define UBRLCR_WRDLEN_MASK (3 << 17) 192#define UBRLCR_WRDLEN_MASK (3 << 17)
193 193
194#define SYNCIO_FRMLEN(x) (((x) & 0x3f) << 7) 194#define SYNCIO_FRMLEN(x) (((x) & 0x1f) << 8)
195#define SYNCIO_CFGLEN(x) ((x) & 0x7f)
196#define SYNCIO_SMCKEN (1 << 13) 195#define SYNCIO_SMCKEN (1 << 13)
197#define SYNCIO_TXFRMEN (1 << 14) 196#define SYNCIO_TXFRMEN (1 << 14)
198 197
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S
index 118b3d930573..cb3684f8dae0 100644
--- a/arch/arm/mach-clps711x/include/mach/debug-macro.S
+++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S
@@ -28,17 +28,11 @@
28 .endm 28 .endm
29 29
30 .macro waituart,rd,rx 30 .macro waituart,rd,rx
311001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
32 tst \rd, #1 << 11 @ UBUSYx
33 bne 1001b
34 .endm 31 .endm
35 32
36 .macro busyuart,rd,rx 33 .macro busyuart,rd,rx
37 tst \rx, #0x1000 @ UART2 does not have CTS here
38 bne 1002f
391001: ldr \rd, [\rx, #0x0140] @ SYSFLGx 341001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
40 tst \rd, #1 << 8 @ CTS 35 tst \rd, #1 << 11 @ UBUSYx
41 bne 1001b 36 bne 1001b
421002:
43 .endm 37 .endm
44 38
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 13a64fcd7dd1..8497775d6ee5 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -116,7 +116,6 @@
116 116
117#endif /* CONFIG_ARCH_EDB7211 */ 117#endif /* CONFIG_ARCH_EDB7211 */
118 118
119
120/* 119/*
121 * Relevant bits in port D, which controls power to the various parts of 120 * Relevant bits in port D, which controls power to the various parts of
122 * the LCD on the EDB7211. 121 * the LCD on the EDB7211.
@@ -125,51 +124,4 @@
125#define EDB_PD2_LCDEN (1<<2) 124#define EDB_PD2_LCDEN (1<<2)
126#define EDB_PD3_LCDBL (1<<3) 125#define EDB_PD3_LCDBL (1<<3)
127 126
128
129#if defined (CONFIG_ARCH_CEIVA)
130
131/*
132 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
133 * for them.
134 *
135 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
136 * in jumpered boot mode.
137 */
138#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
139#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
140
141#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */
142#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */
143
144#define CEIVA_FLASH_SIZE 0x100000
145#define CEIVA_FLASH_WIDTH 2
146
147/*
148 * SED1355 LCD controller
149 */
150#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE
151#define CEIVA_VIRT_SED1355 (0xfc000000)
152
153/*
154 * Relevant bits in port D, which controls power to the various parts of
155 * the LCD on the Ceiva Photo Max, and reset to the LCD controller.
156 */
157
158// Reset line to SED1355 (must be high to operate)
159#define CEIVA_PD1_LCDRST (1<<1)
160// LCD panel enable (set to one, to enable LCD)
161#define CEIVA_PD4_LCDEN (1<<4)
162// Backlight (set to one, to turn on backlight
163#define CEIVA_PD5_LCDBL (1<<5)
164
165/*
166 * Relevant bits in port B, which report the status of the buttons.
167 */
168
169// White button
170#define CEIVA_PB4_WHT_BTN (1<<4)
171// Black button
172#define CEIVA_PB0_BLK_BTN (1<<0)
173#endif // #if defined (CONFIG_ARCH_CEIVA)
174
175#endif 127#endif
diff --git a/arch/arm/mach-clps711x/include/mach/timex.h b/arch/arm/mach-clps711x/include/mach/timex.h
index ac8823ccff93..de6fd192d1c3 100644
--- a/arch/arm/mach-clps711x/include/mach/timex.h
+++ b/arch/arm/mach-clps711x/include/mach/timex.h
@@ -1,23 +1,2 @@
1/* 1/* Bogus value */
2 * arch/arm/mach-clps711x/include/mach/timex.h
3 *
4 * Prospector 720T architecture timex specifications
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE 512000 2#define CLOCK_TICK_RATE 512000