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-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h88
1 files changed, 2 insertions, 86 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index 01d1b9559710..0286f4bf9945 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -21,6 +21,8 @@
21#ifndef __MACH_CLPS711X_H 21#ifndef __MACH_CLPS711X_H
22#define __MACH_CLPS711X_H 22#define __MACH_CLPS711X_H
23 23
24#include <linux/mfd/syscon/clps711x.h>
25
24#define CLPS711X_PHYS_BASE (0x80000000) 26#define CLPS711X_PHYS_BASE (0x80000000)
25 27
26#define PADR (0x0000) 28#define PADR (0x0000)
@@ -96,83 +98,9 @@
96#define RANDID2 (0x2708) 98#define RANDID2 (0x2708)
97#define RANDID3 (0x270c) 99#define RANDID3 (0x270c)
98 100
99/* common bits: SYSCON1 / SYSCON2 */
100#define SYSCON_UARTEN (1 << 8)
101
102#define SYSCON1_KBDSCAN(x) ((x) & 15)
103#define SYSCON1_KBDSCANMASK (15)
104#define SYSCON1_TC1M (1 << 4)
105#define SYSCON1_TC1S (1 << 5)
106#define SYSCON1_TC2M (1 << 6)
107#define SYSCON1_TC2S (1 << 7)
108#define SYSCON1_UART1EN SYSCON_UARTEN
109#define SYSCON1_BZTOG (1 << 9)
110#define SYSCON1_BZMOD (1 << 10)
111#define SYSCON1_DBGEN (1 << 11)
112#define SYSCON1_LCDEN (1 << 12)
113#define SYSCON1_CDENTX (1 << 13)
114#define SYSCON1_CDENRX (1 << 14)
115#define SYSCON1_SIREN (1 << 15)
116#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16)
117#define SYSCON1_ADCKSEL_MASK (3 << 16)
118#define SYSCON1_EXCKEN (1 << 18)
119#define SYSCON1_WAKEDIS (1 << 19)
120#define SYSCON1_IRTXM (1 << 20)
121
122/* common bits: SYSFLG1 / SYSFLG2 */
123#define SYSFLG_UBUSY (1 << 11)
124#define SYSFLG_URXFE (1 << 22)
125#define SYSFLG_UTXFF (1 << 23)
126
127#define SYSFLG1_MCDR (1 << 0)
128#define SYSFLG1_DCDET (1 << 1)
129#define SYSFLG1_WUDR (1 << 2)
130#define SYSFLG1_WUON (1 << 3)
131#define SYSFLG1_CTS (1 << 8)
132#define SYSFLG1_DSR (1 << 9)
133#define SYSFLG1_DCD (1 << 10)
134#define SYSFLG1_UBUSY SYSFLG_UBUSY
135#define SYSFLG1_NBFLG (1 << 12)
136#define SYSFLG1_RSTFLG (1 << 13)
137#define SYSFLG1_PFFLG (1 << 14)
138#define SYSFLG1_CLDFLG (1 << 15)
139#define SYSFLG1_URXFE SYSFLG_URXFE
140#define SYSFLG1_UTXFF SYSFLG_UTXFF
141#define SYSFLG1_CRXFE (1 << 24)
142#define SYSFLG1_CTXFF (1 << 25)
143#define SYSFLG1_SSIBUSY (1 << 26)
144#define SYSFLG1_ID (1 << 29)
145#define SYSFLG1_VERID(x) (((x) >> 30) & 3)
146#define SYSFLG1_VERID_MASK (3 << 30)
147
148#define SYSFLG2_SSRXOF (1 << 0)
149#define SYSFLG2_RESVAL (1 << 1)
150#define SYSFLG2_RESFRM (1 << 2)
151#define SYSFLG2_SS2RXFE (1 << 3)
152#define SYSFLG2_SS2TXFF (1 << 4)
153#define SYSFLG2_SS2TXUF (1 << 5)
154#define SYSFLG2_CKMODE (1 << 6)
155#define SYSFLG2_UBUSY SYSFLG_UBUSY
156#define SYSFLG2_URXFE SYSFLG_URXFE
157#define SYSFLG2_UTXFF SYSFLG_UTXFF
158
159#define LCDCON_GSEN (1 << 30) 101#define LCDCON_GSEN (1 << 30)
160#define LCDCON_GSMD (1 << 31) 102#define LCDCON_GSMD (1 << 31)
161 103
162#define SYSCON2_SERSEL (1 << 0)
163#define SYSCON2_KBD6 (1 << 1)
164#define SYSCON2_DRAMZ (1 << 2)
165#define SYSCON2_KBWEN (1 << 3)
166#define SYSCON2_SS2TXEN (1 << 4)
167#define SYSCON2_PCCARD1 (1 << 5)
168#define SYSCON2_PCCARD2 (1 << 6)
169#define SYSCON2_SS2RXEN (1 << 7)
170#define SYSCON2_UART2EN SYSCON_UARTEN
171#define SYSCON2_SS2MAEN (1 << 9)
172#define SYSCON2_OSTB (1 << 12)
173#define SYSCON2_CLKENSL (1 << 13)
174#define SYSCON2_BUZFREQ (1 << 14)
175
176/* common bits: UARTDR1 / UARTDR2 */ 104/* common bits: UARTDR1 / UARTDR2 */
177#define UARTDR_FRMERR (1 << 8) 105#define UARTDR_FRMERR (1 << 8)
178#define UARTDR_PARERR (1 << 9) 106#define UARTDR_PARERR (1 << 9)
@@ -228,18 +156,6 @@
228#define DAI64FS_MCLK256EN (1 << 3) 156#define DAI64FS_MCLK256EN (1 << 3)
229#define DAI64FS_LOOPBACK (1 << 5) 157#define DAI64FS_LOOPBACK (1 << 5)
230 158
231#define SYSCON3_ADCCON (1 << 0)
232#define SYSCON3_CLKCTL0 (1 << 1)
233#define SYSCON3_CLKCTL1 (1 << 2)
234#define SYSCON3_DAISEL (1 << 3)
235#define SYSCON3_ADCCKNSEN (1 << 4)
236#define SYSCON3_VERSN(x) (((x) >> 5) & 7)
237#define SYSCON3_VERSN_MASK (7 << 5)
238#define SYSCON3_FASTWAKE (1 << 8)
239#define SYSCON3_DAIEN (1 << 9)
240#define SYSCON3_128FS SYSCON3_DAIEN
241#define SYSCON3_ENPD67 (1 << 10)
242
243#define SDCONF_ACTIVE (1 << 10) 159#define SDCONF_ACTIVE (1 << 10)
244#define SDCONF_CLKCTL (1 << 9) 160#define SDCONF_CLKCTL (1 << 9)
245#define SDCONF_WIDTH_4 (0 << 7) 161#define SDCONF_WIDTH_4 (0 << 7)