diff options
Diffstat (limited to 'arch/arm/mach-bcm')
-rw-r--r-- | arch/arm/mach-bcm/Kconfig | 47 | ||||
-rw-r--r-- | arch/arm/mach-bcm/Makefile | 8 | ||||
-rw-r--r-- | arch/arm/mach-bcm/bcm_5301x.c | 61 | ||||
-rw-r--r-- | arch/arm/mach-bcm/board_bcm21664.c | 78 | ||||
-rw-r--r-- | arch/arm/mach-bcm/board_bcm281xx.c | 83 | ||||
-rw-r--r-- | arch/arm/mach-bcm/board_bcm2835.c | 137 | ||||
-rw-r--r-- | arch/arm/mach-bcm/kona.c | 64 | ||||
-rw-r--r-- | arch/arm/mach-bcm/kona.h | 7 |
8 files changed, 389 insertions, 96 deletions
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index b1aa6a9b3bd1..49c914cd9c7a 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig | |||
@@ -16,12 +16,7 @@ config ARCH_BCM_MOBILE | |||
16 | select ARM_ERRATA_754322 | 16 | select ARM_ERRATA_754322 |
17 | select ARM_ERRATA_764369 if SMP | 17 | select ARM_ERRATA_764369 if SMP |
18 | select ARM_GIC | 18 | select ARM_GIC |
19 | select CPU_V7 | ||
20 | select CLKSRC_OF | ||
21 | select GENERIC_CLOCKEVENTS | ||
22 | select GENERIC_TIME | ||
23 | select GPIO_BCM_KONA | 19 | select GPIO_BCM_KONA |
24 | select SPARSE_IRQ | ||
25 | select TICK_ONESHOT | 20 | select TICK_ONESHOT |
26 | select CACHE_L2X0 | 21 | select CACHE_L2X0 |
27 | select HAVE_ARM_ARCH_TIMER | 22 | select HAVE_ARM_ARCH_TIMER |
@@ -32,6 +27,48 @@ config ARCH_BCM_MOBILE | |||
32 | BCM11130, BCM11140, BCM11351, BCM28145 and | 27 | BCM11130, BCM11140, BCM11351, BCM28145 and |
33 | BCM28155 variants. | 28 | BCM28155 variants. |
34 | 29 | ||
30 | config ARCH_BCM2835 | ||
31 | bool "Broadcom BCM2835 family" if ARCH_MULTI_V6 | ||
32 | select ARCH_REQUIRE_GPIOLIB | ||
33 | select ARM_AMBA | ||
34 | select ARM_ERRATA_411920 | ||
35 | select ARM_TIMER_SP804 | ||
36 | select CLKDEV_LOOKUP | ||
37 | select CLKSRC_OF | ||
38 | select CPU_V6 | ||
39 | select GENERIC_CLOCKEVENTS | ||
40 | select PINCTRL | ||
41 | select PINCTRL_BCM2835 | ||
42 | help | ||
43 | This enables support for the Broadcom BCM2835 SoC. This SoC is | ||
44 | used in the Raspberry Pi and Roku 2 devices. | ||
45 | |||
46 | config ARCH_BCM_5301X | ||
47 | bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 | ||
48 | depends on MMU | ||
49 | select ARM_GIC | ||
50 | select CACHE_L2X0 | ||
51 | select HAVE_ARM_SCU if SMP | ||
52 | select HAVE_ARM_TWD if SMP | ||
53 | select HAVE_SMP | ||
54 | select COMMON_CLK | ||
55 | select GENERIC_CLOCKEVENTS | ||
56 | select ARM_GLOBAL_TIMER | ||
57 | select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK | ||
58 | select MIGHT_HAVE_PCI | ||
59 | help | ||
60 | Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. | ||
61 | |||
62 | This is a network SoC line mostly used in home routers and | ||
63 | wifi access points, it's internal name is Northstar. | ||
64 | This inclused the following SoC: BCM53010, BCM53011, BCM53012, | ||
65 | BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707, | ||
66 | BCM4708 and BCM4709. | ||
67 | |||
68 | Do not confuse this with the BCM4760 which is a totally | ||
69 | different SoC or with the older BCM47XX and BCM53XX based | ||
70 | network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx | ||
71 | |||
35 | endmenu | 72 | endmenu |
36 | 73 | ||
37 | endif | 74 | endif |
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile index c2ccd5a0f772..a326b28c4406 100644 --- a/arch/arm/mach-bcm/Makefile +++ b/arch/arm/mach-bcm/Makefile | |||
@@ -1,5 +1,5 @@ | |||
1 | # | 1 | # |
2 | # Copyright (C) 2012-2013 Broadcom Corporation | 2 | # Copyright (C) 2012-2014 Broadcom Corporation |
3 | # | 3 | # |
4 | # This program is free software; you can redistribute it and/or | 4 | # This program is free software; you can redistribute it and/or |
5 | # modify it under the terms of the GNU General Public License as | 5 | # modify it under the terms of the GNU General Public License as |
@@ -10,6 +10,10 @@ | |||
10 | # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 10 | # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
11 | # GNU General Public License for more details. | 11 | # GNU General Public License for more details. |
12 | 12 | ||
13 | obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o bcm_kona_smc_asm.o kona.o | 13 | obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o board_bcm21664.o \ |
14 | bcm_kona_smc.o bcm_kona_smc_asm.o kona.o | ||
15 | obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o | ||
16 | |||
14 | plus_sec := $(call as-instr,.arch_extension sec,+sec) | 17 | plus_sec := $(call as-instr,.arch_extension sec,+sec) |
15 | AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec) | 18 | AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec) |
19 | obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o | ||
diff --git a/arch/arm/mach-bcm/bcm_5301x.c b/arch/arm/mach-bcm/bcm_5301x.c new file mode 100644 index 000000000000..edff69761e04 --- /dev/null +++ b/arch/arm/mach-bcm/bcm_5301x.c | |||
@@ -0,0 +1,61 @@ | |||
1 | /* | ||
2 | * Broadcom BCM470X / BCM5301X ARM platform code. | ||
3 | * | ||
4 | * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de> | ||
5 | * | ||
6 | * Licensed under the GNU/GPL. See COPYING for details. | ||
7 | */ | ||
8 | #include <linux/of_platform.h> | ||
9 | #include <asm/hardware/cache-l2x0.h> | ||
10 | |||
11 | #include <asm/mach/arch.h> | ||
12 | #include <asm/siginfo.h> | ||
13 | #include <asm/signal.h> | ||
14 | |||
15 | |||
16 | static bool first_fault = true; | ||
17 | |||
18 | static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, | ||
19 | struct pt_regs *regs) | ||
20 | { | ||
21 | if (fsr == 0x1c06 && first_fault) { | ||
22 | first_fault = false; | ||
23 | |||
24 | /* | ||
25 | * These faults with code 0x1c06 happens for no good reason, | ||
26 | * possibly left over from the CFE boot loader. | ||
27 | */ | ||
28 | pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n", | ||
29 | addr, fsr); | ||
30 | |||
31 | /* Returning non-zero causes fault display and panic */ | ||
32 | return 0; | ||
33 | } | ||
34 | |||
35 | /* Others should cause a fault */ | ||
36 | return 1; | ||
37 | } | ||
38 | |||
39 | static void __init bcm5301x_init_early(void) | ||
40 | { | ||
41 | /* Install our hook */ | ||
42 | hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, | ||
43 | "imprecise external abort"); | ||
44 | } | ||
45 | |||
46 | static void __init bcm5301x_dt_init(void) | ||
47 | { | ||
48 | l2x0_of_init(0, ~0UL); | ||
49 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | ||
50 | } | ||
51 | |||
52 | static const char __initconst *bcm5301x_dt_compat[] = { | ||
53 | "brcm,bcm4708", | ||
54 | NULL, | ||
55 | }; | ||
56 | |||
57 | DT_MACHINE_START(BCM5301X, "BCM5301X") | ||
58 | .init_early = bcm5301x_init_early, | ||
59 | .init_machine = bcm5301x_dt_init, | ||
60 | .dt_compat = bcm5301x_dt_compat, | ||
61 | MACHINE_END | ||
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c new file mode 100644 index 000000000000..acc1573fd005 --- /dev/null +++ b/arch/arm/mach-bcm/board_bcm21664.c | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2014 Broadcom Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation version 2. | ||
7 | * | ||
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
9 | * kind, whether express or implied; without even the implied warranty | ||
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | */ | ||
13 | |||
14 | #include <linux/clocksource.h> | ||
15 | #include <linux/of_address.h> | ||
16 | #include <linux/of_platform.h> | ||
17 | |||
18 | #include <asm/mach/arch.h> | ||
19 | |||
20 | #include "bcm_kona_smc.h" | ||
21 | #include "kona.h" | ||
22 | |||
23 | #define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr" | ||
24 | |||
25 | #define RSTMGR_REG_WR_ACCESS_OFFSET 0 | ||
26 | #define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4 | ||
27 | |||
28 | #define RSTMGR_WR_PASSWORD 0xa5a5 | ||
29 | #define RSTMGR_WR_PASSWORD_SHIFT 8 | ||
30 | #define RSTMGR_WR_ACCESS_ENABLE 1 | ||
31 | |||
32 | static void bcm21664_restart(enum reboot_mode mode, const char *cmd) | ||
33 | { | ||
34 | void __iomem *base; | ||
35 | struct device_node *resetmgr; | ||
36 | |||
37 | resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING); | ||
38 | if (!resetmgr) { | ||
39 | pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n"); | ||
40 | return; | ||
41 | } | ||
42 | base = of_iomap(resetmgr, 0); | ||
43 | if (!base) { | ||
44 | pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n"); | ||
45 | return; | ||
46 | } | ||
47 | |||
48 | /* | ||
49 | * A soft reset is triggered by writing a 0 to bit 0 of the soft reset | ||
50 | * register. To write to that register we must first write the password | ||
51 | * and the enable bit in the write access enable register. | ||
52 | */ | ||
53 | writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) | | ||
54 | RSTMGR_WR_ACCESS_ENABLE, | ||
55 | base + RSTMGR_REG_WR_ACCESS_OFFSET); | ||
56 | writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET); | ||
57 | |||
58 | /* Wait for reset */ | ||
59 | while (1); | ||
60 | } | ||
61 | |||
62 | static void __init bcm21664_init(void) | ||
63 | { | ||
64 | of_platform_populate(NULL, of_default_bus_match_table, NULL, | ||
65 | &platform_bus); | ||
66 | kona_l2_cache_init(); | ||
67 | } | ||
68 | |||
69 | static const char * const bcm21664_dt_compat[] = { | ||
70 | "brcm,bcm21664", | ||
71 | NULL, | ||
72 | }; | ||
73 | |||
74 | DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor") | ||
75 | .init_machine = bcm21664_init, | ||
76 | .restart = bcm21664_restart, | ||
77 | .dt_compat = bcm21664_dt_compat, | ||
78 | MACHINE_END | ||
diff --git a/arch/arm/mach-bcm/board_bcm281xx.c b/arch/arm/mach-bcm/board_bcm281xx.c index cb3dc364405c..6be54c10f8cb 100644 --- a/arch/arm/mach-bcm/board_bcm281xx.c +++ b/arch/arm/mach-bcm/board_bcm281xx.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2012-2013 Broadcom Corporation | 2 | * Copyright (C) 2012-2014 Broadcom Corporation |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License as | 5 | * modify it under the terms of the GNU General Public License as |
@@ -11,64 +11,65 @@ | |||
11 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/of_platform.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/device.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/clocksource.h> | 14 | #include <linux/clocksource.h> |
15 | #include <linux/of_address.h> | ||
16 | #include <linux/of_platform.h> | ||
19 | 17 | ||
20 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
21 | #include <asm/mach/time.h> | ||
22 | #include <asm/hardware/cache-l2x0.h> | ||
23 | 19 | ||
24 | #include "bcm_kona_smc.h" | ||
25 | #include "kona.h" | 20 | #include "kona.h" |
26 | 21 | ||
27 | static int __init kona_l2_cache_init(void) | 22 | #define SECWDOG_OFFSET 0x00000000 |
23 | #define SECWDOG_RESERVED_MASK 0xe2000000 | ||
24 | #define SECWDOG_WD_LOAD_FLAG_MASK 0x10000000 | ||
25 | #define SECWDOG_EN_MASK 0x08000000 | ||
26 | #define SECWDOG_SRSTEN_MASK 0x04000000 | ||
27 | #define SECWDOG_CLKS_SHIFT 20 | ||
28 | #define SECWDOG_COUNT_SHIFT 0 | ||
29 | |||
30 | static void bcm281xx_restart(enum reboot_mode mode, const char *cmd) | ||
28 | { | 31 | { |
29 | if (!IS_ENABLED(CONFIG_CACHE_L2X0)) | 32 | uint32_t val; |
30 | return 0; | 33 | void __iomem *base; |
34 | struct device_node *np_wdog; | ||
31 | 35 | ||
32 | if (bcm_kona_smc_init() < 0) { | 36 | np_wdog = of_find_compatible_node(NULL, NULL, "brcm,kona-wdt"); |
33 | pr_info("Kona secure API not available. Skipping L2 init\n"); | 37 | if (!np_wdog) { |
34 | return 0; | 38 | pr_emerg("Couldn't find brcm,kona-wdt\n"); |
39 | return; | ||
40 | } | ||
41 | base = of_iomap(np_wdog, 0); | ||
42 | if (!base) { | ||
43 | pr_emerg("Couldn't map brcm,kona-wdt\n"); | ||
44 | return; | ||
35 | } | 45 | } |
36 | 46 | ||
37 | bcm_kona_smc(SSAPI_ENABLE_L2_CACHE, 0, 0, 0, 0); | 47 | /* Enable watchdog with short timeout (244us). */ |
38 | 48 | val = readl(base + SECWDOG_OFFSET); | |
39 | /* | 49 | val &= SECWDOG_RESERVED_MASK | SECWDOG_WD_LOAD_FLAG_MASK; |
40 | * The aux_val and aux_mask have no effect since L2 cache is already | 50 | val |= SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK | |
41 | * enabled. Pass 0s for aux_val and 1s for aux_mask for default value. | 51 | (0x15 << SECWDOG_CLKS_SHIFT) | |
42 | */ | 52 | (0x8 << SECWDOG_COUNT_SHIFT); |
43 | return l2x0_of_init(0, ~0); | 53 | writel(val, base + SECWDOG_OFFSET); |
44 | } | ||
45 | |||
46 | static void bcm_board_setup_restart(void) | ||
47 | { | ||
48 | struct device_node *np; | ||
49 | 54 | ||
50 | np = of_find_compatible_node(NULL, NULL, "brcm,bcm11351"); | 55 | /* Wait for reset */ |
51 | if (np) { | 56 | while (1); |
52 | if (of_device_is_available(np)) | ||
53 | bcm_kona_setup_restart(); | ||
54 | of_node_put(np); | ||
55 | } | ||
56 | /* Restart setup for other boards goes here */ | ||
57 | } | 57 | } |
58 | 58 | ||
59 | static void __init board_init(void) | 59 | static void __init bcm281xx_init(void) |
60 | { | 60 | { |
61 | of_platform_populate(NULL, of_default_bus_match_table, NULL, | 61 | of_platform_populate(NULL, of_default_bus_match_table, NULL, |
62 | &platform_bus); | 62 | &platform_bus); |
63 | |||
64 | bcm_board_setup_restart(); | ||
65 | kona_l2_cache_init(); | 63 | kona_l2_cache_init(); |
66 | } | 64 | } |
67 | 65 | ||
68 | static const char * const bcm11351_dt_compat[] = { "brcm,bcm11351", NULL, }; | 66 | static const char * const bcm281xx_dt_compat[] = { |
67 | "brcm,bcm11351", /* Have to use the first number upstreamed */ | ||
68 | NULL, | ||
69 | }; | ||
69 | 70 | ||
70 | DT_MACHINE_START(BCM11351_DT, "BCM281xx Broadcom Application Processor") | 71 | DT_MACHINE_START(BCM281XX_DT, "BCM281xx Broadcom Application Processor") |
71 | .init_machine = board_init, | 72 | .init_machine = bcm281xx_init, |
72 | .restart = bcm_kona_restart, | 73 | .restart = bcm281xx_restart, |
73 | .dt_compat = bcm11351_dt_compat, | 74 | .dt_compat = bcm281xx_dt_compat, |
74 | MACHINE_END | 75 | MACHINE_END |
diff --git a/arch/arm/mach-bcm/board_bcm2835.c b/arch/arm/mach-bcm/board_bcm2835.c new file mode 100644 index 000000000000..70f2f3925f0e --- /dev/null +++ b/arch/arm/mach-bcm/board_bcm2835.c | |||
@@ -0,0 +1,137 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Broadcom | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #include <linux/delay.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/irqchip.h> | ||
18 | #include <linux/of_address.h> | ||
19 | #include <linux/of_platform.h> | ||
20 | #include <linux/clk/bcm2835.h> | ||
21 | |||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach/map.h> | ||
24 | |||
25 | #define PM_RSTC 0x1c | ||
26 | #define PM_RSTS 0x20 | ||
27 | #define PM_WDOG 0x24 | ||
28 | |||
29 | #define PM_PASSWORD 0x5a000000 | ||
30 | #define PM_RSTC_WRCFG_MASK 0x00000030 | ||
31 | #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 | ||
32 | #define PM_RSTS_HADWRH_SET 0x00000040 | ||
33 | |||
34 | #define BCM2835_PERIPH_PHYS 0x20000000 | ||
35 | #define BCM2835_PERIPH_VIRT 0xf0000000 | ||
36 | #define BCM2835_PERIPH_SIZE SZ_16M | ||
37 | |||
38 | static void __iomem *wdt_regs; | ||
39 | |||
40 | /* | ||
41 | * The machine restart method can be called from an atomic context so we won't | ||
42 | * be able to ioremap the regs then. | ||
43 | */ | ||
44 | static void bcm2835_setup_restart(void) | ||
45 | { | ||
46 | struct device_node *np = of_find_compatible_node(NULL, NULL, | ||
47 | "brcm,bcm2835-pm-wdt"); | ||
48 | if (WARN(!np, "unable to setup watchdog restart")) | ||
49 | return; | ||
50 | |||
51 | wdt_regs = of_iomap(np, 0); | ||
52 | WARN(!wdt_regs, "failed to remap watchdog regs"); | ||
53 | } | ||
54 | |||
55 | static void bcm2835_restart(enum reboot_mode mode, const char *cmd) | ||
56 | { | ||
57 | u32 val; | ||
58 | |||
59 | if (!wdt_regs) | ||
60 | return; | ||
61 | |||
62 | /* use a timeout of 10 ticks (~150us) */ | ||
63 | writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG); | ||
64 | val = readl_relaxed(wdt_regs + PM_RSTC); | ||
65 | val &= ~PM_RSTC_WRCFG_MASK; | ||
66 | val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET; | ||
67 | writel_relaxed(val, wdt_regs + PM_RSTC); | ||
68 | |||
69 | /* No sleeping, possibly atomic. */ | ||
70 | mdelay(1); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * We can't really power off, but if we do the normal reset scheme, and | ||
75 | * indicate to bootcode.bin not to reboot, then most of the chip will be | ||
76 | * powered off. | ||
77 | */ | ||
78 | static void bcm2835_power_off(void) | ||
79 | { | ||
80 | u32 val; | ||
81 | |||
82 | /* | ||
83 | * We set the watchdog hard reset bit here to distinguish this reset | ||
84 | * from the normal (full) reset. bootcode.bin will not reboot after a | ||
85 | * hard reset. | ||
86 | */ | ||
87 | val = readl_relaxed(wdt_regs + PM_RSTS); | ||
88 | val &= ~PM_RSTC_WRCFG_MASK; | ||
89 | val |= PM_PASSWORD | PM_RSTS_HADWRH_SET; | ||
90 | writel_relaxed(val, wdt_regs + PM_RSTS); | ||
91 | |||
92 | /* Continue with normal reset mechanism */ | ||
93 | bcm2835_restart(REBOOT_HARD, ""); | ||
94 | } | ||
95 | |||
96 | static struct map_desc io_map __initdata = { | ||
97 | .virtual = BCM2835_PERIPH_VIRT, | ||
98 | .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), | ||
99 | .length = BCM2835_PERIPH_SIZE, | ||
100 | .type = MT_DEVICE | ||
101 | }; | ||
102 | |||
103 | static void __init bcm2835_map_io(void) | ||
104 | { | ||
105 | iotable_init(&io_map, 1); | ||
106 | } | ||
107 | |||
108 | static void __init bcm2835_init(void) | ||
109 | { | ||
110 | int ret; | ||
111 | |||
112 | bcm2835_setup_restart(); | ||
113 | if (wdt_regs) | ||
114 | pm_power_off = bcm2835_power_off; | ||
115 | |||
116 | bcm2835_init_clocks(); | ||
117 | |||
118 | ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, | ||
119 | NULL); | ||
120 | if (ret) { | ||
121 | pr_err("of_platform_populate failed: %d\n", ret); | ||
122 | BUG(); | ||
123 | } | ||
124 | } | ||
125 | |||
126 | static const char * const bcm2835_compat[] = { | ||
127 | "brcm,bcm2835", | ||
128 | NULL | ||
129 | }; | ||
130 | |||
131 | DT_MACHINE_START(BCM2835, "BCM2835") | ||
132 | .map_io = bcm2835_map_io, | ||
133 | .init_irq = irqchip_init, | ||
134 | .init_machine = bcm2835_init, | ||
135 | .restart = bcm2835_restart, | ||
136 | .dt_compat = bcm2835_compat | ||
137 | MACHINE_END | ||
diff --git a/arch/arm/mach-bcm/kona.c b/arch/arm/mach-bcm/kona.c index 6939d9017f63..768bc2837bf5 100644 --- a/arch/arm/mach-bcm/kona.c +++ b/arch/arm/mach-bcm/kona.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2013 Broadcom Corporation | 2 | * Copyright (C) 2012-2014 Broadcom Corporation |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License as | 5 | * modify it under the terms of the GNU General Public License as |
@@ -11,55 +11,33 @@ | |||
11 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/of_address.h> | 14 | #include <linux/of_platform.h> |
15 | #include <asm/io.h> | 15 | #include <asm/hardware/cache-l2x0.h> |
16 | 16 | ||
17 | #include "bcm_kona_smc.h" | ||
17 | #include "kona.h" | 18 | #include "kona.h" |
18 | 19 | ||
19 | static void __iomem *watchdog_base; | 20 | void __init kona_l2_cache_init(void) |
20 | |||
21 | void bcm_kona_setup_restart(void) | ||
22 | { | 21 | { |
23 | struct device_node *np_wdog; | 22 | int ret; |
24 | 23 | ||
25 | /* | 24 | if (!IS_ENABLED(CONFIG_CACHE_L2X0)) |
26 | * The assumption is that whoever calls bcm_kona_setup_restart() | ||
27 | * also needs a Kona Watchdog Timer entry in Device Tree, i.e. we | ||
28 | * report an error if the DT entry is missing. | ||
29 | */ | ||
30 | np_wdog = of_find_compatible_node(NULL, NULL, "brcm,kona-wdt"); | ||
31 | if (!np_wdog) { | ||
32 | pr_err("brcm,kona-wdt not found in DT, reboot disabled\n"); | ||
33 | return; | 25 | return; |
34 | } | ||
35 | watchdog_base = of_iomap(np_wdog, 0); | ||
36 | WARN(!watchdog_base, "failed to map watchdog base"); | ||
37 | of_node_put(np_wdog); | ||
38 | } | ||
39 | |||
40 | #define SECWDOG_OFFSET 0x00000000 | ||
41 | #define SECWDOG_RESERVED_MASK 0xE2000000 | ||
42 | #define SECWDOG_WD_LOAD_FLAG_MASK 0x10000000 | ||
43 | #define SECWDOG_EN_MASK 0x08000000 | ||
44 | #define SECWDOG_SRSTEN_MASK 0x04000000 | ||
45 | #define SECWDOG_CLKS_SHIFT 20 | ||
46 | #define SECWDOG_LOCK_SHIFT 0 | ||
47 | 26 | ||
48 | void bcm_kona_restart(enum reboot_mode mode, const char *cmd) | 27 | ret = bcm_kona_smc_init(); |
49 | { | 28 | if (ret) { |
50 | uint32_t val; | 29 | pr_info("Secure API not available (%d). Skipping L2 init.\n", |
51 | 30 | ret); | |
52 | if (!watchdog_base) | 31 | return; |
53 | panic("Watchdog not mapped. Reboot failed.\n"); | 32 | } |
54 | 33 | ||
55 | /* Enable watchdog2 with very short timeout. */ | 34 | bcm_kona_smc(SSAPI_ENABLE_L2_CACHE, 0, 0, 0, 0); |
56 | val = readl(watchdog_base + SECWDOG_OFFSET); | ||
57 | val &= SECWDOG_RESERVED_MASK | SECWDOG_WD_LOAD_FLAG_MASK; | ||
58 | val |= SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK | | ||
59 | (0x8 << SECWDOG_CLKS_SHIFT) | | ||
60 | (0x8 << SECWDOG_LOCK_SHIFT); | ||
61 | writel(val, watchdog_base + SECWDOG_OFFSET); | ||
62 | 35 | ||
63 | while (1) | 36 | /* |
64 | ; | 37 | * The aux_val and aux_mask have no effect since L2 cache is already |
38 | * enabled. Pass 0s for aux_val and 1s for aux_mask for default value. | ||
39 | */ | ||
40 | ret = l2x0_of_init(0, ~0); | ||
41 | if (ret) | ||
42 | pr_err("Couldn't enable L2 cache: %d\n", ret); | ||
65 | } | 43 | } |
diff --git a/arch/arm/mach-bcm/kona.h b/arch/arm/mach-bcm/kona.h index 291eca3e06ff..3a7a017c29cd 100644 --- a/arch/arm/mach-bcm/kona.h +++ b/arch/arm/mach-bcm/kona.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2013 Broadcom Corporation | 2 | * Copyright (C) 2012-2014 Broadcom Corporation |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License as | 5 | * modify it under the terms of the GNU General Public License as |
@@ -11,7 +11,4 @@ | |||
11 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/reboot.h> | 14 | void __init kona_l2_cache_init(void); |
15 | |||
16 | void bcm_kona_setup_restart(void); | ||
17 | void bcm_kona_restart(enum reboot_mode mode, const char *cmd); | ||