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-rw-r--r--arch/arm/mach-at91rm9200/Kconfig36
-rw-r--r--arch/arm/mach-at91rm9200/Makefile12
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c42
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200_devices.c (renamed from arch/arm/mach-at91rm9200/devices.c)160
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200_time.c5
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9260.c294
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9260_devices.c866
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9261.c289
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9261_devices.c741
-rw-r--r--arch/arm/mach-at91rm9200/at91sam926x_time.c114
-rw-r--r--arch/arm/mach-at91rm9200/board-carmeva.c32
-rw-r--r--arch/arm/mach-at91rm9200/board-csb337.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-dk.c30
-rw-r--r--arch/arm/mach-at91rm9200/board-eb9200.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-ek.c30
-rw-r--r--arch/arm/mach-at91rm9200/board-kb9202.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-sam9260ek.c201
-rw-r--r--arch/arm/mach-at91rm9200/board-sam9261ek.c259
-rw-r--r--arch/arm/mach-at91rm9200/clock.c27
-rw-r--r--arch/arm/mach-at91rm9200/clock.h1
-rw-r--r--arch/arm/mach-at91rm9200/generic.h8
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c10
-rw-r--r--arch/arm/mach-at91rm9200/irq.c16
-rw-r--r--arch/arm/mach-at91rm9200/pm.c24
24 files changed, 3092 insertions, 111 deletions
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 2f85e8693b1b..9f11db8af233 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -2,7 +2,8 @@ if ARCH_AT91
2 2
3menu "Atmel AT91 System-on-Chip" 3menu "Atmel AT91 System-on-Chip"
4 4
5comment "Atmel AT91 Processors" 5choice
6 prompt "Atmel AT91 Processor"
6 7
7config ARCH_AT91RM9200 8config ARCH_AT91RM9200
8 bool "AT91RM9200" 9 bool "AT91RM9200"
@@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
13config ARCH_AT91SAM9261 14config ARCH_AT91SAM9261
14 bool "AT91SAM9261" 15 bool "AT91SAM9261"
15 16
17endchoice
18
16# ---------------------------------------------------------- 19# ----------------------------------------------------------
17 20
18if ARCH_AT91RM9200 21if ARCH_AT91RM9200
@@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
33 Select this if you are using Atmel's AT91RM9200-DK Development board. 36 Select this if you are using Atmel's AT91RM9200-DK Development board.
34 (Discontinued) 37 (Discontinued)
35 38
36
37config MACH_AT91RM9200EK 39config MACH_AT91RM9200EK
38 bool "Atmel AT91RM9200-EK Evaluation Kit" 40 bool "Atmel AT91RM9200-EK Evaluation Kit"
39 depends on ARCH_AT91RM9200 41 depends on ARCH_AT91RM9200
@@ -90,6 +92,13 @@ if ARCH_AT91SAM9260
90 92
91comment "AT91SAM9260 Board Type" 93comment "AT91SAM9260 Board Type"
92 94
95config MACH_AT91SAM9260EK
96 bool "Atmel AT91SAM9260-EK Evaluation Kit"
97 depends on ARCH_AT91SAM9260
98 help
99 Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
100 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
101
93endif 102endif
94 103
95# ---------------------------------------------------------- 104# ----------------------------------------------------------
@@ -98,8 +107,31 @@ if ARCH_AT91SAM9261
98 107
99comment "AT91SAM9261 Board Type" 108comment "AT91SAM9261 Board Type"
100 109
110config MACH_AT91SAM9261EK
111 bool "Atmel AT91SAM9261-EK Evaluation Kit"
112 depends on ARCH_AT91SAM9261
113 help
114 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
115 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
116
101endif 117endif
102 118
119# ----------------------------------------------------------
120
121comment "AT91 Board Options"
122
123config MTD_AT91_DATAFLASH_CARD
124 bool "Enable DataFlash Card support"
125 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK)
126 help
127 Enable support for the DataFlash card.
128
129config MTD_NAND_AT91_BUSWIDTH_16
130 bool "Enable 16-bit data bus interface to NAND flash"
131 depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK)
132 help
133 On AT91SAM926x boards both types of NAND flash can be present
134 (8 and 16 bit data bus width).
103 135
104# ---------------------------------------------------------- 136# ----------------------------------------------------------
105 137
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index c174805c24e5..cf777007847a 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := clock.o irq.o gpio.o devices.o 5obj-y := clock.o irq.o gpio.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
@@ -10,11 +10,11 @@ obj- :=
10obj-$(CONFIG_PM) += pm.o 10obj-$(CONFIG_PM) += pm.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
16 16
17# AT91RM9200 Board-specific support 17# AT91RM9200 board-specific support
18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o 19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o 20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
@@ -26,8 +26,10 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
26obj-$(CONFIG_MACH_KAFA) += board-kafa.o 26obj-$(CONFIG_MACH_KAFA) += board-kafa.o
27 27
28# AT91SAM9260 board-specific support 28# AT91SAM9260 board-specific support
29obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
29 30
30# AT91SAM9261 board-specific support 31# AT91SAM9261 board-specific support
32obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
31 33
32# LEDs support 34# LEDs support
33led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o 35led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index dcf6136fedf9..a92e9a495b07 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -14,8 +14,10 @@
14 14
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 16#include <asm/mach/map.h>
17#include <asm/arch/at91rm9200.h>
18#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_st.h>
17 20
18#include <asm/hardware.h>
19#include "generic.h" 21#include "generic.h"
20#include "clock.h" 22#include "clock.h"
21 23
@@ -26,32 +28,12 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
26 .length = SZ_4K, 28 .length = SZ_4K,
27 .type = MT_DEVICE, 29 .type = MT_DEVICE,
28 }, { 30 }, {
29 .virtual = AT91_VA_BASE_SPI,
30 .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 }, {
34 .virtual = AT91_VA_BASE_EMAC, 31 .virtual = AT91_VA_BASE_EMAC,
35 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), 32 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
36 .length = SZ_16K, 33 .length = SZ_16K,
37 .type = MT_DEVICE, 34 .type = MT_DEVICE,
38 }, { 35 }, {
39 .virtual = AT91_VA_BASE_TWI, 36 .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
40 .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
41 .length = SZ_16K,
42 .type = MT_DEVICE,
43 }, {
44 .virtual = AT91_VA_BASE_MCI,
45 .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
46 .length = SZ_16K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = AT91_VA_BASE_UDP,
50 .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
51 .length = SZ_16K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = AT91_SRAM_VIRT_BASE,
55 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), 37 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
56 .length = AT91RM9200_SRAM_SIZE, 38 .length = AT91RM9200_SRAM_SIZE,
57 .type = MT_DEVICE, 39 .type = MT_DEVICE,
@@ -222,6 +204,16 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
222 } 204 }
223}; 205};
224 206
207static void at91rm9200_reset(void)
208{
209 /*
210 * Perform a hardware reset with the use of the Watchdog timer.
211 */
212 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
213 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
214}
215
216
225/* -------------------------------------------------------------------- 217/* --------------------------------------------------------------------
226 * AT91RM9200 processor initialization 218 * AT91RM9200 processor initialization
227 * -------------------------------------------------------------------- */ 219 * -------------------------------------------------------------------- */
@@ -230,6 +222,12 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
230 /* Map peripherals */ 222 /* Map peripherals */
231 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 223 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
232 224
225 at91_arch_reset = at91rm9200_reset;
226 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
227 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
228 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
229 | (1 << AT91RM9200_ID_IRQ6);
230
233 /* Init clock subsystem */ 231 /* Init clock subsystem */
234 at91_clock_init(main_clock); 232 at91_clock_init(main_clock);
235 233
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
index 059824376629..4641b99db0ee 100644
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/devices.c 2 * arch/arm/mach-at91rm9200/at91rm9200_devices.c
3 * 3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> 4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell 5 * Copyright (C) 2005 David Brownell
@@ -15,9 +15,10 @@
15 15
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17 17
18#include <asm/hardware.h>
19#include <asm/arch/board.h> 18#include <asm/arch/board.h>
20#include <asm/arch/gpio.h> 19#include <asm/arch/gpio.h>
20#include <asm/arch/at91rm9200.h>
21#include <asm/arch/at91rm9200_mc.h>
21 22
22#include "generic.h" 23#include "generic.h"
23 24
@@ -33,7 +34,7 @@
33static u64 ohci_dmamask = 0xffffffffUL; 34static u64 ohci_dmamask = 0xffffffffUL;
34static struct at91_usbh_data usbh_data; 35static struct at91_usbh_data usbh_data;
35 36
36static struct resource at91_usbh_resources[] = { 37static struct resource usbh_resources[] = {
37 [0] = { 38 [0] = {
38 .start = AT91RM9200_UHP_BASE, 39 .start = AT91RM9200_UHP_BASE,
39 .end = AT91RM9200_UHP_BASE + SZ_1M - 1, 40 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
@@ -54,8 +55,8 @@ static struct platform_device at91rm9200_usbh_device = {
54 .coherent_dma_mask = 0xffffffff, 55 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data, 56 .platform_data = &usbh_data,
56 }, 57 },
57 .resource = at91_usbh_resources, 58 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(at91_usbh_resources), 59 .num_resources = ARRAY_SIZE(usbh_resources),
59}; 60};
60 61
61void __init at91_add_device_usbh(struct at91_usbh_data *data) 62void __init at91_add_device_usbh(struct at91_usbh_data *data)
@@ -78,7 +79,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
78#ifdef CONFIG_USB_GADGET_AT91 79#ifdef CONFIG_USB_GADGET_AT91
79static struct at91_udc_data udc_data; 80static struct at91_udc_data udc_data;
80 81
81static struct resource at91_udc_resources[] = { 82static struct resource udc_resources[] = {
82 [0] = { 83 [0] = {
83 .start = AT91RM9200_BASE_UDP, 84 .start = AT91RM9200_BASE_UDP,
84 .end = AT91RM9200_BASE_UDP + SZ_16K - 1, 85 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
@@ -97,8 +98,8 @@ static struct platform_device at91rm9200_udc_device = {
97 .dev = { 98 .dev = {
98 .platform_data = &udc_data, 99 .platform_data = &udc_data,
99 }, 100 },
100 .resource = at91_udc_resources, 101 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(at91_udc_resources), 102 .num_resources = ARRAY_SIZE(udc_resources),
102}; 103};
103 104
104void __init at91_add_device_udc(struct at91_udc_data *data) 105void __init at91_add_device_udc(struct at91_udc_data *data)
@@ -129,7 +130,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
129static u64 eth_dmamask = 0xffffffffUL; 130static u64 eth_dmamask = 0xffffffffUL;
130static struct at91_eth_data eth_data; 131static struct at91_eth_data eth_data;
131 132
132static struct resource at91_eth_resources[] = { 133static struct resource eth_resources[] = {
133 [0] = { 134 [0] = {
134 .start = AT91_VA_BASE_EMAC, 135 .start = AT91_VA_BASE_EMAC,
135 .end = AT91_VA_BASE_EMAC + SZ_16K - 1, 136 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
@@ -150,8 +151,8 @@ static struct platform_device at91rm9200_eth_device = {
150 .coherent_dma_mask = 0xffffffff, 151 .coherent_dma_mask = 0xffffffff,
151 .platform_data = &eth_data, 152 .platform_data = &eth_data,
152 }, 153 },
153 .resource = at91_eth_resources, 154 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(at91_eth_resources), 155 .num_resources = ARRAY_SIZE(eth_resources),
155}; 156};
156 157
157void __init at91_add_device_eth(struct at91_eth_data *data) 158void __init at91_add_device_eth(struct at91_eth_data *data)
@@ -202,11 +203,13 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
202#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) 203#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203static struct at91_cf_data cf_data; 204static struct at91_cf_data cf_data;
204 205
205static struct resource at91_cf_resources[] = { 206#define CF_BASE AT91_CHIPSELECT_4
207
208static struct resource cf_resources[] = {
206 [0] = { 209 [0] = {
207 .start = AT91_CF_BASE, 210 .start = CF_BASE,
208 /* ties up CS4, CS5 and CS6 */ 211 /* ties up CS4, CS5 and CS6 */
209 .end = AT91_CF_BASE + (0x30000000 - 1), 212 .end = CF_BASE + (0x30000000 - 1),
210 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, 213 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
211 }, 214 },
212}; 215};
@@ -217,15 +220,38 @@ static struct platform_device at91rm9200_cf_device = {
217 .dev = { 220 .dev = {
218 .platform_data = &cf_data, 221 .platform_data = &cf_data,
219 }, 222 },
220 .resource = at91_cf_resources, 223 .resource = cf_resources,
221 .num_resources = ARRAY_SIZE(at91_cf_resources), 224 .num_resources = ARRAY_SIZE(cf_resources),
222}; 225};
223 226
224void __init at91_add_device_cf(struct at91_cf_data *data) 227void __init at91_add_device_cf(struct at91_cf_data *data)
225{ 228{
229 unsigned int csa;
230
226 if (!data) 231 if (!data)
227 return; 232 return;
228 233
234 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
235
236 /* CF takes over CS4, CS5, CS6 */
237 csa = at91_sys_read(AT91_EBI_CSA);
238 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
239
240 /*
241 * Static memory controller timing adjustments.
242 * REVISIT: these timings are in terms of MCK cycles, so
243 * when MCK changes (cpufreq etc) so must these values...
244 */
245 at91_sys_write(AT91_SMC_CSR(4),
246 AT91_SMC_ACSS_STD
247 | AT91_SMC_DBW_16
248 | AT91_SMC_BAT
249 | AT91_SMC_WSEN
250 | AT91_SMC_NWS_(32) /* wait states */
251 | AT91_SMC_RWSETUP_(6) /* setup time */
252 | AT91_SMC_RWHOLD_(4) /* hold time */
253 );
254
229 /* input/irq */ 255 /* input/irq */
230 if (data->irq_pin) { 256 if (data->irq_pin) {
231 at91_set_gpio_input(data->irq_pin, 1); 257 at91_set_gpio_input(data->irq_pin, 1);
@@ -245,6 +271,9 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
245 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ 271 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
246 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ 272 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
247 273
274 /* nWAIT is _not_ a default setting */
275 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
276
248 cf_data = *data; 277 cf_data = *data;
249 platform_device_register(&at91rm9200_cf_device); 278 platform_device_register(&at91rm9200_cf_device);
250} 279}
@@ -257,11 +286,11 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
257 * MMC / SD 286 * MMC / SD
258 * -------------------------------------------------------------------- */ 287 * -------------------------------------------------------------------- */
259 288
260#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE) 289#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
261static u64 mmc_dmamask = 0xffffffffUL; 290static u64 mmc_dmamask = 0xffffffffUL;
262static struct at91_mmc_data mmc_data; 291static struct at91_mmc_data mmc_data;
263 292
264static struct resource at91_mmc_resources[] = { 293static struct resource mmc_resources[] = {
265 [0] = { 294 [0] = {
266 .start = AT91RM9200_BASE_MCI, 295 .start = AT91RM9200_BASE_MCI,
267 .end = AT91RM9200_BASE_MCI + SZ_16K - 1, 296 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
@@ -282,8 +311,8 @@ static struct platform_device at91rm9200_mmc_device = {
282 .coherent_dma_mask = 0xffffffff, 311 .coherent_dma_mask = 0xffffffff,
283 .platform_data = &mmc_data, 312 .platform_data = &mmc_data,
284 }, 313 },
285 .resource = at91_mmc_resources, 314 .resource = mmc_resources,
286 .num_resources = ARRAY_SIZE(at91_mmc_resources), 315 .num_resources = ARRAY_SIZE(mmc_resources),
287}; 316};
288 317
289void __init at91_add_device_mmc(struct at91_mmc_data *data) 318void __init at91_add_device_mmc(struct at91_mmc_data *data)
@@ -298,31 +327,33 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
298 } 327 }
299 if (data->wp_pin) 328 if (data->wp_pin)
300 at91_set_gpio_input(data->wp_pin, 1); 329 at91_set_gpio_input(data->wp_pin, 1);
330 if (data->vcc_pin)
331 at91_set_gpio_output(data->vcc_pin, 0);
301 332
302 /* CLK */ 333 /* CLK */
303 at91_set_A_periph(AT91_PIN_PA27, 0); 334 at91_set_A_periph(AT91_PIN_PA27, 0);
304 335
305 if (data->is_b) { 336 if (data->slot_b) {
306 /* CMD */ 337 /* CMD */
307 at91_set_B_periph(AT91_PIN_PA8, 0); 338 at91_set_B_periph(AT91_PIN_PA8, 1);
308 339
309 /* DAT0, maybe DAT1..DAT3 */ 340 /* DAT0, maybe DAT1..DAT3 */
310 at91_set_B_periph(AT91_PIN_PA9, 0); 341 at91_set_B_periph(AT91_PIN_PA9, 1);
311 if (data->wire4) { 342 if (data->wire4) {
312 at91_set_B_periph(AT91_PIN_PA10, 0); 343 at91_set_B_periph(AT91_PIN_PA10, 1);
313 at91_set_B_periph(AT91_PIN_PA11, 0); 344 at91_set_B_periph(AT91_PIN_PA11, 1);
314 at91_set_B_periph(AT91_PIN_PA12, 0); 345 at91_set_B_periph(AT91_PIN_PA12, 1);
315 } 346 }
316 } else { 347 } else {
317 /* CMD */ 348 /* CMD */
318 at91_set_A_periph(AT91_PIN_PA28, 0); 349 at91_set_A_periph(AT91_PIN_PA28, 1);
319 350
320 /* DAT0, maybe DAT1..DAT3 */ 351 /* DAT0, maybe DAT1..DAT3 */
321 at91_set_A_periph(AT91_PIN_PA29, 0); 352 at91_set_A_periph(AT91_PIN_PA29, 1);
322 if (data->wire4) { 353 if (data->wire4) {
323 at91_set_B_periph(AT91_PIN_PB3, 0); 354 at91_set_B_periph(AT91_PIN_PB3, 1);
324 at91_set_B_periph(AT91_PIN_PB4, 0); 355 at91_set_B_periph(AT91_PIN_PB4, 1);
325 at91_set_B_periph(AT91_PIN_PB5, 0); 356 at91_set_B_periph(AT91_PIN_PB5, 1);
326 } 357 }
327 } 358 }
328 359
@@ -341,29 +372,45 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
341#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) 372#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
342static struct at91_nand_data nand_data; 373static struct at91_nand_data nand_data;
343 374
344static struct resource at91_nand_resources[] = { 375#define NAND_BASE AT91_CHIPSELECT_3
376
377static struct resource nand_resources[] = {
345 { 378 {
346 .start = AT91_SMARTMEDIA_BASE, 379 .start = NAND_BASE,
347 .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1, 380 .end = NAND_BASE + SZ_8M - 1,
348 .flags = IORESOURCE_MEM, 381 .flags = IORESOURCE_MEM,
349 } 382 }
350}; 383};
351 384
352static struct platform_device at91_nand_device = { 385static struct platform_device at91rm9200_nand_device = {
353 .name = "at91_nand", 386 .name = "at91_nand",
354 .id = -1, 387 .id = -1,
355 .dev = { 388 .dev = {
356 .platform_data = &nand_data, 389 .platform_data = &nand_data,
357 }, 390 },
358 .resource = at91_nand_resources, 391 .resource = nand_resources,
359 .num_resources = ARRAY_SIZE(at91_nand_resources), 392 .num_resources = ARRAY_SIZE(nand_resources),
360}; 393};
361 394
362void __init at91_add_device_nand(struct at91_nand_data *data) 395void __init at91_add_device_nand(struct at91_nand_data *data)
363{ 396{
397 unsigned int csa;
398
364 if (!data) 399 if (!data)
365 return; 400 return;
366 401
402 /* enable the address range of CS3 */
403 csa = at91_sys_read(AT91_EBI_CSA);
404 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
405
406 /* set the bus interface characteristics */
407 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
408 | AT91_SMC_NWS_(5)
409 | AT91_SMC_TDF_(1)
410 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
411 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
412 );
413
367 /* enable pin */ 414 /* enable pin */
368 if (data->enable_pin) 415 if (data->enable_pin)
369 at91_set_gpio_output(data->enable_pin, 1); 416 at91_set_gpio_output(data->enable_pin, 1);
@@ -380,7 +427,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
380 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */ 427 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
381 428
382 nand_data = *data; 429 nand_data = *data;
383 platform_device_register(&at91_nand_device); 430 platform_device_register(&at91rm9200_nand_device);
384} 431}
385#else 432#else
386void __init at91_add_device_nand(struct at91_nand_data *data) {} 433void __init at91_add_device_nand(struct at91_nand_data *data) {}
@@ -392,10 +439,25 @@ void __init at91_add_device_nand(struct at91_nand_data *data) {}
392 * -------------------------------------------------------------------- */ 439 * -------------------------------------------------------------------- */
393 440
394#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) 441#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
442
443static struct resource twi_resources[] = {
444 [0] = {
445 .start = AT91RM9200_BASE_TWI,
446 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
447 .flags = IORESOURCE_MEM,
448 },
449 [1] = {
450 .start = AT91RM9200_ID_TWI,
451 .end = AT91RM9200_ID_TWI,
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
395static struct platform_device at91rm9200_twi_device = { 456static struct platform_device at91rm9200_twi_device = {
396 .name = "at91_i2c", 457 .name = "at91_i2c",
397 .id = -1, 458 .id = -1,
398 .num_resources = 0, 459 .resource = twi_resources,
460 .num_resources = ARRAY_SIZE(twi_resources),
399}; 461};
400 462
401void __init at91_add_device_i2c(void) 463void __init at91_add_device_i2c(void)
@@ -421,7 +483,7 @@ void __init at91_add_device_i2c(void) {}
421#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) 483#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
422static u64 spi_dmamask = 0xffffffffUL; 484static u64 spi_dmamask = 0xffffffffUL;
423 485
424static struct resource at91_spi_resources[] = { 486static struct resource spi_resources[] = {
425 [0] = { 487 [0] = {
426 .start = AT91RM9200_BASE_SPI, 488 .start = AT91RM9200_BASE_SPI,
427 .end = AT91RM9200_BASE_SPI + SZ_16K - 1, 489 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
@@ -438,14 +500,14 @@ static struct platform_device at91rm9200_spi_device = {
438 .name = "at91_spi", 500 .name = "at91_spi",
439 .id = 0, 501 .id = 0,
440 .dev = { 502 .dev = {
441 .dma_mask = &spi_dmamask, 503 .dma_mask = &spi_dmamask,
442 .coherent_dma_mask = 0xffffffff, 504 .coherent_dma_mask = 0xffffffff,
443 }, 505 },
444 .resource = at91_spi_resources, 506 .resource = spi_resources,
445 .num_resources = ARRAY_SIZE(at91_spi_resources), 507 .num_resources = ARRAY_SIZE(spi_resources),
446}; 508};
447 509
448static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; 510static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
449 511
450void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) 512void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
451{ 513{
@@ -461,7 +523,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
461 if (devices[i].controller_data) 523 if (devices[i].controller_data)
462 cs_pin = (unsigned long) devices[i].controller_data; 524 cs_pin = (unsigned long) devices[i].controller_data;
463 else 525 else
464 cs_pin = at91_spi_standard_cs[devices[i].chip_select]; 526 cs_pin = spi_standard_cs[devices[i].chip_select];
465 527
466#ifdef CONFIG_SPI_AT91_MANUAL_CS 528#ifdef CONFIG_SPI_AT91_MANUAL_CS
467 at91_set_gpio_output(cs_pin, 1); 529 at91_set_gpio_output(cs_pin, 1);
@@ -474,7 +536,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
474 } 536 }
475 537
476 spi_register_board_info(devices, nr_devices); 538 spi_register_board_info(devices, nr_devices);
477 at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi"); 539 at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
478 platform_device_register(&at91rm9200_spi_device); 540 platform_device_register(&at91rm9200_spi_device);
479} 541}
480#else 542#else
@@ -486,7 +548,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
486 * RTC 548 * RTC
487 * -------------------------------------------------------------------- */ 549 * -------------------------------------------------------------------- */
488 550
489#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE) 551#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
490static struct platform_device at91rm9200_rtc_device = { 552static struct platform_device at91rm9200_rtc_device = {
491 .name = "at91_rtc", 553 .name = "at91_rtc",
492 .id = -1, 554 .id = -1,
@@ -506,7 +568,7 @@ static void __init at91_add_device_rtc(void) {}
506 * Watchdog 568 * Watchdog
507 * -------------------------------------------------------------------- */ 569 * -------------------------------------------------------------------- */
508 570
509#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE) 571#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
510static struct platform_device at91rm9200_wdt_device = { 572static struct platform_device at91rm9200_wdt_device = {
511 .name = "at91_wdt", 573 .name = "at91_wdt",
512 .id = -1, 574 .id = -1,
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c
index 07c9cea8961d..b999e192a7e9 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200_time.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c
@@ -30,6 +30,8 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
32 32
33#include <asm/arch/at91_st.h>
34
33static unsigned long last_crtr; 35static unsigned long last_crtr;
34 36
35/* 37/*
@@ -99,6 +101,9 @@ void at91rm9200_timer_reset(void)
99 /* Set Period Interval timer */ 101 /* Set Period Interval timer */
100 at91_sys_write(AT91_ST_PIMR, LATCH); 102 at91_sys_write(AT91_ST_PIMR, LATCH);
101 103
104 /* Clear any pending interrupts */
105 (void) at91_sys_read(AT91_ST_SR);
106
102 /* Enable Period Interval Timer interrupt */ 107 /* Enable Period Interval Timer interrupt */
103 at91_sys_write(AT91_ST_IER, AT91_ST_PITS); 108 at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
104} 109}
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c
new file mode 100644
index 000000000000..203f073a53e6
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260.c
@@ -0,0 +1,294 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9260.c
3 *
4 * Copyright (C) 2006 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9260_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
32 .length = AT91SAM9260_SRAM0_SIZE,
33 .type = MT_DEVICE,
34 }, {
35 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
36 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
37 .length = AT91SAM9260_SRAM1_SIZE,
38 .type = MT_DEVICE,
39 },
40};
41
42/* --------------------------------------------------------------------
43 * Clocks
44 * -------------------------------------------------------------------- */
45
46/*
47 * The peripheral clocks.
48 */
49static struct clk pioA_clk = {
50 .name = "pioA_clk",
51 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioB_clk = {
55 .name = "pioB_clk",
56 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk pioC_clk = {
60 .name = "pioC_clk",
61 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk adc_clk = {
65 .name = "adc_clk",
66 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart0_clk = {
70 .name = "usart0_clk",
71 .pmc_mask = 1 << AT91SAM9260_ID_US0,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk usart1_clk = {
75 .name = "usart1_clk",
76 .pmc_mask = 1 << AT91SAM9260_ID_US1,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk usart2_clk = {
80 .name = "usart2_clk",
81 .pmc_mask = 1 << AT91SAM9260_ID_US2,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk mmc_clk = {
85 .name = "mci_clk",
86 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk udc_clk = {
90 .name = "udc_clk",
91 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk twi_clk = {
95 .name = "twi_clk",
96 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk spi0_clk = {
100 .name = "spi0_clk",
101 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk spi1_clk = {
105 .name = "spi1_clk",
106 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109static struct clk ohci_clk = {
110 .name = "ohci_clk",
111 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
112 .type = CLK_TYPE_PERIPHERAL,
113};
114static struct clk ether_clk = {
115 .name = "ether_clk",
116 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
117 .type = CLK_TYPE_PERIPHERAL,
118};
119static struct clk isi_clk = {
120 .name = "isi_clk",
121 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
122 .type = CLK_TYPE_PERIPHERAL,
123};
124static struct clk usart3_clk = {
125 .name = "usart3_clk",
126 .pmc_mask = 1 << AT91SAM9260_ID_US3,
127 .type = CLK_TYPE_PERIPHERAL,
128};
129static struct clk usart4_clk = {
130 .name = "usart4_clk",
131 .pmc_mask = 1 << AT91SAM9260_ID_US4,
132 .type = CLK_TYPE_PERIPHERAL,
133};
134static struct clk usart5_clk = {
135 .name = "usart5_clk",
136 .pmc_mask = 1 << AT91SAM9260_ID_US5,
137 .type = CLK_TYPE_PERIPHERAL,
138};
139
140static struct clk *periph_clocks[] __initdata = {
141 &pioA_clk,
142 &pioB_clk,
143 &pioC_clk,
144 &adc_clk,
145 &usart0_clk,
146 &usart1_clk,
147 &usart2_clk,
148 &mmc_clk,
149 &udc_clk,
150 &twi_clk,
151 &spi0_clk,
152 &spi1_clk,
153 // ssc
154 // tc0 .. tc2
155 &ohci_clk,
156 &ether_clk,
157 &isi_clk,
158 &usart3_clk,
159 &usart4_clk,
160 &usart5_clk,
161 // tc3 .. tc5
162 // irq0 .. irq2
163};
164
165/*
166 * The two programmable clocks.
167 * You must configure pin multiplexing to bring these signals out.
168 */
169static struct clk pck0 = {
170 .name = "pck0",
171 .pmc_mask = AT91_PMC_PCK0,
172 .type = CLK_TYPE_PROGRAMMABLE,
173 .id = 0,
174};
175static struct clk pck1 = {
176 .name = "pck1",
177 .pmc_mask = AT91_PMC_PCK1,
178 .type = CLK_TYPE_PROGRAMMABLE,
179 .id = 1,
180};
181
182static void __init at91sam9260_register_clocks(void)
183{
184 int i;
185
186 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
187 clk_register(periph_clocks[i]);
188
189 clk_register(&pck0);
190 clk_register(&pck1);
191}
192
193/* --------------------------------------------------------------------
194 * GPIO
195 * -------------------------------------------------------------------- */
196
197static struct at91_gpio_bank at91sam9260_gpio[] = {
198 {
199 .id = AT91SAM9260_ID_PIOA,
200 .offset = AT91_PIOA,
201 .clock = &pioA_clk,
202 }, {
203 .id = AT91SAM9260_ID_PIOB,
204 .offset = AT91_PIOB,
205 .clock = &pioB_clk,
206 }, {
207 .id = AT91SAM9260_ID_PIOC,
208 .offset = AT91_PIOC,
209 .clock = &pioC_clk,
210 }
211};
212
213static void at91sam9260_reset(void)
214{
215#warning "Implement CPU reset"
216}
217
218
219/* --------------------------------------------------------------------
220 * AT91SAM9260 processor initialization
221 * -------------------------------------------------------------------- */
222
223void __init at91sam9260_initialize(unsigned long main_clock)
224{
225 /* Map peripherals */
226 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
227
228 at91_arch_reset = at91sam9260_reset;
229 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
230 | (1 << AT91SAM9260_ID_IRQ2);
231
232 /* Init clock subsystem */
233 at91_clock_init(main_clock);
234
235 /* Register the processor-specific clocks */
236 at91sam9260_register_clocks();
237
238 /* Register GPIO subsystem */
239 at91_gpio_init(at91sam9260_gpio, 3);
240}
241
242/* --------------------------------------------------------------------
243 * Interrupt initialization
244 * -------------------------------------------------------------------- */
245
246/*
247 * The default interrupt priority levels (0 = lowest, 7 = highest).
248 */
249static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
250 7, /* Advanced Interrupt Controller */
251 7, /* System Peripherals */
252 0, /* Parallel IO Controller A */
253 0, /* Parallel IO Controller B */
254 0, /* Parallel IO Controller C */
255 0, /* Analog-to-Digital Converter */
256 6, /* USART 0 */
257 6, /* USART 1 */
258 6, /* USART 2 */
259 0, /* Multimedia Card Interface */
260 4, /* USB Device Port */
261 0, /* Two-Wire Interface */
262 6, /* Serial Peripheral Interface 0 */
263 6, /* Serial Peripheral Interface 1 */
264 5, /* Serial Synchronous Controller */
265 0,
266 0,
267 0, /* Timer Counter 0 */
268 0, /* Timer Counter 1 */
269 0, /* Timer Counter 2 */
270 3, /* USB Host port */
271 3, /* Ethernet */
272 0, /* Image Sensor Interface */
273 6, /* USART 3 */
274 6, /* USART 4 */
275 6, /* USART 5 */
276 0, /* Timer Counter 3 */
277 0, /* Timer Counter 4 */
278 0, /* Timer Counter 5 */
279 0, /* Advanced Interrupt Controller */
280 0, /* Advanced Interrupt Controller */
281 0, /* Advanced Interrupt Controller */
282};
283
284void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
285{
286 if (!priority)
287 priority = at91sam9260_default_irq_priority;
288
289 /* Initialize the AIC interrupt controller */
290 at91_aic_init(priority);
291
292 /* Enable GPIO interrupts */
293 at91_gpio_irq_setup();
294}
diff --git a/arch/arm/mach-at91rm9200/at91sam9260_devices.c b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
new file mode 100644
index 000000000000..a6c596dc4516
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
@@ -0,0 +1,866 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/platform_device.h>
16
17#include <asm/arch/board.h>
18#include <asm/arch/gpio.h>
19#include <asm/arch/at91sam9260.h>
20#include <asm/arch/at91sam926x_mc.h>
21
22#include "generic.h"
23
24#define SZ_512 0x00000200
25#define SZ_256 0x00000100
26#define SZ_16 0x00000010
27
28/* --------------------------------------------------------------------
29 * USB Host
30 * -------------------------------------------------------------------- */
31
32#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33static u64 ohci_dmamask = 0xffffffffUL;
34static struct at91_usbh_data usbh_data;
35
36static struct resource usbh_resources[] = {
37 [0] = {
38 .start = AT91SAM9260_UHP_BASE,
39 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = AT91SAM9260_ID_UHP,
44 .end = AT91SAM9260_ID_UHP,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct platform_device at91_usbh_device = {
50 .name = "at91_ohci",
51 .id = -1,
52 .dev = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data,
56 },
57 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(usbh_resources),
59};
60
61void __init at91_add_device_usbh(struct at91_usbh_data *data)
62{
63 if (!data)
64 return;
65
66 usbh_data = *data;
67 platform_device_register(&at91_usbh_device);
68}
69#else
70void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71#endif
72
73
74/* --------------------------------------------------------------------
75 * USB Device (Gadget)
76 * -------------------------------------------------------------------- */
77
78#ifdef CONFIG_USB_GADGET_AT91
79static struct at91_udc_data udc_data;
80
81static struct resource udc_resources[] = {
82 [0] = {
83 .start = AT91SAM9260_BASE_UDP,
84 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = AT91SAM9260_ID_UDP,
89 .end = AT91SAM9260_ID_UDP,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94static struct platform_device at91_udc_device = {
95 .name = "at91_udc",
96 .id = -1,
97 .dev = {
98 .platform_data = &udc_data,
99 },
100 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(udc_resources),
102};
103
104void __init at91_add_device_udc(struct at91_udc_data *data)
105{
106 if (!data)
107 return;
108
109 if (data->vbus_pin) {
110 at91_set_gpio_input(data->vbus_pin, 0);
111 at91_set_deglitch(data->vbus_pin, 1);
112 }
113
114 /* Pullup pin is handled internally by USB device peripheral */
115
116 udc_data = *data;
117 platform_device_register(&at91_udc_device);
118}
119#else
120void __init at91_add_device_udc(struct at91_udc_data *data) {}
121#endif
122
123
124/* --------------------------------------------------------------------
125 * Ethernet
126 * -------------------------------------------------------------------- */
127
128#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
129static u64 eth_dmamask = 0xffffffffUL;
130static struct eth_platform_data eth_data;
131
132static struct resource eth_resources[] = {
133 [0] = {
134 .start = AT91SAM9260_BASE_EMAC,
135 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = AT91SAM9260_ID_EMAC,
140 .end = AT91SAM9260_ID_EMAC,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145static struct platform_device at91sam9260_eth_device = {
146 .name = "macb",
147 .id = -1,
148 .dev = {
149 .dma_mask = &eth_dmamask,
150 .coherent_dma_mask = 0xffffffff,
151 .platform_data = &eth_data,
152 },
153 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(eth_resources),
155};
156
157void __init at91_add_device_eth(struct eth_platform_data *data)
158{
159 if (!data)
160 return;
161
162 if (data->phy_irq_pin) {
163 at91_set_gpio_input(data->phy_irq_pin, 0);
164 at91_set_deglitch(data->phy_irq_pin, 1);
165 }
166
167 /* Pins used for MII and RMII */
168 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
169 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
170 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
171 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
172 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
173 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
174 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
175 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
176 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
177 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
178
179 if (!data->is_rmii) {
180 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
181 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
182 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
183 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
184 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
185 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
186 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
187 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
188 }
189
190 eth_data = *data;
191 platform_device_register(&at91sam9260_eth_device);
192}
193#else
194void __init at91_add_device_eth(struct eth_platform_data *data) {}
195#endif
196
197
198/* --------------------------------------------------------------------
199 * MMC / SD
200 * -------------------------------------------------------------------- */
201
202#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
203static u64 mmc_dmamask = 0xffffffffUL;
204static struct at91_mmc_data mmc_data;
205
206static struct resource mmc_resources[] = {
207 [0] = {
208 .start = AT91SAM9260_BASE_MCI,
209 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
210 .flags = IORESOURCE_MEM,
211 },
212 [1] = {
213 .start = AT91SAM9260_ID_MCI,
214 .end = AT91SAM9260_ID_MCI,
215 .flags = IORESOURCE_IRQ,
216 },
217};
218
219static struct platform_device at91sam9260_mmc_device = {
220 .name = "at91_mci",
221 .id = -1,
222 .dev = {
223 .dma_mask = &mmc_dmamask,
224 .coherent_dma_mask = 0xffffffff,
225 .platform_data = &mmc_data,
226 },
227 .resource = mmc_resources,
228 .num_resources = ARRAY_SIZE(mmc_resources),
229};
230
231void __init at91_add_device_mmc(struct at91_mmc_data *data)
232{
233 if (!data)
234 return;
235
236 /* input/irq */
237 if (data->det_pin) {
238 at91_set_gpio_input(data->det_pin, 1);
239 at91_set_deglitch(data->det_pin, 1);
240 }
241 if (data->wp_pin)
242 at91_set_gpio_input(data->wp_pin, 1);
243 if (data->vcc_pin)
244 at91_set_gpio_output(data->vcc_pin, 0);
245
246 /* CLK */
247 at91_set_A_periph(AT91_PIN_PA8, 0);
248
249 if (data->slot_b) {
250 /* CMD */
251 at91_set_B_periph(AT91_PIN_PA1, 1);
252
253 /* DAT0, maybe DAT1..DAT3 */
254 at91_set_B_periph(AT91_PIN_PA0, 1);
255 if (data->wire4) {
256 at91_set_B_periph(AT91_PIN_PA5, 1);
257 at91_set_B_periph(AT91_PIN_PA4, 1);
258 at91_set_B_periph(AT91_PIN_PA3, 1);
259 }
260 } else {
261 /* CMD */
262 at91_set_A_periph(AT91_PIN_PA7, 1);
263
264 /* DAT0, maybe DAT1..DAT3 */
265 at91_set_A_periph(AT91_PIN_PA6, 1);
266 if (data->wire4) {
267 at91_set_A_periph(AT91_PIN_PA9, 1);
268 at91_set_A_periph(AT91_PIN_PA10, 1);
269 at91_set_A_periph(AT91_PIN_PA11, 1);
270 }
271 }
272
273 mmc_data = *data;
274 platform_device_register(&at91sam9260_mmc_device);
275}
276#else
277void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
278#endif
279
280
281/* --------------------------------------------------------------------
282 * NAND / SmartMedia
283 * -------------------------------------------------------------------- */
284
285#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
286static struct at91_nand_data nand_data;
287
288#define NAND_BASE AT91_CHIPSELECT_3
289
290static struct resource nand_resources[] = {
291 {
292 .start = NAND_BASE,
293 .end = NAND_BASE + SZ_8M - 1,
294 .flags = IORESOURCE_MEM,
295 }
296};
297
298static struct platform_device at91sam9260_nand_device = {
299 .name = "at91_nand",
300 .id = -1,
301 .dev = {
302 .platform_data = &nand_data,
303 },
304 .resource = nand_resources,
305 .num_resources = ARRAY_SIZE(nand_resources),
306};
307
308void __init at91_add_device_nand(struct at91_nand_data *data)
309{
310 unsigned long csa, mode;
311
312 if (!data)
313 return;
314
315 csa = at91_sys_read(AT91_MATRIX_EBICSA);
316 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
317
318 /* set the bus interface characteristics */
319 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
320 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
321
322 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
323 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
324
325 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
326
327 if (data->bus_width_16)
328 mode = AT91_SMC_DBW_16;
329 else
330 mode = AT91_SMC_DBW_8;
331 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
332
333 /* enable pin */
334 if (data->enable_pin)
335 at91_set_gpio_output(data->enable_pin, 1);
336
337 /* ready/busy pin */
338 if (data->rdy_pin)
339 at91_set_gpio_input(data->rdy_pin, 1);
340
341 /* card detect pin */
342 if (data->det_pin)
343 at91_set_gpio_input(data->det_pin, 1);
344
345 nand_data = *data;
346 platform_device_register(&at91sam9260_nand_device);
347}
348#else
349void __init at91_add_device_nand(struct at91_nand_data *data) {}
350#endif
351
352
353/* --------------------------------------------------------------------
354 * TWI (i2c)
355 * -------------------------------------------------------------------- */
356
357#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
358
359static struct resource twi_resources[] = {
360 [0] = {
361 .start = AT91SAM9260_BASE_TWI,
362 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
363 .flags = IORESOURCE_MEM,
364 },
365 [1] = {
366 .start = AT91SAM9260_ID_TWI,
367 .end = AT91SAM9260_ID_TWI,
368 .flags = IORESOURCE_IRQ,
369 },
370};
371
372static struct platform_device at91sam9260_twi_device = {
373 .name = "at91_i2c",
374 .id = -1,
375 .resource = twi_resources,
376 .num_resources = ARRAY_SIZE(twi_resources),
377};
378
379void __init at91_add_device_i2c(void)
380{
381 /* pins used for TWI interface */
382 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
383 at91_set_multi_drive(AT91_PIN_PA23, 1);
384
385 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
386 at91_set_multi_drive(AT91_PIN_PA24, 1);
387
388 platform_device_register(&at91sam9260_twi_device);
389}
390#else
391void __init at91_add_device_i2c(void) {}
392#endif
393
394
395/* --------------------------------------------------------------------
396 * SPI
397 * -------------------------------------------------------------------- */
398
399#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
400static u64 spi_dmamask = 0xffffffffUL;
401
402static struct resource spi0_resources[] = {
403 [0] = {
404 .start = AT91SAM9260_BASE_SPI0,
405 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
406 .flags = IORESOURCE_MEM,
407 },
408 [1] = {
409 .start = AT91SAM9260_ID_SPI0,
410 .end = AT91SAM9260_ID_SPI0,
411 .flags = IORESOURCE_IRQ,
412 },
413};
414
415static struct platform_device at91sam9260_spi0_device = {
416 .name = "atmel_spi",
417 .id = 0,
418 .dev = {
419 .dma_mask = &spi_dmamask,
420 .coherent_dma_mask = 0xffffffff,
421 },
422 .resource = spi0_resources,
423 .num_resources = ARRAY_SIZE(spi0_resources),
424};
425
426static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
427
428static struct resource spi1_resources[] = {
429 [0] = {
430 .start = AT91SAM9260_BASE_SPI1,
431 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = AT91SAM9260_ID_SPI1,
436 .end = AT91SAM9260_ID_SPI1,
437 .flags = IORESOURCE_IRQ,
438 },
439};
440
441static struct platform_device at91sam9260_spi1_device = {
442 .name = "atmel_spi",
443 .id = 1,
444 .dev = {
445 .dma_mask = &spi_dmamask,
446 .coherent_dma_mask = 0xffffffff,
447 },
448 .resource = spi1_resources,
449 .num_resources = ARRAY_SIZE(spi1_resources),
450};
451
452static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
453
454void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
455{
456 int i;
457 unsigned long cs_pin;
458 short enable_spi0 = 0;
459 short enable_spi1 = 0;
460
461 /* Choose SPI chip-selects */
462 for (i = 0; i < nr_devices; i++) {
463 if (devices[i].controller_data)
464 cs_pin = (unsigned long) devices[i].controller_data;
465 else if (devices[i].bus_num == 0)
466 cs_pin = spi0_standard_cs[devices[i].chip_select];
467 else
468 cs_pin = spi1_standard_cs[devices[i].chip_select];
469
470 if (devices[i].bus_num == 0)
471 enable_spi0 = 1;
472 else
473 enable_spi1 = 1;
474
475 /* enable chip-select pin */
476 at91_set_gpio_output(cs_pin, 1);
477
478 /* pass chip-select pin to driver */
479 devices[i].controller_data = (void *) cs_pin;
480 }
481
482 spi_register_board_info(devices, nr_devices);
483
484 /* Configure SPI bus(es) */
485 if (enable_spi0) {
486 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
487 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
488 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
489
490 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
491 platform_device_register(&at91sam9260_spi0_device);
492 }
493 if (enable_spi1) {
494 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
495 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
496 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
497
498 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
499 platform_device_register(&at91sam9260_spi1_device);
500 }
501}
502#else
503void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
504#endif
505
506
507/* --------------------------------------------------------------------
508 * LEDs
509 * -------------------------------------------------------------------- */
510
511#if defined(CONFIG_LEDS)
512u8 at91_leds_cpu;
513u8 at91_leds_timer;
514
515void __init at91_init_leds(u8 cpu_led, u8 timer_led)
516{
517 at91_leds_cpu = cpu_led;
518 at91_leds_timer = timer_led;
519}
520#else
521void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
522#endif
523
524
525/* --------------------------------------------------------------------
526 * UART
527 * -------------------------------------------------------------------- */
528#if defined(CONFIG_SERIAL_ATMEL)
529static struct resource dbgu_resources[] = {
530 [0] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = AT91_ID_SYS,
537 .end = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct atmel_uart_data dbgu_data = {
543 .use_dma_tx = 0,
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
546};
547
548static struct platform_device at91sam9260_dbgu_device = {
549 .name = "atmel_usart",
550 .id = 0,
551 .dev = {
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
554 },
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
557};
558
559static inline void configure_dbgu_pins(void)
560{
561 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
563}
564
565static struct resource uart0_resources[] = {
566 [0] = {
567 .start = AT91SAM9260_BASE_US0,
568 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = AT91SAM9260_ID_US0,
573 .end = AT91SAM9260_ID_US0,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct atmel_uart_data uart0_data = {
579 .use_dma_tx = 1,
580 .use_dma_rx = 1,
581};
582
583static struct platform_device at91sam9260_uart0_device = {
584 .name = "atmel_usart",
585 .id = 1,
586 .dev = {
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
589 },
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
592};
593
594static inline void configure_usart0_pins(void)
595{
596 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
600 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
601 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
602 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
603 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
604}
605
606static struct resource uart1_resources[] = {
607 [0] = {
608 .start = AT91SAM9260_BASE_US1,
609 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
610 .flags = IORESOURCE_MEM,
611 },
612 [1] = {
613 .start = AT91SAM9260_ID_US1,
614 .end = AT91SAM9260_ID_US1,
615 .flags = IORESOURCE_IRQ,
616 },
617};
618
619static struct atmel_uart_data uart1_data = {
620 .use_dma_tx = 1,
621 .use_dma_rx = 1,
622};
623
624static struct platform_device at91sam9260_uart1_device = {
625 .name = "atmel_usart",
626 .id = 2,
627 .dev = {
628 .platform_data = &uart1_data,
629 .coherent_dma_mask = 0xffffffff,
630 },
631 .resource = uart1_resources,
632 .num_resources = ARRAY_SIZE(uart1_resources),
633};
634
635static inline void configure_usart1_pins(void)
636{
637 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
638 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
639 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
640 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
641}
642
643static struct resource uart2_resources[] = {
644 [0] = {
645 .start = AT91SAM9260_BASE_US2,
646 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
647 .flags = IORESOURCE_MEM,
648 },
649 [1] = {
650 .start = AT91SAM9260_ID_US2,
651 .end = AT91SAM9260_ID_US2,
652 .flags = IORESOURCE_IRQ,
653 },
654};
655
656static struct atmel_uart_data uart2_data = {
657 .use_dma_tx = 1,
658 .use_dma_rx = 1,
659};
660
661static struct platform_device at91sam9260_uart2_device = {
662 .name = "atmel_usart",
663 .id = 3,
664 .dev = {
665 .platform_data = &uart2_data,
666 .coherent_dma_mask = 0xffffffff,
667 },
668 .resource = uart2_resources,
669 .num_resources = ARRAY_SIZE(uart2_resources),
670};
671
672static inline void configure_usart2_pins(void)
673{
674 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
675 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
676}
677
678static struct resource uart3_resources[] = {
679 [0] = {
680 .start = AT91SAM9260_BASE_US3,
681 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
682 .flags = IORESOURCE_MEM,
683 },
684 [1] = {
685 .start = AT91SAM9260_ID_US3,
686 .end = AT91SAM9260_ID_US3,
687 .flags = IORESOURCE_IRQ,
688 },
689};
690
691static struct atmel_uart_data uart3_data = {
692 .use_dma_tx = 1,
693 .use_dma_rx = 1,
694};
695
696static struct platform_device at91sam9260_uart3_device = {
697 .name = "atmel_usart",
698 .id = 4,
699 .dev = {
700 .platform_data = &uart3_data,
701 .coherent_dma_mask = 0xffffffff,
702 },
703 .resource = uart3_resources,
704 .num_resources = ARRAY_SIZE(uart3_resources),
705};
706
707static inline void configure_usart3_pins(void)
708{
709 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
710 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
711}
712
713static struct resource uart4_resources[] = {
714 [0] = {
715 .start = AT91SAM9260_BASE_US4,
716 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
717 .flags = IORESOURCE_MEM,
718 },
719 [1] = {
720 .start = AT91SAM9260_ID_US4,
721 .end = AT91SAM9260_ID_US4,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726static struct atmel_uart_data uart4_data = {
727 .use_dma_tx = 1,
728 .use_dma_rx = 1,
729};
730
731static struct platform_device at91sam9260_uart4_device = {
732 .name = "atmel_usart",
733 .id = 5,
734 .dev = {
735 .platform_data = &uart4_data,
736 .coherent_dma_mask = 0xffffffff,
737 },
738 .resource = uart4_resources,
739 .num_resources = ARRAY_SIZE(uart4_resources),
740};
741
742static inline void configure_usart4_pins(void)
743{
744 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
745 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
746}
747
748static struct resource uart5_resources[] = {
749 [0] = {
750 .start = AT91SAM9260_BASE_US5,
751 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
752 .flags = IORESOURCE_MEM,
753 },
754 [1] = {
755 .start = AT91SAM9260_ID_US5,
756 .end = AT91SAM9260_ID_US5,
757 .flags = IORESOURCE_IRQ,
758 },
759};
760
761static struct atmel_uart_data uart5_data = {
762 .use_dma_tx = 1,
763 .use_dma_rx = 1,
764};
765
766static struct platform_device at91sam9260_uart5_device = {
767 .name = "atmel_usart",
768 .id = 6,
769 .dev = {
770 .platform_data = &uart5_data,
771 .coherent_dma_mask = 0xffffffff,
772 },
773 .resource = uart5_resources,
774 .num_resources = ARRAY_SIZE(uart5_resources),
775};
776
777static inline void configure_usart5_pins(void)
778{
779 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
780 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
781}
782
783struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
784struct platform_device *atmel_default_console_device; /* the serial console device */
785
786void __init at91_init_serial(struct at91_uart_config *config)
787{
788 int i;
789
790 /* Fill in list of supported UARTs */
791 for (i = 0; i < config->nr_tty; i++) {
792 switch (config->tty_map[i]) {
793 case 0:
794 configure_usart0_pins();
795 at91_uarts[i] = &at91sam9260_uart0_device;
796 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
797 break;
798 case 1:
799 configure_usart1_pins();
800 at91_uarts[i] = &at91sam9260_uart1_device;
801 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
802 break;
803 case 2:
804 configure_usart2_pins();
805 at91_uarts[i] = &at91sam9260_uart2_device;
806 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
807 break;
808 case 3:
809 configure_usart3_pins();
810 at91_uarts[i] = &at91sam9260_uart3_device;
811 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
812 break;
813 case 4:
814 configure_usart4_pins();
815 at91_uarts[i] = &at91sam9260_uart4_device;
816 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
817 break;
818 case 5:
819 configure_usart5_pins();
820 at91_uarts[i] = &at91sam9260_uart5_device;
821 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
822 break;
823 case 6:
824 configure_dbgu_pins();
825 at91_uarts[i] = &at91sam9260_dbgu_device;
826 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
827 break;
828 default:
829 continue;
830 }
831 at91_uarts[i]->id = i; /* update ID number to mapped ID */
832 }
833
834 /* Set serial console device */
835 if (config->console_tty < ATMEL_MAX_UART)
836 atmel_default_console_device = at91_uarts[config->console_tty];
837 if (!atmel_default_console_device)
838 printk(KERN_INFO "AT91: No default serial console defined.\n");
839}
840
841void __init at91_add_device_serial(void)
842{
843 int i;
844
845 for (i = 0; i < ATMEL_MAX_UART; i++) {
846 if (at91_uarts[i])
847 platform_device_register(at91_uarts[i]);
848 }
849}
850#else
851void __init at91_init_serial(struct at91_uart_config *config) {}
852void __init at91_add_device_serial(void) {}
853#endif
854
855
856/* -------------------------------------------------------------------- */
857/*
858 * These devices are always present and don't need any board-specific
859 * setup.
860 */
861static int __init at91_add_standard_devices(void)
862{
863 return 0;
864}
865
866arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c
new file mode 100644
index 000000000000..5a82f35da2e9
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261.c
@@ -0,0 +1,289 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9261.c
3 *
4 * Copyright (C) 2005 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9261.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9261_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
32 .length = AT91SAM9261_SRAM_SIZE,
33 .type = MT_DEVICE,
34 },
35};
36
37/* --------------------------------------------------------------------
38 * Clocks
39 * -------------------------------------------------------------------- */
40
41/*
42 * The peripheral clocks.
43 */
44static struct clk pioA_clk = {
45 .name = "pioA_clk",
46 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
47 .type = CLK_TYPE_PERIPHERAL,
48};
49static struct clk pioB_clk = {
50 .name = "pioB_clk",
51 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioC_clk = {
55 .name = "pioC_clk",
56 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk usart0_clk = {
60 .name = "usart0_clk",
61 .pmc_mask = 1 << AT91SAM9261_ID_US0,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk usart1_clk = {
65 .name = "usart1_clk",
66 .pmc_mask = 1 << AT91SAM9261_ID_US1,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart2_clk = {
70 .name = "usart2_clk",
71 .pmc_mask = 1 << AT91SAM9261_ID_US2,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk mmc_clk = {
75 .name = "mci_clk",
76 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk udc_clk = {
80 .name = "udc_clk",
81 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk twi_clk = {
85 .name = "twi_clk",
86 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk spi0_clk = {
90 .name = "spi0_clk",
91 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk spi1_clk = {
95 .name = "spi1_clk",
96 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk ohci_clk = {
100 .name = "ohci_clk",
101 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk lcdc_clk = {
105 .name = "lcdc_clk",
106 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109
110static struct clk *periph_clocks[] __initdata = {
111 &pioA_clk,
112 &pioB_clk,
113 &pioC_clk,
114 &usart0_clk,
115 &usart1_clk,
116 &usart2_clk,
117 &mmc_clk,
118 &udc_clk,
119 &twi_clk,
120 &spi0_clk,
121 &spi1_clk,
122 // ssc 0 .. ssc2
123 // tc0 .. tc2
124 &ohci_clk,
125 &lcdc_clk,
126 // irq0 .. irq2
127};
128
129/*
130 * The four programmable clocks.
131 * You must configure pin multiplexing to bring these signals out.
132 */
133static struct clk pck0 = {
134 .name = "pck0",
135 .pmc_mask = AT91_PMC_PCK0,
136 .type = CLK_TYPE_PROGRAMMABLE,
137 .id = 0,
138};
139static struct clk pck1 = {
140 .name = "pck1",
141 .pmc_mask = AT91_PMC_PCK1,
142 .type = CLK_TYPE_PROGRAMMABLE,
143 .id = 1,
144};
145static struct clk pck2 = {
146 .name = "pck2",
147 .pmc_mask = AT91_PMC_PCK2,
148 .type = CLK_TYPE_PROGRAMMABLE,
149 .id = 2,
150};
151static struct clk pck3 = {
152 .name = "pck3",
153 .pmc_mask = AT91_PMC_PCK3,
154 .type = CLK_TYPE_PROGRAMMABLE,
155 .id = 3,
156};
157
158/* HClocks */
159static struct clk hck0 = {
160 .name = "hck0",
161 .pmc_mask = AT91_PMC_HCK0,
162 .type = CLK_TYPE_SYSTEM,
163 .id = 0,
164};
165static struct clk hck1 = {
166 .name = "hck1",
167 .pmc_mask = AT91_PMC_HCK1,
168 .type = CLK_TYPE_SYSTEM,
169 .id = 1,
170};
171
172static void __init at91sam9261_register_clocks(void)
173{
174 int i;
175
176 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
177 clk_register(periph_clocks[i]);
178
179 clk_register(&pck0);
180 clk_register(&pck1);
181 clk_register(&pck2);
182 clk_register(&pck3);
183
184 clk_register(&hck0);
185 clk_register(&hck1);
186}
187
188/* --------------------------------------------------------------------
189 * GPIO
190 * -------------------------------------------------------------------- */
191
192static struct at91_gpio_bank at91sam9261_gpio[] = {
193 {
194 .id = AT91SAM9261_ID_PIOA,
195 .offset = AT91_PIOA,
196 .clock = &pioA_clk,
197 }, {
198 .id = AT91SAM9261_ID_PIOB,
199 .offset = AT91_PIOB,
200 .clock = &pioB_clk,
201 }, {
202 .id = AT91SAM9261_ID_PIOC,
203 .offset = AT91_PIOC,
204 .clock = &pioC_clk,
205 }
206};
207
208static void at91sam9261_reset(void)
209{
210#warning "Implement CPU reset"
211}
212
213
214/* --------------------------------------------------------------------
215 * AT91SAM9261 processor initialization
216 * -------------------------------------------------------------------- */
217
218void __init at91sam9261_initialize(unsigned long main_clock)
219{
220 /* Map peripherals */
221 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
222
223 at91_arch_reset = at91sam9261_reset;
224 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
225 | (1 << AT91SAM9261_ID_IRQ2);
226
227 /* Init clock subsystem */
228 at91_clock_init(main_clock);
229
230 /* Register the processor-specific clocks */
231 at91sam9261_register_clocks();
232
233 /* Register GPIO subsystem */
234 at91_gpio_init(at91sam9261_gpio, 3);
235}
236
237/* --------------------------------------------------------------------
238 * Interrupt initialization
239 * -------------------------------------------------------------------- */
240
241/*
242 * The default interrupt priority levels (0 = lowest, 7 = highest).
243 */
244static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
245 7, /* Advanced Interrupt Controller */
246 7, /* System Peripherals */
247 0, /* Parallel IO Controller A */
248 0, /* Parallel IO Controller B */
249 0, /* Parallel IO Controller C */
250 0,
251 6, /* USART 0 */
252 6, /* USART 1 */
253 6, /* USART 2 */
254 0, /* Multimedia Card Interface */
255 4, /* USB Device Port */
256 0, /* Two-Wire Interface */
257 6, /* Serial Peripheral Interface 0 */
258 6, /* Serial Peripheral Interface 1 */
259 5, /* Serial Synchronous Controller 0 */
260 5, /* Serial Synchronous Controller 1 */
261 5, /* Serial Synchronous Controller 2 */
262 0, /* Timer Counter 0 */
263 0, /* Timer Counter 1 */
264 0, /* Timer Counter 2 */
265 3, /* USB Host port */
266 3, /* LCD Controller */
267 0,
268 0,
269 0,
270 0,
271 0,
272 0,
273 0,
274 0, /* Advanced Interrupt Controller */
275 0, /* Advanced Interrupt Controller */
276 0, /* Advanced Interrupt Controller */
277};
278
279void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
280{
281 if (!priority)
282 priority = at91sam9261_default_irq_priority;
283
284 /* Initialize the AIC interrupt controller */
285 at91_aic_init(priority);
286
287 /* Enable GPIO interrupts */
288 at91_gpio_irq_setup();
289}
diff --git a/arch/arm/mach-at91rm9200/at91sam9261_devices.c b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
new file mode 100644
index 000000000000..ed1d79081b35
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
@@ -0,0 +1,741 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#include <asm/mach/arch.h>
14#include <asm/mach/map.h>
15
16#include <linux/platform_device.h>
17
18#include <asm/arch/board.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/at91sam9261.h>
21#include <asm/arch/at91sam9261_matrix.h>
22#include <asm/arch/at91sam926x_mc.h>
23
24#include "generic.h"
25
26#define SZ_512 0x00000200
27#define SZ_256 0x00000100
28#define SZ_16 0x00000010
29
30/* --------------------------------------------------------------------
31 * USB Host
32 * -------------------------------------------------------------------- */
33
34#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35static u64 ohci_dmamask = 0xffffffffUL;
36static struct at91_usbh_data usbh_data;
37
38static struct resource usbh_resources[] = {
39 [0] = {
40 .start = AT91SAM9261_UHP_BASE,
41 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = AT91SAM9261_ID_UHP,
46 .end = AT91SAM9261_ID_UHP,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct platform_device at91sam9261_usbh_device = {
52 .name = "at91_ohci",
53 .id = -1,
54 .dev = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &usbh_data,
58 },
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
61};
62
63void __init at91_add_device_usbh(struct at91_usbh_data *data)
64{
65 if (!data)
66 return;
67
68 usbh_data = *data;
69 platform_device_register(&at91sam9261_usbh_device);
70}
71#else
72void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
73#endif
74
75
76/* --------------------------------------------------------------------
77 * USB Device (Gadget)
78 * -------------------------------------------------------------------- */
79
80#ifdef CONFIG_USB_GADGET_AT91
81static struct at91_udc_data udc_data;
82
83static struct resource udc_resources[] = {
84 [0] = {
85 .start = AT91SAM9261_BASE_UDP,
86 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = AT91SAM9261_ID_UDP,
91 .end = AT91SAM9261_ID_UDP,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device at91sam9261_udc_device = {
97 .name = "at91_udc",
98 .id = -1,
99 .dev = {
100 .platform_data = &udc_data,
101 },
102 .resource = udc_resources,
103 .num_resources = ARRAY_SIZE(udc_resources),
104};
105
106void __init at91_add_device_udc(struct at91_udc_data *data)
107{
108 unsigned long x;
109
110 if (!data)
111 return;
112
113 if (data->vbus_pin) {
114 at91_set_gpio_input(data->vbus_pin, 0);
115 at91_set_deglitch(data->vbus_pin, 1);
116 }
117
118 /* Pullup pin is handled internally */
119 x = at91_sys_read(AT91_MATRIX_USBPUCR);
120 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
121
122 udc_data = *data;
123 platform_device_register(&at91sam9261_udc_device);
124}
125#else
126void __init at91_add_device_udc(struct at91_udc_data *data) {}
127#endif
128
129/* --------------------------------------------------------------------
130 * MMC / SD
131 * -------------------------------------------------------------------- */
132
133#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
134static u64 mmc_dmamask = 0xffffffffUL;
135static struct at91_mmc_data mmc_data;
136
137static struct resource mmc_resources[] = {
138 [0] = {
139 .start = AT91SAM9261_BASE_MCI,
140 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = AT91SAM9261_ID_MCI,
145 .end = AT91SAM9261_ID_MCI,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150static struct platform_device at91sam9261_mmc_device = {
151 .name = "at91_mci",
152 .id = -1,
153 .dev = {
154 .dma_mask = &mmc_dmamask,
155 .coherent_dma_mask = 0xffffffff,
156 .platform_data = &mmc_data,
157 },
158 .resource = mmc_resources,
159 .num_resources = ARRAY_SIZE(mmc_resources),
160};
161
162void __init at91_add_device_mmc(struct at91_mmc_data *data)
163{
164 if (!data)
165 return;
166
167 /* input/irq */
168 if (data->det_pin) {
169 at91_set_gpio_input(data->det_pin, 1);
170 at91_set_deglitch(data->det_pin, 1);
171 }
172 if (data->wp_pin)
173 at91_set_gpio_input(data->wp_pin, 1);
174 if (data->vcc_pin)
175 at91_set_gpio_output(data->vcc_pin, 0);
176
177 /* CLK */
178 at91_set_B_periph(AT91_PIN_PA2, 0);
179
180 /* CMD */
181 at91_set_B_periph(AT91_PIN_PA1, 1);
182
183 /* DAT0, maybe DAT1..DAT3 */
184 at91_set_B_periph(AT91_PIN_PA0, 1);
185 if (data->wire4) {
186 at91_set_B_periph(AT91_PIN_PA4, 1);
187 at91_set_B_periph(AT91_PIN_PA5, 1);
188 at91_set_B_periph(AT91_PIN_PA6, 1);
189 }
190
191 mmc_data = *data;
192 platform_device_register(&at91sam9261_mmc_device);
193}
194#else
195void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
196#endif
197
198
199/* --------------------------------------------------------------------
200 * NAND / SmartMedia
201 * -------------------------------------------------------------------- */
202
203#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
204static struct at91_nand_data nand_data;
205
206#define NAND_BASE AT91_CHIPSELECT_3
207
208static struct resource nand_resources[] = {
209 {
210 .start = NAND_BASE,
211 .end = NAND_BASE + SZ_256M - 1,
212 .flags = IORESOURCE_MEM,
213 }
214};
215
216static struct platform_device at91_nand_device = {
217 .name = "at91_nand",
218 .id = -1,
219 .dev = {
220 .platform_data = &nand_data,
221 },
222 .resource = nand_resources,
223 .num_resources = ARRAY_SIZE(nand_resources),
224};
225
226void __init at91_add_device_nand(struct at91_nand_data *data)
227{
228 unsigned long csa, mode;
229
230 if (!data)
231 return;
232
233 csa = at91_sys_read(AT91_MATRIX_EBICSA);
234 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
235
236 /* set the bus interface characteristics */
237 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
238 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
239
240 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
241 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
242
243 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
244
245 if (data->bus_width_16)
246 mode = AT91_SMC_DBW_16;
247 else
248 mode = AT91_SMC_DBW_8;
249 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
250
251 /* enable pin */
252 if (data->enable_pin)
253 at91_set_gpio_output(data->enable_pin, 1);
254
255 /* ready/busy pin */
256 if (data->rdy_pin)
257 at91_set_gpio_input(data->rdy_pin, 1);
258
259 /* card detect pin */
260 if (data->det_pin)
261 at91_set_gpio_input(data->det_pin, 1);
262
263 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
264 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
265
266 nand_data = *data;
267 platform_device_register(&at91_nand_device);
268}
269
270#else
271void __init at91_add_device_nand(struct at91_nand_data *data) {}
272#endif
273
274
275/* --------------------------------------------------------------------
276 * TWI (i2c)
277 * -------------------------------------------------------------------- */
278
279#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
280
281static struct resource twi_resources[] = {
282 [0] = {
283 .start = AT91SAM9261_BASE_TWI,
284 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 [1] = {
288 .start = AT91SAM9261_ID_TWI,
289 .end = AT91SAM9261_ID_TWI,
290 .flags = IORESOURCE_IRQ,
291 },
292};
293
294static struct platform_device at91sam9261_twi_device = {
295 .name = "at91_i2c",
296 .id = -1,
297 .resource = twi_resources,
298 .num_resources = ARRAY_SIZE(twi_resources),
299};
300
301void __init at91_add_device_i2c(void)
302{
303 /* pins used for TWI interface */
304 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
305 at91_set_multi_drive(AT91_PIN_PA7, 1);
306
307 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
308 at91_set_multi_drive(AT91_PIN_PA8, 1);
309
310 platform_device_register(&at91sam9261_twi_device);
311}
312#else
313void __init at91_add_device_i2c(void) {}
314#endif
315
316
317/* --------------------------------------------------------------------
318 * SPI
319 * -------------------------------------------------------------------- */
320
321#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
322static u64 spi_dmamask = 0xffffffffUL;
323
324static struct resource spi0_resources[] = {
325 [0] = {
326 .start = AT91SAM9261_BASE_SPI0,
327 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
328 .flags = IORESOURCE_MEM,
329 },
330 [1] = {
331 .start = AT91SAM9261_ID_SPI0,
332 .end = AT91SAM9261_ID_SPI0,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337static struct platform_device at91sam9261_spi0_device = {
338 .name = "atmel_spi",
339 .id = 0,
340 .dev = {
341 .dma_mask = &spi_dmamask,
342 .coherent_dma_mask = 0xffffffff,
343 },
344 .resource = spi0_resources,
345 .num_resources = ARRAY_SIZE(spi0_resources),
346};
347
348static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
349
350static struct resource spi1_resources[] = {
351 [0] = {
352 .start = AT91SAM9261_BASE_SPI1,
353 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
354 .flags = IORESOURCE_MEM,
355 },
356 [1] = {
357 .start = AT91SAM9261_ID_SPI1,
358 .end = AT91SAM9261_ID_SPI1,
359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device at91sam9261_spi1_device = {
364 .name = "atmel_spi",
365 .id = 1,
366 .dev = {
367 .dma_mask = &spi_dmamask,
368 .coherent_dma_mask = 0xffffffff,
369 },
370 .resource = spi1_resources,
371 .num_resources = ARRAY_SIZE(spi1_resources),
372};
373
374static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
375
376void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
377{
378 int i;
379 unsigned long cs_pin;
380 short enable_spi0 = 0;
381 short enable_spi1 = 0;
382
383 /* Choose SPI chip-selects */
384 for (i = 0; i < nr_devices; i++) {
385 if (devices[i].controller_data)
386 cs_pin = (unsigned long) devices[i].controller_data;
387 else if (devices[i].bus_num == 0)
388 cs_pin = spi0_standard_cs[devices[i].chip_select];
389 else
390 cs_pin = spi1_standard_cs[devices[i].chip_select];
391
392 if (devices[i].bus_num == 0)
393 enable_spi0 = 1;
394 else
395 enable_spi1 = 1;
396
397 /* enable chip-select pin */
398 at91_set_gpio_output(cs_pin, 1);
399
400 /* pass chip-select pin to driver */
401 devices[i].controller_data = (void *) cs_pin;
402 }
403
404 spi_register_board_info(devices, nr_devices);
405
406 /* Configure SPI bus(es) */
407 if (enable_spi0) {
408 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
409 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
410 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
411
412 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
413 platform_device_register(&at91sam9261_spi0_device);
414 }
415 if (enable_spi1) {
416 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
417 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
418 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
419
420 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
421 platform_device_register(&at91sam9261_spi1_device);
422 }
423}
424#else
425void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
426#endif
427
428
429/* --------------------------------------------------------------------
430 * LCD Controller
431 * -------------------------------------------------------------------- */
432
433#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
434static u64 lcdc_dmamask = 0xffffffffUL;
435static struct at91fb_info lcdc_data;
436
437static struct resource lcdc_resources[] = {
438 [0] = {
439 .start = AT91SAM9261_LCDC_BASE,
440 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = AT91SAM9261_ID_LCDC,
445 .end = AT91SAM9261_ID_LCDC,
446 .flags = IORESOURCE_IRQ,
447 },
448#if defined(CONFIG_FB_INTSRAM)
449 [2] = {
450 .start = AT91SAM9261_SRAM_BASE,
451 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
452 .flags = IORESOURCE_MEM,
453 },
454#endif
455};
456
457static struct platform_device at91_lcdc_device = {
458 .name = "at91-fb",
459 .id = 0,
460 .dev = {
461 .dma_mask = &lcdc_dmamask,
462 .coherent_dma_mask = 0xffffffff,
463 .platform_data = &lcdc_data,
464 },
465 .resource = lcdc_resources,
466 .num_resources = ARRAY_SIZE(lcdc_resources),
467};
468
469void __init at91_add_device_lcdc(struct at91fb_info *data)
470{
471 if (!data) {
472 return;
473 }
474
475 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
476 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
477 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
478 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
479 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
480 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
481 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
482 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
483 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
484 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
485 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
486 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
487 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
488 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
489 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
490 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
491 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
492 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
493 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
494 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
495 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
496 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
497
498 lcdc_data = *data;
499 platform_device_register(&at91_lcdc_device);
500}
501#else
502void __init at91_add_device_lcdc(struct at91fb_info *data) {}
503#endif
504
505
506/* --------------------------------------------------------------------
507 * LEDs
508 * -------------------------------------------------------------------- */
509
510#if defined(CONFIG_LEDS)
511u8 at91_leds_cpu;
512u8 at91_leds_timer;
513
514void __init at91_init_leds(u8 cpu_led, u8 timer_led)
515{
516 at91_leds_cpu = cpu_led;
517 at91_leds_timer = timer_led;
518}
519#else
520void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
521#endif
522
523
524/* --------------------------------------------------------------------
525 * UART
526 * -------------------------------------------------------------------- */
527
528#if defined(CONFIG_SERIAL_ATMEL)
529static struct resource dbgu_resources[] = {
530 [0] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = AT91_ID_SYS,
537 .end = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct atmel_uart_data dbgu_data = {
543 .use_dma_tx = 0,
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
546};
547
548static struct platform_device at91sam9261_dbgu_device = {
549 .name = "atmel_usart",
550 .id = 0,
551 .dev = {
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
554 },
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
557};
558
559static inline void configure_dbgu_pins(void)
560{
561 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
563}
564
565static struct resource uart0_resources[] = {
566 [0] = {
567 .start = AT91SAM9261_BASE_US0,
568 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = AT91SAM9261_ID_US0,
573 .end = AT91SAM9261_ID_US0,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct atmel_uart_data uart0_data = {
579 .use_dma_tx = 1,
580 .use_dma_rx = 1,
581};
582
583static struct platform_device at91sam9261_uart0_device = {
584 .name = "atmel_usart",
585 .id = 1,
586 .dev = {
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
589 },
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
592};
593
594static inline void configure_usart0_pins(void)
595{
596 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
600}
601
602static struct resource uart1_resources[] = {
603 [0] = {
604 .start = AT91SAM9261_BASE_US1,
605 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = AT91SAM9261_ID_US1,
610 .end = AT91SAM9261_ID_US1,
611 .flags = IORESOURCE_IRQ,
612 },
613};
614
615static struct atmel_uart_data uart1_data = {
616 .use_dma_tx = 1,
617 .use_dma_rx = 1,
618};
619
620static struct platform_device at91sam9261_uart1_device = {
621 .name = "atmel_usart",
622 .id = 2,
623 .dev = {
624 .platform_data = &uart1_data,
625 .coherent_dma_mask = 0xffffffff,
626 },
627 .resource = uart1_resources,
628 .num_resources = ARRAY_SIZE(uart1_resources),
629};
630
631static inline void configure_usart1_pins(void)
632{
633 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
634 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
635}
636
637static struct resource uart2_resources[] = {
638 [0] = {
639 .start = AT91SAM9261_BASE_US2,
640 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = AT91SAM9261_ID_US2,
645 .end = AT91SAM9261_ID_US2,
646 .flags = IORESOURCE_IRQ,
647 },
648};
649
650static struct atmel_uart_data uart2_data = {
651 .use_dma_tx = 1,
652 .use_dma_rx = 1,
653};
654
655static struct platform_device at91sam9261_uart2_device = {
656 .name = "atmel_usart",
657 .id = 3,
658 .dev = {
659 .platform_data = &uart2_data,
660 .coherent_dma_mask = 0xffffffff,
661 },
662 .resource = uart2_resources,
663 .num_resources = ARRAY_SIZE(uart2_resources),
664};
665
666static inline void configure_usart2_pins(void)
667{
668 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
669 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
670}
671
672struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
673struct platform_device *atmel_default_console_device; /* the serial console device */
674
675void __init at91_init_serial(struct at91_uart_config *config)
676{
677 int i;
678
679 /* Fill in list of supported UARTs */
680 for (i = 0; i < config->nr_tty; i++) {
681 switch (config->tty_map[i]) {
682 case 0:
683 configure_usart0_pins();
684 at91_uarts[i] = &at91sam9261_uart0_device;
685 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
686 break;
687 case 1:
688 configure_usart1_pins();
689 at91_uarts[i] = &at91sam9261_uart1_device;
690 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
691 break;
692 case 2:
693 configure_usart2_pins();
694 at91_uarts[i] = &at91sam9261_uart2_device;
695 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
696 break;
697 case 3:
698 configure_dbgu_pins();
699 at91_uarts[i] = &at91sam9261_dbgu_device;
700 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
701 break;
702 default:
703 continue;
704 }
705 at91_uarts[i]->id = i; /* update ID number to mapped ID */
706 }
707
708 /* Set serial console device */
709 if (config->console_tty < ATMEL_MAX_UART)
710 atmel_default_console_device = at91_uarts[config->console_tty];
711 if (!atmel_default_console_device)
712 printk(KERN_INFO "AT91: No default serial console defined.\n");
713}
714
715void __init at91_add_device_serial(void)
716{
717 int i;
718
719 for (i = 0; i < ATMEL_MAX_UART; i++) {
720 if (at91_uarts[i])
721 platform_device_register(at91_uarts[i]);
722 }
723}
724#else
725void __init at91_init_serial(struct at91_uart_config *config) {}
726void __init at91_add_device_serial(void) {}
727#endif
728
729
730/* -------------------------------------------------------------------- */
731
732/*
733 * These devices are always present and don't need any board-specific
734 * setup.
735 */
736static int __init at91_add_standard_devices(void)
737{
738 return 0;
739}
740
741arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam926x_time.c b/arch/arm/mach-at91rm9200/at91sam926x_time.c
new file mode 100644
index 000000000000..99df5f6ee42e
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam926x_time.c
@@ -0,0 +1,114 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c
3 *
4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/time.h>
18
19#include <asm/hardware.h>
20#include <asm/io.h>
21#include <asm/mach/time.h>
22
23#include <asm/arch/at91_pit.h>
24
25
26#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
27#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
28
29/*
30 * Returns number of microseconds since last timer interrupt. Note that interrupts
31 * will have been disabled by do_gettimeofday()
32 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
33 * 'tick' is usecs per jiffy (linux/timex.h).
34 */
35static unsigned long at91sam926x_gettimeoffset(void)
36{
37 unsigned long elapsed;
38 unsigned long t = at91_sys_read(AT91_PIT_PIIR);
39
40 elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
41
42 return (unsigned long)(elapsed * 1000000) / LATCH;
43}
44
45/*
46 * IRQ handler for the timer.
47 */
48static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
49{
50 volatile long nr_ticks;
51
52 if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
53 write_seqlock(&xtime_lock);
54
55 /* Get number to ticks performed before interrupt and clear PIT interrupt */
56 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
57 do {
58 timer_tick();
59 nr_ticks--;
60 } while (nr_ticks);
61
62 write_sequnlock(&xtime_lock);
63 return IRQ_HANDLED;
64 } else
65 return IRQ_NONE; /* not handled */
66}
67
68static struct irqaction at91sam926x_timer_irq = {
69 .name = "at91_tick",
70 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
71 .handler = at91sam926x_timer_interrupt
72};
73
74void at91sam926x_timer_reset(void)
75{
76 /* Disable timer */
77 at91_sys_write(AT91_PIT_MR, 0);
78
79 /* Clear any pending interrupts */
80 (void) at91_sys_read(AT91_PIT_PIVR);
81
82 /* Set Period Interval timer and enable its interrupt */
83 at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
84}
85
86/*
87 * Set up timer interrupt.
88 */
89void __init at91sam926x_timer_init(void)
90{
91 /* Initialize and enable the timer */
92 at91sam926x_timer_reset();
93
94 /* Make IRQs happen for the system timer. */
95 setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
96}
97
98#ifdef CONFIG_PM
99static void at91sam926x_timer_suspend(void)
100{
101 /* Disable timer */
102 at91_sys_write(AT91_PIT_MR, 0);
103}
104#else
105#define at91sam926x_timer_suspend NULL
106#endif
107
108struct sys_timer at91sam926x_timer = {
109 .init = at91sam926x_timer_init,
110 .offset = at91sam926x_gettimeoffset,
111 .suspend = at91sam926x_timer_suspend,
112 .resume = at91sam926x_timer_reset,
113};
114
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c
index 98208740e7c5..654f0379550a 100644
--- a/arch/arm/mach-at91rm9200/board-carmeva.c
+++ b/arch/arm/mach-at91rm9200/board-carmeva.c
@@ -65,7 +65,6 @@ static void __init carmeva_init_irq(void)
65 at91rm9200_init_interrupts(NULL); 65 at91rm9200_init_interrupts(NULL);
66} 66}
67 67
68
69static struct at91_eth_data __initdata carmeva_eth_data = { 68static struct at91_eth_data __initdata carmeva_eth_data = {
70 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
71 .is_rmii = 1, 70 .is_rmii = 1,
@@ -89,8 +88,33 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
89// }; 88// };
90 89
91static struct at91_mmc_data __initdata carmeva_mmc_data = { 90static struct at91_mmc_data __initdata carmeva_mmc_data = {
92 .is_b = 0, 91 .slot_b = 0,
93 .wire4 = 1, 92 .wire4 = 1,
93 .det_pin = AT91_PIN_PB10,
94 .wp_pin = AT91_PIN_PC14,
95};
96
97static struct spi_board_info carmeva_spi_devices[] = {
98 { /* DataFlash chip */
99 .modalias = "mtd_dataflash",
100 .chip_select = 0,
101 .max_speed_hz = 10 * 1000 * 1000,
102 },
103 { /* User accessable spi - cs1 (250KHz) */
104 .modalias = "spi-cs1",
105 .chip_select = 1,
106 .max_speed_hz = 250 * 1000,
107 },
108 { /* User accessable spi - cs2 (1MHz) */
109 .modalias = "spi-cs2",
110 .chip_select = 2,
111 .max_speed_hz = 1 * 1000 * 1000,
112 },
113 { /* User accessable spi - cs3 (10MHz) */
114 .modalias = "spi-cs3",
115 .chip_select = 3,
116 .max_speed_hz = 10 * 1000 * 1000,
117 },
94}; 118};
95 119
96static void __init carmeva_board_init(void) 120static void __init carmeva_board_init(void)
@@ -105,10 +129,10 @@ static void __init carmeva_board_init(void)
105 at91_add_device_udc(&carmeva_udc_data); 129 at91_add_device_udc(&carmeva_udc_data);
106 /* I2C */ 130 /* I2C */
107 at91_add_device_i2c(); 131 at91_add_device_i2c();
132 /* SPI */
133 at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices));
108 /* Compact Flash */ 134 /* Compact Flash */
109// at91_add_device_cf(&carmeva_cf_data); 135// at91_add_device_cf(&carmeva_cf_data);
110 /* SPI */
111// at91_add_device_spi(NULL, 0);
112 /* MMC */ 136 /* MMC */
113 at91_add_device_mmc(&carmeva_mmc_data); 137 at91_add_device_mmc(&carmeva_mmc_data);
114} 138}
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c
index 8eeae491ce71..b8bb8052607a 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91rm9200/board-csb337.c
@@ -99,7 +99,7 @@ static struct at91_cf_data __initdata csb337_cf_data = {
99 99
100static struct at91_mmc_data __initdata csb337_mmc_data = { 100static struct at91_mmc_data __initdata csb337_mmc_data = {
101 .det_pin = AT91_PIN_PD5, 101 .det_pin = AT91_PIN_PD5,
102 .is_b = 0, 102 .slot_b = 0,
103 .wire4 = 1, 103 .wire4 = 1,
104 .wp_pin = AT91_PIN_PD6, 104 .wp_pin = AT91_PIN_PD6,
105}; 105};
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c
index c699f3984d4b..7522bf91bce8 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91rm9200/board-dk.c
@@ -27,6 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h>
30 31
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -39,6 +40,7 @@
39 40
40#include <asm/arch/board.h> 41#include <asm/arch/board.h>
41#include <asm/arch/gpio.h> 42#include <asm/arch/gpio.h>
43#include <asm/arch/at91rm9200_mc.h>
42 44
43#include "generic.h" 45#include "generic.h"
44 46
@@ -93,7 +95,7 @@ static struct at91_cf_data __initdata dk_cf_data = {
93}; 95};
94 96
95static struct at91_mmc_data __initdata dk_mmc_data = { 97static struct at91_mmc_data __initdata dk_mmc_data = {
96 .is_b = 0, 98 .slot_b = 0,
97 .wire4 = 1, 99 .wire4 = 1,
98}; 100};
99 101
@@ -145,6 +147,30 @@ static struct at91_nand_data __initdata dk_nand_data = {
145 .partition_info = nand_partitions, 147 .partition_info = nand_partitions,
146}; 148};
147 149
150#define DK_FLASH_BASE AT91_CHIPSELECT_0
151#define DK_FLASH_SIZE 0x200000
152
153static struct physmap_flash_data dk_flash_data = {
154 .width = 2,
155};
156
157static struct resource dk_flash_resource = {
158 .start = DK_FLASH_BASE,
159 .end = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
160 .flags = IORESOURCE_MEM,
161};
162
163static struct platform_device dk_flash = {
164 .name = "physmap-flash",
165 .id = 0,
166 .dev = {
167 .platform_data = &dk_flash_data,
168 },
169 .resource = &dk_flash_resource,
170 .num_resources = 1,
171};
172
173
148static void __init dk_board_init(void) 174static void __init dk_board_init(void)
149{ 175{
150 /* Serial */ 176 /* Serial */
@@ -172,6 +198,8 @@ static void __init dk_board_init(void)
172#endif 198#endif
173 /* NAND */ 199 /* NAND */
174 at91_add_device_nand(&dk_nand_data); 200 at91_add_device_nand(&dk_nand_data);
201 /* NOR Flash */
202 platform_device_register(&dk_flash);
175 /* VGA */ 203 /* VGA */
176// dk_add_device_video(); 204// dk_add_device_video();
177} 205}
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c
index 65e867ba2df3..80b72cf7264c 100644
--- a/arch/arm/mach-at91rm9200/board-eb9200.c
+++ b/arch/arm/mach-at91rm9200/board-eb9200.c
@@ -87,7 +87,7 @@ static struct at91_cf_data __initdata eb9200_cf_data = {
87}; 87};
88 88
89static struct at91_mmc_data __initdata eb9200_mmc_data = { 89static struct at91_mmc_data __initdata eb9200_mmc_data = {
90 .is_b = 0, 90 .slot_b = 0,
91 .wire4 = 1, 91 .wire4 = 1,
92}; 92};
93 93
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c
index 830eb7932178..c4fdb415f20e 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91rm9200/board-ek.c
@@ -27,6 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h>
30 31
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -39,6 +40,7 @@
39 40
40#include <asm/arch/board.h> 41#include <asm/arch/board.h>
41#include <asm/arch/gpio.h> 42#include <asm/arch/gpio.h>
43#include <asm/arch/at91rm9200_mc.h>
42 44
43#include "generic.h" 45#include "generic.h"
44 46
@@ -87,7 +89,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
87 89
88static struct at91_mmc_data __initdata ek_mmc_data = { 90static struct at91_mmc_data __initdata ek_mmc_data = {
89 .det_pin = AT91_PIN_PB27, 91 .det_pin = AT91_PIN_PB27,
90 .is_b = 0, 92 .slot_b = 0,
91 .wire4 = 1, 93 .wire4 = 1,
92 .wp_pin = AT91_PIN_PA17, 94 .wp_pin = AT91_PIN_PA17,
93}; 95};
@@ -107,6 +109,30 @@ static struct spi_board_info ek_spi_devices[] = {
107#endif 109#endif
108}; 110};
109 111
112#define EK_FLASH_BASE AT91_CHIPSELECT_0
113#define EK_FLASH_SIZE 0x200000
114
115static struct physmap_flash_data ek_flash_data = {
116 .width = 2,
117};
118
119static struct resource ek_flash_resource = {
120 .start = EK_FLASH_BASE,
121 .end = EK_FLASH_BASE + EK_FLASH_SIZE - 1,
122 .flags = IORESOURCE_MEM,
123};
124
125static struct platform_device ek_flash = {
126 .name = "physmap-flash",
127 .id = 0,
128 .dev = {
129 .platform_data = &ek_flash_data,
130 },
131 .resource = &ek_flash_resource,
132 .num_resources = 1,
133};
134
135
110static void __init ek_board_init(void) 136static void __init ek_board_init(void)
111{ 137{
112 /* Serial */ 138 /* Serial */
@@ -130,6 +156,8 @@ static void __init ek_board_init(void)
130 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ 156 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
131 at91_add_device_mmc(&ek_mmc_data); 157 at91_add_device_mmc(&ek_mmc_data);
132#endif 158#endif
159 /* NOR Flash */
160 platform_device_register(&ek_flash);
133 /* VGA */ 161 /* VGA */
134// ek_add_device_video(); 162// ek_add_device_video();
135} 163}
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c
index 35a954a44b1b..759d8191854f 100644
--- a/arch/arm/mach-at91rm9200/board-kb9202.c
+++ b/arch/arm/mach-at91rm9200/board-kb9202.c
@@ -84,7 +84,7 @@ static struct at91_udc_data __initdata kb9202_udc_data = {
84 84
85static struct at91_mmc_data __initdata kb9202_mmc_data = { 85static struct at91_mmc_data __initdata kb9202_mmc_data = {
86 .det_pin = AT91_PIN_PB2, 86 .det_pin = AT91_PIN_PB2,
87 .is_b = 0, 87 .slot_b = 0,
88 .wire4 = 1, 88 .wire4 = 1,
89}; 89};
90 90
diff --git a/arch/arm/mach-at91rm9200/board-sam9260ek.c b/arch/arm/mach-at91rm9200/board-sam9260ek.c
new file mode 100644
index 000000000000..ffca9bdec37b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9260ek.c
@@ -0,0 +1,201 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28
29#include <asm/hardware.h>
30#include <asm/setup.h>
31#include <asm/mach-types.h>
32#include <asm/irq.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/irq.h>
37
38#include <asm/arch/board.h>
39#include <asm/arch/gpio.h>
40#include <asm/arch/at91sam926x_mc.h>
41
42#include "generic.h"
43
44
45/*
46 * Serial port configuration.
47 * 0 .. 5 = USART0 .. USART5
48 * 6 = DBGU
49 */
50static struct at91_uart_config __initdata ek_uart_config = {
51 .console_tty = 0, /* ttyS0 */
52 .nr_tty = 3,
53 .tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
54};
55
56static void __init ek_map_io(void)
57{
58 /* Initialize processor: 18.432 MHz crystal */
59 at91sam9260_initialize(18432000);
60
61 /* Setup the serial ports and console */
62 at91_init_serial(&ek_uart_config);
63}
64
65static void __init ek_init_irq(void)
66{
67 at91sam9260_init_interrupts(NULL);
68}
69
70
71/*
72 * USB Host port
73 */
74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2,
76};
77
78/*
79 * USB Device port
80 */
81static struct at91_udc_data __initdata ek_udc_data = {
82 .vbus_pin = AT91_PIN_PC5,
83 .pullup_pin = 0, /* pull-up driven by UDC */
84};
85
86
87/*
88 * SPI devices.
89 */
90static struct spi_board_info ek_spi_devices[] = {
91#if !defined(CONFIG_MMC_AT91)
92 { /* DataFlash chip */
93 .modalias = "mtd_dataflash",
94 .chip_select = 1,
95 .max_speed_hz = 15 * 1000 * 1000,
96 .bus_num = 0,
97 },
98#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
99 { /* DataFlash card */
100 .modalias = "mtd_dataflash",
101 .chip_select = 0,
102 .max_speed_hz = 15 * 1000 * 1000,
103 .bus_num = 0,
104 },
105#endif
106#endif
107#if defined(CONFIG_SND_AT73C213)
108 { /* AT73C213 DAC */
109 .modalias = "snd_at73c213",
110 .chip_select = 0,
111 .max_speed_hz = 10 * 1000 * 1000,
112 .bus_num = 1,
113 },
114#endif
115};
116
117
118/*
119 * MACB Ethernet device
120 */
121static struct __initdata eth_platform_data ek_macb_data = {
122 .is_rmii = 1,
123};
124
125
126/*
127 * NAND flash
128 */
129static struct mtd_partition __initdata ek_nand_partition[] = {
130 {
131 .name = "Partition 1",
132 .offset = 0,
133 .size = 256 * 1024,
134 },
135 {
136 .name = "Partition 2",
137 .offset = 256 * 1024,
138 .size = MTDPART_SIZ_FULL,
139 },
140};
141
142static struct mtd_partition *nand_partitions(int size, int *num_partitions)
143{
144 *num_partitions = ARRAY_SIZE(ek_nand_partition);
145 return ek_nand_partition;
146}
147
148static struct at91_nand_data __initdata ek_nand_data = {
149 .ale = 21,
150 .cle = 22,
151// .det_pin = ... not connected
152 .rdy_pin = AT91_PIN_PC13,
153 .enable_pin = AT91_PIN_PC14,
154 .partition_info = nand_partitions,
155#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
156 .bus_width_16 = 1,
157#else
158 .bus_width_16 = 0,
159#endif
160};
161
162
163/*
164 * MCI (SD/MMC)
165 */
166static struct at91_mmc_data __initdata ek_mmc_data = {
167 .slot_b = 1,
168 .wire4 = 1,
169// .det_pin = ... not connected
170// .wp_pin = ... not connected
171// .vcc_pin = ... not connected
172};
173
174static void __init ek_board_init(void)
175{
176 /* Serial */
177 at91_add_device_serial();
178 /* USB Host */
179 at91_add_device_usbh(&ek_usbh_data);
180 /* USB Device */
181 at91_add_device_udc(&ek_udc_data);
182 /* SPI */
183 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
184 /* NAND */
185 at91_add_device_nand(&ek_nand_data);
186 /* Ethernet */
187 at91_add_device_eth(&ek_macb_data);
188 /* MMC */
189 at91_add_device_mmc(&ek_mmc_data);
190}
191
192MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
193 /* Maintainer: Atmel */
194 .phys_io = AT91_BASE_SYS,
195 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
196 .boot_params = AT91_SDRAM_BASE + 0x100,
197 .timer = &at91sam926x_timer,
198 .map_io = ek_map_io,
199 .init_irq = ek_init_irq,
200 .init_machine = ek_board_init,
201MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-sam9261ek.c b/arch/arm/mach-at91rm9200/board-sam9261ek.c
new file mode 100644
index 000000000000..30b490d8886b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9261ek.c
@@ -0,0 +1,259 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28#include <linux/dm9000.h>
29
30#include <asm/hardware.h>
31#include <asm/setup.h>
32#include <asm/mach-types.h>
33#include <asm/irq.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/irq.h>
38
39#include <asm/arch/board.h>
40#include <asm/arch/gpio.h>
41#include <asm/arch/at91sam926x_mc.h>
42
43#include "generic.h"
44
45
46/*
47 * Serial port configuration.
48 * 0 .. 2 = USART0 .. USART2
49 * 3 = DBGU
50 */
51static struct at91_uart_config __initdata ek_uart_config = {
52 .console_tty = 0, /* ttyS0 */
53 .nr_tty = 1,
54 .tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */
55};
56
57static void __init ek_map_io(void)
58{
59 /* Initialize processor: 18.432 MHz crystal */
60 at91sam9261_initialize(18432000);
61
62 /* Setup the serial ports and console */
63 at91_init_serial(&ek_uart_config);
64}
65
66static void __init ek_init_irq(void)
67{
68 at91sam9261_init_interrupts(NULL);
69}
70
71
72/*
73 * DM9000 ethernet device
74 */
75#if defined(CONFIG_DM9000)
76static struct resource at91sam9261_dm9000_resource[] = {
77 [0] = {
78 .start = AT91_CHIPSELECT_2,
79 .end = AT91_CHIPSELECT_2 + 3,
80 .flags = IORESOURCE_MEM
81 },
82 [1] = {
83 .start = AT91_CHIPSELECT_2 + 0x44,
84 .end = AT91_CHIPSELECT_2 + 0xFF,
85 .flags = IORESOURCE_MEM
86 },
87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ
91 }
92};
93
94static struct dm9000_plat_data dm9000_platdata = {
95 .flags = DM9000_PLATF_16BITONLY,
96};
97
98static struct platform_device at91sam9261_dm9000_device = {
99 .name = "dm9000",
100 .id = 0,
101 .num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource),
102 .resource = at91sam9261_dm9000_resource,
103 .dev = {
104 .platform_data = &dm9000_platdata,
105 }
106};
107
108static void __init ek_add_device_dm9000(void)
109{
110 /*
111 * Configure Chip-Select 2 on SMC for the DM9000.
112 * Note: These timings were calculated for MASTER_CLOCK = 100000000
113 * according to the DM9000 timings.
114 */
115 at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
116 at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
117 at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
118 at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
119
120 /* Configure Reset signal as output */
121 at91_set_gpio_output(AT91_PIN_PC10, 0);
122
123 /* Configure Interrupt pin as input, no pull-up */
124 at91_set_gpio_input(AT91_PIN_PC11, 0);
125
126 platform_device_register(&at91sam9261_dm9000_device);
127}
128#else
129static void __init ek_add_device_dm9000(void) {}
130#endif /* CONFIG_DM9000 */
131
132
133/*
134 * USB Host Port
135 */
136static struct at91_usbh_data __initdata ek_usbh_data = {
137 .ports = 2,
138};
139
140
141/*
142 * USB Device Port
143 */
144static struct at91_udc_data __initdata ek_udc_data = {
145 .vbus_pin = AT91_PIN_PB29,
146 .pullup_pin = 0, /* pull-up driven by UDC */
147};
148
149
150/*
151 * MCI (SD/MMC)
152 */
153static struct at91_mmc_data __initdata ek_mmc_data = {
154 .wire4 = 1,
155// .det_pin = ... not connected
156// .wp_pin = ... not connected
157// .vcc_pin = ... not connected
158};
159
160
161/*
162 * NAND flash
163 */
164static struct mtd_partition __initdata ek_nand_partition[] = {
165 {
166 .name = "Partition 1",
167 .offset = 0,
168 .size = 256 * 1024,
169 },
170 {
171 .name = "Partition 2",
172 .offset = 256 * 1024 ,
173 .size = MTDPART_SIZ_FULL,
174 },
175};
176
177static struct mtd_partition *nand_partitions(int size, int *num_partitions)
178{
179 *num_partitions = ARRAY_SIZE(ek_nand_partition);
180 return ek_nand_partition;
181}
182
183static struct at91_nand_data __initdata ek_nand_data = {
184 .ale = 22,
185 .cle = 21,
186// .det_pin = ... not connected
187 .rdy_pin = AT91_PIN_PC15,
188 .enable_pin = AT91_PIN_PC14,
189 .partition_info = nand_partitions,
190#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
191 .bus_width_16 = 1,
192#else
193 .bus_width_16 = 0,
194#endif
195};
196
197/*
198 * SPI devices
199 */
200static struct spi_board_info ek_spi_devices[] = {
201 { /* DataFlash chip */
202 .modalias = "mtd_dataflash",
203 .chip_select = 0,
204 .max_speed_hz = 15 * 1000 * 1000,
205 .bus_num = 0,
206 },
207#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
208 { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
209 .modalias = "mtd_dataflash",
210 .chip_select = 3,
211 .max_speed_hz = 15 * 1000 * 1000,
212 .bus_num = 0,
213 },
214#elif defined(CONFIG_SND_AT73C213)
215 { /* AT73C213 DAC */
216 .modalias = "snd_at73c213",
217 .chip_select = 3,
218 .max_speed_hz = 10 * 1000 * 1000,
219 .bus_num = 0,
220 },
221#endif
222};
223
224
225static void __init ek_board_init(void)
226{
227 /* Serial */
228 at91_add_device_serial();
229 /* USB Host */
230 at91_add_device_usbh(&ek_usbh_data);
231 /* USB Device */
232 at91_add_device_udc(&ek_udc_data);
233 /* I2C */
234 at91_add_device_i2c();
235 /* NAND */
236 at91_add_device_nand(&ek_nand_data);
237 /* DM9000 ethernet */
238 ek_add_device_dm9000();
239
240 /* spi0 and mmc/sd share the same PIO pins */
241#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
242 /* SPI */
243 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
244#else
245 /* MMC */
246 at91_add_device_mmc(&ek_mmc_data);
247#endif
248}
249
250MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
251 /* Maintainer: Atmel */
252 .phys_io = AT91_BASE_SYS,
253 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
254 .boot_params = AT91_SDRAM_BASE + 0x100,
255 .timer = &at91sam926x_timer,
256 .map_io = ek_map_io,
257 .init_irq = ek_init_irq,
258 .init_machine = ek_board_init,
259MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index a43b061a7c85..4dee21fefe5a 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -28,6 +28,8 @@
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29 29
30#include <asm/hardware.h> 30#include <asm/hardware.h>
31#include <asm/arch/at91_pmc.h>
32#include <asm/arch/cpu.h>
31 33
32#include "clock.h" 34#include "clock.h"
33 35
@@ -41,6 +43,7 @@
41#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY) 43#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
42#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE) 44#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
43#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL) 45#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
46#define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM)
44 47
45 48
46static LIST_HEAD(clocks); 49static LIST_HEAD(clocks);
@@ -114,13 +117,11 @@ static void pmc_sys_mode(struct clk *clk, int is_on)
114static struct clk udpck = { 117static struct clk udpck = {
115 .name = "udpck", 118 .name = "udpck",
116 .parent = &pllb, 119 .parent = &pllb,
117 .pmc_mask = AT91_PMC_UDP,
118 .mode = pmc_sys_mode, 120 .mode = pmc_sys_mode,
119}; 121};
120static struct clk uhpck = { 122static struct clk uhpck = {
121 .name = "uhpck", 123 .name = "uhpck",
122 .parent = &pllb, 124 .parent = &pllb,
123 .pmc_mask = AT91_PMC_UHP,
124 .mode = pmc_sys_mode, 125 .mode = pmc_sys_mode,
125}; 126};
126 127
@@ -434,6 +435,12 @@ int __init clk_register(struct clk *clk)
434 clk->mode = pmc_periph_mode; 435 clk->mode = pmc_periph_mode;
435 list_add_tail(&clk->node, &clocks); 436 list_add_tail(&clk->node, &clocks);
436 } 437 }
438 else if (clk_is_sys(clk)) {
439 clk->parent = &mck;
440 clk->mode = pmc_sys_mode;
441
442 list_add_tail(&clk->node, &clocks);
443 }
437#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 444#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
438 else if (clk_is_programmable(clk)) { 445 else if (clk_is_programmable(clk)) {
439 clk->mode = pmc_sys_mode; 446 clk->mode = pmc_sys_mode;
@@ -586,9 +593,21 @@ int __init at91_clock_init(unsigned long main_clock)
586 */ 593 */
587 at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; 594 at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
588 pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); 595 pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
589 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP); 596 if (cpu_is_at91rm9200()) {
597 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
598 udpck.pmc_mask = AT91RM9200_PMC_UDP;
599 at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
600 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
601 } else if (cpu_is_at91sam9260()) {
602 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
603 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
604 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
605 } else if (cpu_is_at91sam9261()) {
606 uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
607 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
608 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
609 }
590 at91_sys_write(AT91_CKGR_PLLBR, 0); 610 at91_sys_write(AT91_CKGR_PLLBR, 0);
591 at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
592 611
593 udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); 612 udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
594 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); 613 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91rm9200/clock.h
index 0592e662ab37..b5c7a2eb2d1d 100644
--- a/arch/arm/mach-at91rm9200/clock.h
+++ b/arch/arm/mach-at91rm9200/clock.h
@@ -10,6 +10,7 @@
10#define CLK_TYPE_PLL 0x2 10#define CLK_TYPE_PLL 0x2
11#define CLK_TYPE_PROGRAMMABLE 0x4 11#define CLK_TYPE_PROGRAMMABLE 0x4
12#define CLK_TYPE_PERIPHERAL 0x8 12#define CLK_TYPE_PERIPHERAL 0x8
13#define CLK_TYPE_SYSTEM 0x10
13 14
14 15
15struct clk { 16struct clk {
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 694e411e285f..8c4d5a77d485 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -10,14 +10,19 @@
10 10
11 /* Processors */ 11 /* Processors */
12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); 12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
13extern void __init at91sam9260_initialize(unsigned long main_clock);
14extern void __init at91sam9261_initialize(unsigned long main_clock);
13 15
14 /* Interrupts */ 16 /* Interrupts */
15extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 17extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
18extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
19extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
16extern void __init at91_aic_init(unsigned int priority[]); 20extern void __init at91_aic_init(unsigned int priority[]);
17 21
18 /* Timer */ 22 /* Timer */
19struct sys_timer; 23struct sys_timer;
20extern struct sys_timer at91rm9200_timer; 24extern struct sys_timer at91rm9200_timer;
25extern struct sys_timer at91sam926x_timer;
21 26
22 /* Clocks */ 27 /* Clocks */
23extern int __init at91_clock_init(unsigned long main_clock); 28extern int __init at91_clock_init(unsigned long main_clock);
@@ -39,3 +44,6 @@ struct at91_gpio_bank {
39}; 44};
40extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 45extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
41extern void __init at91_gpio_irq_setup(void); 46extern void __init at91_gpio_irq_setup(void);
47
48extern void (*at91_arch_reset)(void);
49extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index 7467d644f0a3..3f188508c391 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -19,6 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/hardware.h> 21#include <asm/hardware.h>
22#include <asm/arch/at91_pio.h>
23#include <asm/arch/at91_pmc.h>
22#include <asm/arch/gpio.h> 24#include <asm/arch/gpio.h>
23 25
24#include "generic.h" 26#include "generic.h"
@@ -332,10 +334,10 @@ static struct irq_chip gpio_irqchip = {
332 .set_wake = gpio_irq_set_wake, 334 .set_wake = gpio_irq_set_wake,
333}; 335};
334 336
335static void gpio_irq_handler(unsigned irq, struct irqdesc *desc) 337static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
336{ 338{
337 unsigned pin; 339 unsigned pin;
338 struct irqdesc *gpio; 340 struct irq_desc *gpio;
339 void __iomem *pio; 341 void __iomem *pio;
340 u32 isr; 342 u32 isr;
341 343
@@ -396,7 +398,7 @@ void __init at91_gpio_irq_setup(void)
396 __raw_writel(~0, controller + PIO_IDR); 398 __raw_writel(~0, controller + PIO_IDR);
397 399
398 set_irq_data(id, (void *) pin); 400 set_irq_data(id, (void *) pin);
399 set_irq_chipdata(id, controller); 401 set_irq_chip_data(id, controller);
400 402
401 for (i = 0; i < 32; i++, pin++) { 403 for (i = 0; i < 32; i++, pin++) {
402 /* 404 /*
@@ -404,7 +406,7 @@ void __init at91_gpio_irq_setup(void)
404 * shorter, and the AIC handles interupts sanely. 406 * shorter, and the AIC handles interupts sanely.
405 */ 407 */
406 set_irq_chip(pin, &gpio_irqchip); 408 set_irq_chip(pin, &gpio_irqchip);
407 set_irq_handler(pin, do_simple_IRQ); 409 set_irq_handler(pin, handle_simple_irq);
408 set_irq_flags(pin, IRQF_VALID); 410 set_irq_flags(pin, IRQF_VALID);
409 } 411 }
410 412
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index 3e488117ca91..2148daafd29c 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -47,6 +47,10 @@ static void at91_aic_unmask_irq(unsigned int irq)
47 at91_sys_write(AT91_AIC_IECR, 1 << irq); 47 at91_sys_write(AT91_AIC_IECR, 1 << irq);
48} 48}
49 49
50unsigned int at91_extern_irq;
51
52#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
53
50static int at91_aic_set_type(unsigned irq, unsigned type) 54static int at91_aic_set_type(unsigned irq, unsigned type)
51{ 55{
52 unsigned int smr, srctype; 56 unsigned int smr, srctype;
@@ -59,14 +63,16 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
59 srctype = AT91_AIC_SRCTYPE_RISING; 63 srctype = AT91_AIC_SRCTYPE_RISING;
60 break; 64 break;
61 case IRQT_LOW: 65 case IRQT_LOW:
62 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 66 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
67 srctype = AT91_AIC_SRCTYPE_LOW;
68 else
63 return -EINVAL; 69 return -EINVAL;
64 srctype = AT91_AIC_SRCTYPE_LOW;
65 break; 70 break;
66 case IRQT_FALLING: 71 case IRQT_FALLING:
67 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 72 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
73 srctype = AT91_AIC_SRCTYPE_FALLING;
74 else
68 return -EINVAL; 75 return -EINVAL;
69 srctype = AT91_AIC_SRCTYPE_FALLING;
70 break; 76 break;
71 default: 77 default:
72 return -EINVAL; 78 return -EINVAL;
@@ -139,7 +145,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
139 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 145 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
140 146
141 set_irq_chip(i, &at91_aic_chip); 147 set_irq_chip(i, &at91_aic_chip);
142 set_irq_handler(i, do_level_IRQ); 148 set_irq_handler(i, handle_level_irq);
143 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 149 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
144 150
145 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ 151 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 32c95d8eaacf..67aa5572a3ea 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -26,7 +26,10 @@
26#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28 28
29#include <asm/arch/at91_pmc.h>
30#include <asm/arch/at91rm9200_mc.h>
29#include <asm/arch/gpio.h> 31#include <asm/arch/gpio.h>
32#include <asm/arch/cpu.h>
30 33
31#include "generic.h" 34#include "generic.h"
32 35
@@ -68,9 +71,15 @@ static int at91_pm_verify_clocks(void)
68 scsr = at91_sys_read(AT91_PMC_SCSR); 71 scsr = at91_sys_read(AT91_PMC_SCSR);
69 72
70 /* USB must not be using PLLB */ 73 /* USB must not be using PLLB */
71 if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { 74 if (cpu_is_at91rm9200()) {
72 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 75 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
73 return 0; 76 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
77 return 0;
78 }
79 } else if (cpu_is_at91sam9260()) {
80#warning "Check SAM9260 USB clocks"
81 } else if (cpu_is_at91sam9261()) {
82#warning "Check SAM9261 USB clocks"
74 } 83 }
75 84
76#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 85#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -112,7 +121,6 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
112static void (*slow_clock)(void); 121static void (*slow_clock)(void);
113 122
114 123
115
116static int at91_pm_enter(suspend_state_t state) 124static int at91_pm_enter(suspend_state_t state)
117{ 125{
118 at91_gpio_suspend(); 126 at91_gpio_suspend();
@@ -123,13 +131,7 @@ static int at91_pm_enter(suspend_state_t state)
123 (at91_sys_read(AT91_PMC_PCSR) 131 (at91_sys_read(AT91_PMC_PCSR)
124 | (1 << AT91_ID_FIQ) 132 | (1 << AT91_ID_FIQ)
125 | (1 << AT91_ID_SYS) 133 | (1 << AT91_ID_SYS)
126 | (1 << AT91RM9200_ID_IRQ0) 134 | (at91_extern_irq))
127 | (1 << AT91RM9200_ID_IRQ1)
128 | (1 << AT91RM9200_ID_IRQ2)
129 | (1 << AT91RM9200_ID_IRQ3)
130 | (1 << AT91RM9200_ID_IRQ4)
131 | (1 << AT91RM9200_ID_IRQ5)
132 | (1 << AT91RM9200_ID_IRQ6))
133 & at91_sys_read(AT91_AIC_IMR), 135 & at91_sys_read(AT91_AIC_IMR),
134 state); 136 state);
135 137
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 09:26:33 -0500