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-rw-r--r--arch/arm/mach-at91rm9200/irq.c170
1 files changed, 170 insertions, 0 deletions
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
new file mode 100644
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1/*
2 * linux/arch/arm/mach-at91rm9200/irq.c
3 *
4 * Copyright (C) 2004 SAN People
5 * Copyright (C) 2004 ATMEL
6 * Copyright (C) Rick Bronson
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/config.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/mm.h>
27#include <linux/types.h>
28
29#include <asm/hardware.h>
30#include <asm/irq.h>
31#include <asm/mach-types.h>
32#include <asm/setup.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/irq.h>
36#include <asm/mach/map.h>
37
38#include "generic.h"
39
40/*
41 * The default interrupt priority levels (0 = lowest, 7 = highest).
42 */
43static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
44 7, /* Advanced Interrupt Controller */
45 7, /* System Peripheral */
46 0, /* Parallel IO Controller A */
47 0, /* Parallel IO Controller B */
48 0, /* Parallel IO Controller C */
49 0, /* Parallel IO Controller D */
50 6, /* USART 0 */
51 6, /* USART 1 */
52 6, /* USART 2 */
53 6, /* USART 3 */
54 0, /* Multimedia Card Interface */
55 4, /* USB Device Port */
56 0, /* Two-Wire Interface */
57 6, /* Serial Peripheral Interface */
58 5, /* Serial Synchronous Controller */
59 5, /* Serial Synchronous Controller */
60 5, /* Serial Synchronous Controller */
61 0, /* Timer Counter 0 */
62 0, /* Timer Counter 1 */
63 0, /* Timer Counter 2 */
64 0, /* Timer Counter 3 */
65 0, /* Timer Counter 4 */
66 0, /* Timer Counter 5 */
67 3, /* USB Host port */
68 3, /* Ethernet MAC */
69 0, /* Advanced Interrupt Controller */
70 0, /* Advanced Interrupt Controller */
71 0, /* Advanced Interrupt Controller */
72 0, /* Advanced Interrupt Controller */
73 0, /* Advanced Interrupt Controller */
74 0, /* Advanced Interrupt Controller */
75 0 /* Advanced Interrupt Controller */
76};
77
78
79static void at91rm9200_mask_irq(unsigned int irq)
80{
81 /* Disable interrupt on AIC */
82 at91_sys_write(AT91_AIC_IDCR, 1 << irq);
83}
84
85static void at91rm9200_unmask_irq(unsigned int irq)
86{
87 /* Enable interrupt on AIC */
88 at91_sys_write(AT91_AIC_IECR, 1 << irq);
89}
90
91static int at91rm9200_irq_type(unsigned irq, unsigned type)
92{
93 unsigned int smr, srctype;
94
95 /* change triggering only for FIQ and external IRQ0..IRQ6 */
96 if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ))
97 return -EINVAL;
98
99 switch (type) {
100 case IRQT_HIGH:
101 srctype = AT91_AIC_SRCTYPE_HIGH;
102 break;
103 case IRQT_RISING:
104 srctype = AT91_AIC_SRCTYPE_RISING;
105 break;
106 case IRQT_LOW:
107 srctype = AT91_AIC_SRCTYPE_LOW;
108 break;
109 case IRQT_FALLING:
110 srctype = AT91_AIC_SRCTYPE_FALLING;
111 break;
112 default:
113 return -EINVAL;
114 }
115
116 smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
117 at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
118 return 0;
119}
120
121static struct irqchip at91rm9200_irq_chip = {
122 .ack = at91rm9200_mask_irq,
123 .mask = at91rm9200_mask_irq,
124 .unmask = at91rm9200_unmask_irq,
125 .set_type = at91rm9200_irq_type,
126};
127
128/*
129 * Initialize the AIC interrupt controller.
130 */
131void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
132{
133 unsigned int i;
134
135 /* No priority list specified for this board -> use defaults */
136 if (priority == NULL)
137 priority = at91rm9200_default_irq_priority;
138
139 /*
140 * The IVR is used by macro get_irqnr_and_base to read and verify.
141 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
142 */
143 for (i = 0; i < NR_AIC_IRQS; i++) {
144 /* Put irq number in Source Vector Register: */
145 at91_sys_write(AT91_AIC_SVR(i), i);
146 /* Store the Source Mode Register as defined in table above */
147 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
148
149 set_irq_chip(i, &at91rm9200_irq_chip);
150 set_irq_handler(i, do_level_IRQ);
151 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
152
153 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
154 if (i < 8)
155 at91_sys_write(AT91_AIC_EOICR, 0);
156 }
157
158 /*
159 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
160 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
161 */
162 at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
163
164 /* No debugging in AIC: Debug (Protect) Control Register */
165 at91_sys_write(AT91_AIC_DCR, 0);
166
167 /* Disable and clear all interrupts initially */
168 at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
169 at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
170}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 09:44:28 -0500