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Diffstat (limited to 'arch/arm/mach-at91rm9200/gpio.c')
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c31
1 files changed, 29 insertions, 2 deletions
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index 2fd2ef583e4d..0e396feec468 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -159,6 +159,23 @@ int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
159} 159}
160EXPORT_SYMBOL(at91_set_deglitch); 160EXPORT_SYMBOL(at91_set_deglitch);
161 161
162/*
163 * enable/disable the multi-driver; This is only valid for output and
164 * allows the output pin to run as an open collector output.
165 */
166int __init_or_module at91_set_multi_drive(unsigned pin, int is_on)
167{
168 void __iomem *pio = pin_to_controller(pin);
169 unsigned mask = pin_to_mask(pin);
170
171 if (!pio)
172 return -EINVAL;
173
174 __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
175 return 0;
176}
177EXPORT_SYMBOL(at91_set_multi_drive);
178
162/*--------------------------------------------------------------------------*/ 179/*--------------------------------------------------------------------------*/
163 180
164 181
@@ -257,8 +274,18 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
257 gpio = &irq_desc[pin]; 274 gpio = &irq_desc[pin];
258 275
259 while (isr) { 276 while (isr) {
260 if (isr & 1) 277 if (isr & 1) {
261 gpio->handle(pin, gpio, regs); 278 if (unlikely(gpio->disable_depth)) {
279 /*
280 * The core ARM interrupt handler lazily disables IRQs so
281 * another IRQ must be generated before it actually gets
282 * here to be disabled on the GPIO controller.
283 */
284 gpio_irq_mask(pin);
285 }
286 else
287 gpio->handle(pin, gpio, regs);
288 }
262 pin++; 289 pin++;
263 gpio++; 290 gpio++;
264 isr >>= 1; 291 isr >>= 1;