diff options
Diffstat (limited to 'arch/arm/mach-at91rm9200/at91rm9200_time.c')
-rw-r--r-- | arch/arm/mach-at91rm9200/at91rm9200_time.c | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c new file mode 100644 index 000000000000..dc38e06ada63 --- /dev/null +++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c | |||
@@ -0,0 +1,141 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * Copyright (C) 2003 ATMEL | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #include <linux/init.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/sched.h> | ||
26 | #include <linux/time.h> | ||
27 | |||
28 | #include <asm/hardware.h> | ||
29 | #include <asm/io.h> | ||
30 | #include <asm/irq.h> | ||
31 | #include <asm/mach/time.h> | ||
32 | |||
33 | static unsigned long last_crtr; | ||
34 | |||
35 | /* | ||
36 | * The ST_CRTR is updated asynchronously to the master clock. It is therefore | ||
37 | * necessary to read it twice (with the same value) to ensure accuracy. | ||
38 | */ | ||
39 | static inline unsigned long read_CRTR(void) { | ||
40 | unsigned long x1, x2; | ||
41 | |||
42 | do { | ||
43 | x1 = at91_sys_read(AT91_ST_CRTR); | ||
44 | x2 = at91_sys_read(AT91_ST_CRTR); | ||
45 | } while (x1 != x2); | ||
46 | |||
47 | return x1; | ||
48 | } | ||
49 | |||
50 | /* | ||
51 | * Returns number of microseconds since last timer interrupt. Note that interrupts | ||
52 | * will have been disabled by do_gettimeofday() | ||
53 | * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. | ||
54 | * 'tick' is usecs per jiffy (linux/timex.h). | ||
55 | */ | ||
56 | static unsigned long at91rm9200_gettimeoffset(void) | ||
57 | { | ||
58 | unsigned long elapsed; | ||
59 | |||
60 | elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV; | ||
61 | |||
62 | return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; | ||
63 | } | ||
64 | |||
65 | /* | ||
66 | * IRQ handler for the timer. | ||
67 | */ | ||
68 | static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
69 | { | ||
70 | if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */ | ||
71 | write_seqlock(&xtime_lock); | ||
72 | |||
73 | while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) { | ||
74 | timer_tick(regs); | ||
75 | last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV; | ||
76 | } | ||
77 | |||
78 | write_sequnlock(&xtime_lock); | ||
79 | |||
80 | return IRQ_HANDLED; | ||
81 | } | ||
82 | else | ||
83 | return IRQ_NONE; /* not handled */ | ||
84 | } | ||
85 | |||
86 | static struct irqaction at91rm9200_timer_irq = { | ||
87 | .name = "at91_tick", | ||
88 | .flags = SA_SHIRQ | SA_INTERRUPT | SA_TIMER, | ||
89 | .handler = at91rm9200_timer_interrupt | ||
90 | }; | ||
91 | |||
92 | void at91rm9200_timer_reset(void) | ||
93 | { | ||
94 | last_crtr = 0; | ||
95 | |||
96 | /* Real time counter incremented every 30.51758 microseconds */ | ||
97 | at91_sys_write(AT91_ST_RTMR, 1); | ||
98 | |||
99 | /* Set Period Interval timer */ | ||
100 | at91_sys_write(AT91_ST_PIMR, LATCH); | ||
101 | |||
102 | /* Enable Period Interval Timer interrupt */ | ||
103 | at91_sys_write(AT91_ST_IER, AT91_ST_PITS); | ||
104 | } | ||
105 | |||
106 | /* | ||
107 | * Set up timer interrupt. | ||
108 | */ | ||
109 | void __init at91rm9200_timer_init(void) | ||
110 | { | ||
111 | /* Disable all timer interrupts */ | ||
112 | at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); | ||
113 | (void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */ | ||
114 | |||
115 | /* Make IRQs happen for the system timer */ | ||
116 | setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq); | ||
117 | |||
118 | /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */ | ||
119 | tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE; | ||
120 | |||
121 | /* Initialize and enable the timer interrupt */ | ||
122 | at91rm9200_timer_reset(); | ||
123 | } | ||
124 | |||
125 | #ifdef CONFIG_PM | ||
126 | static void at91rm9200_timer_suspend(void) | ||
127 | { | ||
128 | /* disable Period Interval Timer interrupt */ | ||
129 | at91_sys_write(AT91_ST_IDR, AT91_ST_PITS); | ||
130 | } | ||
131 | #else | ||
132 | #define at91rm9200_timer_suspend NULL | ||
133 | #endif | ||
134 | |||
135 | struct sys_timer at91rm9200_timer = { | ||
136 | .init = at91rm9200_timer_init, | ||
137 | .offset = at91rm9200_gettimeoffset, | ||
138 | .suspend = at91rm9200_timer_suspend, | ||
139 | .resume = at91rm9200_timer_reset, | ||
140 | }; | ||
141 | |||