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-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c154
1 files changed, 153 insertions, 1 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index e21cb845d112..ae04cbdf0bff 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -17,6 +17,7 @@
17 17
18#include <asm/hardware.h> 18#include <asm/hardware.h>
19#include "generic.h" 19#include "generic.h"
20#include "clock.h"
20 21
21static struct map_desc at91rm9200_io_desc[] __initdata = { 22static struct map_desc at91rm9200_io_desc[] __initdata = {
22 { 23 {
@@ -102,9 +103,160 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
102 }, 103 },
103}; 104};
104 105
105void __init at91rm9200_map_io(void) 106/* --------------------------------------------------------------------
107 * Clocks
108 * -------------------------------------------------------------------- */
109
110/*
111 * The peripheral clocks.
112 */
113static struct clk udc_clk = {
114 .name = "udc_clk",
115 .pmc_mask = 1 << AT91RM9200_ID_UDP,
116 .type = CLK_TYPE_PERIPHERAL,
117};
118static struct clk ohci_clk = {
119 .name = "ohci_clk",
120 .pmc_mask = 1 << AT91RM9200_ID_UHP,
121 .type = CLK_TYPE_PERIPHERAL,
122};
123static struct clk ether_clk = {
124 .name = "ether_clk",
125 .pmc_mask = 1 << AT91RM9200_ID_EMAC,
126 .type = CLK_TYPE_PERIPHERAL,
127};
128static struct clk mmc_clk = {
129 .name = "mci_clk",
130 .pmc_mask = 1 << AT91RM9200_ID_MCI,
131 .type = CLK_TYPE_PERIPHERAL,
132};
133static struct clk twi_clk = {
134 .name = "twi_clk",
135 .pmc_mask = 1 << AT91RM9200_ID_TWI,
136 .type = CLK_TYPE_PERIPHERAL,
137};
138static struct clk usart0_clk = {
139 .name = "usart0_clk",
140 .pmc_mask = 1 << AT91RM9200_ID_US0,
141 .type = CLK_TYPE_PERIPHERAL,
142};
143static struct clk usart1_clk = {
144 .name = "usart1_clk",
145 .pmc_mask = 1 << AT91RM9200_ID_US1,
146 .type = CLK_TYPE_PERIPHERAL,
147};
148static struct clk usart2_clk = {
149 .name = "usart2_clk",
150 .pmc_mask = 1 << AT91RM9200_ID_US2,
151 .type = CLK_TYPE_PERIPHERAL,
152};
153static struct clk usart3_clk = {
154 .name = "usart3_clk",
155 .pmc_mask = 1 << AT91RM9200_ID_US3,
156 .type = CLK_TYPE_PERIPHERAL,
157};
158static struct clk spi_clk = {
159 .name = "spi_clk",
160 .pmc_mask = 1 << AT91RM9200_ID_SPI,
161 .type = CLK_TYPE_PERIPHERAL,
162};
163static struct clk pioA_clk = {
164 .name = "pioA_clk",
165 .pmc_mask = 1 << AT91RM9200_ID_PIOA,
166 .type = CLK_TYPE_PERIPHERAL,
167};
168static struct clk pioB_clk = {
169 .name = "pioB_clk",
170 .pmc_mask = 1 << AT91RM9200_ID_PIOB,
171 .type = CLK_TYPE_PERIPHERAL,
172};
173static struct clk pioC_clk = {
174 .name = "pioC_clk",
175 .pmc_mask = 1 << AT91RM9200_ID_PIOC,
176 .type = CLK_TYPE_PERIPHERAL,
177};
178static struct clk pioD_clk = {
179 .name = "pioD_clk",
180 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
181 .type = CLK_TYPE_PERIPHERAL,
182};
183
184static struct clk *periph_clocks[] __initdata = {
185 &pioA_clk,
186 &pioB_clk,
187 &pioC_clk,
188 &pioD_clk,
189 &usart0_clk,
190 &usart1_clk,
191 &usart2_clk,
192 &usart3_clk,
193 &mmc_clk,
194 &udc_clk,
195 &twi_clk,
196 &spi_clk,
197 // ssc 0 .. ssc2
198 // tc0 .. tc5
199 &ohci_clk,
200 &ether_clk,
201 // irq0 .. irq6
202};
203
204/*
205 * The four programmable clocks.
206 * You must configure pin multiplexing to bring these signals out.
207 */
208static struct clk pck0 = {
209 .name = "pck0",
210 .pmc_mask = AT91_PMC_PCK0,
211 .type = CLK_TYPE_PROGRAMMABLE,
212 .id = 0,
213};
214static struct clk pck1 = {
215 .name = "pck1",
216 .pmc_mask = AT91_PMC_PCK1,
217 .type = CLK_TYPE_PROGRAMMABLE,
218 .id = 1,
219};
220static struct clk pck2 = {
221 .name = "pck2",
222 .pmc_mask = AT91_PMC_PCK2,
223 .type = CLK_TYPE_PROGRAMMABLE,
224 .id = 2,
225};
226static struct clk pck3 = {
227 .name = "pck3",
228 .pmc_mask = AT91_PMC_PCK3,
229 .type = CLK_TYPE_PROGRAMMABLE,
230 .id = 3,
231};
232
233static void __init at91rm9200_register_clocks(void)
106{ 234{
235 int i;
236
237 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
238 clk_register(periph_clocks[i]);
239
240 clk_register(&pck0);
241 clk_register(&pck1);
242 clk_register(&pck2);
243 clk_register(&pck3);
244}
245
246
247/* --------------------------------------------------------------------
248 * AT91RM9200 processor initialization
249 * -------------------------------------------------------------------- */
250void __init at91rm9200_initialize(unsigned long main_clock)
251{
252 /* Map peripherals */
107 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 253 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
254
255 /* Init clock subsystem */
256 at91_clock_init(main_clock);
257
258 /* Register the processor-specific clocks */
259 at91rm9200_register_clocks();
108} 260}
109 261
110/* 262/*