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-rw-r--r--arch/arm/mach-at91/Kconfig49
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt18
-rw-r--r--arch/arm/mach-at91/Makefile9
-rw-r--r--arch/arm/mach-at91/at91_rstc.h53
-rw-r--r--arch/arm/mach-at91/at91_shdwc.h50
-rw-r--r--arch/arm/mach-at91/at91sam9260.c51
-rw-r--r--arch/arm/mach-at91/at91sam9261.c51
-rw-r--r--arch/arm/mach-at91/at91sam9263.c51
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c294
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S40
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c55
-rw-r--r--arch/arm/mach-at91/at91sam9g45_reset.S45
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c51
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c4
-rw-r--r--arch/arm/mach-at91/board-cam60.c4
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c4
-rw-r--r--arch/arm/mach-at91/board-dt-rm9200.c18
-rw-r--r--arch/arm/mach-at91/board-dt-sam9.c23
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c60
-rw-r--r--arch/arm/mach-at91/board-flexibity.c4
-rw-r--r--arch/arm/mach-at91/board-foxg20.c272
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c2
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c232
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c4
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c7
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c4
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c5
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c4
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c4
-rw-r--r--arch/arm/mach-at91/clock.c1
-rw-r--r--arch/arm/mach-at91/generic.h19
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pio.h6
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h22
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S5
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h23
-rw-r--r--arch/arm/mach-at91/include/mach/sama5d4.h33
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h21
-rw-r--r--arch/arm/mach-at91/irq.c270
-rw-r--r--arch/arm/mach-at91/pm.c104
-rw-r--r--arch/arm/mach-at91/sama5d4.c64
-rw-r--r--arch/arm/mach-at91/setup.c273
-rw-r--r--arch/arm/mach-at91/soc.h7
46 files changed, 678 insertions, 1655 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 6cc6f7aebdae..0e6d548b70d9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -12,6 +12,9 @@ config HAVE_AT91_DBGU0
12config HAVE_AT91_DBGU1 12config HAVE_AT91_DBGU1
13 bool 13 bool
14 14
15config HAVE_AT91_DBGU2
16 bool
17
15config AT91_USE_OLD_CLK 18config AT91_USE_OLD_CLK
16 bool 19 bool
17 20
@@ -28,36 +31,33 @@ config OLD_CLK_AT91
28 bool 31 bool
29 default AT91_PMC_UNIT && AT91_USE_OLD_CLK 32 default AT91_PMC_UNIT && AT91_USE_OLD_CLK
30 33
31config AT91_SAM9_ALT_RESET 34config OLD_IRQ_AT91
32 bool 35 bool
33 default !ARCH_AT91X40 36 select MULTI_IRQ_HANDLER
34 37 select SPARSE_IRQ
35config AT91_SAM9G45_RESET
36 bool
37 default !ARCH_AT91X40
38 38
39config AT91_SAM9_TIME 39config HAVE_AT91_SMD
40 bool 40 bool
41 41
42config HAVE_AT91_SMD 42config HAVE_AT91_H32MX
43 bool 43 bool
44 44
45config SOC_AT91SAM9 45config SOC_AT91SAM9
46 bool 46 bool
47 select AT91_SAM9_TIME 47 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
48 select CPU_ARM926T 48 select CPU_ARM926T
49 select GENERIC_CLOCKEVENTS 49 select GENERIC_CLOCKEVENTS
50 select MULTI_IRQ_HANDLER 50 select MEMORY if USE_OF
51 select SPARSE_IRQ 51 select ATMEL_SDRAMC if USE_OF
52 52
53config SOC_SAMA5 53config SOC_SAMA5
54 bool 54 bool
55 select AT91_SAM9_TIME 55 select ATMEL_AIC5_IRQ
56 select CPU_V7 56 select CPU_V7
57 select GENERIC_CLOCKEVENTS 57 select GENERIC_CLOCKEVENTS
58 select MULTI_IRQ_HANDLER
59 select SPARSE_IRQ
60 select USE_OF 58 select USE_OF
59 select MEMORY
60 select ATMEL_SDRAMC
61 61
62menu "Atmel AT91 System-on-Chip" 62menu "Atmel AT91 System-on-Chip"
63 63
@@ -70,8 +70,7 @@ config ARCH_AT91X40
70 depends on !MMU 70 depends on !MMU
71 select CPU_ARM7TDMI 71 select CPU_ARM7TDMI
72 select ARCH_USES_GETTIMEOFFSET 72 select ARCH_USES_GETTIMEOFFSET
73 select MULTI_IRQ_HANDLER 73 select OLD_IRQ_AT91
74 select SPARSE_IRQ
75 74
76 help 75 help
77 Select this if you are using one of Atmel's AT91X40 SoC. 76 Select this if you are using one of Atmel's AT91X40 SoC.
@@ -103,16 +102,30 @@ config SOC_SAMA5D3
103 help 102 help
104 Select this if you are using one of Atmel's SAMA5D3 family SoC. 103 Select this if you are using one of Atmel's SAMA5D3 family SoC.
105 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36. 104 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
105
106config SOC_SAMA5D4
107 bool "SAMA5D4 family"
108 select SOC_SAMA5
109 select HAVE_AT91_DBGU2
110 select CLKSRC_MMIO
111 select CACHE_L2X0
112 select CACHE_PL310
113 select HAVE_FB_ATMEL
114 select HAVE_AT91_UTMI
115 select HAVE_AT91_SMD
116 select HAVE_AT91_USB_CLK
117 select HAVE_AT91_H32MX
118 help
119 Select this if you are using one of Atmel's SAMA5D4 family SoC.
106endif 120endif
107 121
108if SOC_SAM_V4_V5 122if SOC_SAM_V4_V5
109config SOC_AT91RM9200 123config SOC_AT91RM9200
110 bool "AT91RM9200" 124 bool "AT91RM9200"
125 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
111 select CPU_ARM920T 126 select CPU_ARM920T
112 select GENERIC_CLOCKEVENTS 127 select GENERIC_CLOCKEVENTS
113 select HAVE_AT91_DBGU0 128 select HAVE_AT91_DBGU0
114 select MULTI_IRQ_HANDLER
115 select SPARSE_IRQ
116 select HAVE_AT91_USB_CLK 129 select HAVE_AT91_USB_CLK
117 130
118config SOC_AT91SAM9260 131config SOC_AT91SAM9260
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 44ace320d2e1..d8e88219edb4 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -14,31 +14,37 @@ config ARCH_AT91RM9200
14 bool "AT91RM9200" 14 bool "AT91RM9200"
15 select SOC_AT91RM9200 15 select SOC_AT91RM9200
16 select AT91_USE_OLD_CLK 16 select AT91_USE_OLD_CLK
17 select OLD_IRQ_AT91
17 18
18config ARCH_AT91SAM9260 19config ARCH_AT91SAM9260
19 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20" 20 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
20 select SOC_AT91SAM9260 21 select SOC_AT91SAM9260
21 select AT91_USE_OLD_CLK 22 select AT91_USE_OLD_CLK
23 select OLD_IRQ_AT91
22 24
23config ARCH_AT91SAM9261 25config ARCH_AT91SAM9261
24 bool "AT91SAM9261 or AT91SAM9G10" 26 bool "AT91SAM9261 or AT91SAM9G10"
25 select SOC_AT91SAM9261 27 select SOC_AT91SAM9261
26 select AT91_USE_OLD_CLK 28 select AT91_USE_OLD_CLK
29 select OLD_IRQ_AT91
27 30
28config ARCH_AT91SAM9263 31config ARCH_AT91SAM9263
29 bool "AT91SAM9263" 32 bool "AT91SAM9263"
30 select SOC_AT91SAM9263 33 select SOC_AT91SAM9263
31 select AT91_USE_OLD_CLK 34 select AT91_USE_OLD_CLK
35 select OLD_IRQ_AT91
32 36
33config ARCH_AT91SAM9RL 37config ARCH_AT91SAM9RL
34 bool "AT91SAM9RL" 38 bool "AT91SAM9RL"
35 select SOC_AT91SAM9RL 39 select SOC_AT91SAM9RL
36 select AT91_USE_OLD_CLK 40 select AT91_USE_OLD_CLK
41 select OLD_IRQ_AT91
37 42
38config ARCH_AT91SAM9G45 43config ARCH_AT91SAM9G45
39 bool "AT91SAM9G45" 44 bool "AT91SAM9G45"
40 select SOC_AT91SAM9G45 45 select SOC_AT91SAM9G45
41 select AT91_USE_OLD_CLK 46 select AT91_USE_OLD_CLK
47 select OLD_IRQ_AT91
42 48
43endchoice 49endchoice
44 50
@@ -132,12 +138,6 @@ config MACH_ECO920
132 bool "eco920" 138 bool "eco920"
133 help 139 help
134 Select this if you are using the eco920 board 140 Select this if you are using the eco920 board
135
136config MACH_RSI_EWS
137 bool "RSI Embedded Webserver"
138 depends on ARCH_AT91RM9200
139 help
140 Select this if you are using RSIs EWS board.
141endif 141endif
142 142
143# ---------------------------------------------------------- 143# ----------------------------------------------------------
@@ -212,12 +212,6 @@ config MACH_CPU9G20
212 Select this if you are using a Eukrea Electromatique's 212 Select this if you are using a Eukrea Electromatique's
213 CPU9G20 Board <http://www.eukrea.com/> 213 CPU9G20 Board <http://www.eukrea.com/>
214 214
215config MACH_ACMENETUSFOXG20
216 bool "Acme Systems srl FOX Board G20"
217 help
218 Select this if you are using Acme Systems
219 FOX Board G20 <http://www.acmesystems.it>
220
221config MACH_PORTUXG20 215config MACH_PORTUXG20
222 bool "taskit PortuxG20" 216 bool "taskit PortuxG20"
223 help 217 help
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 78e9cec282f4..ac99d87ffefe 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,15 +2,13 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := irq.o gpio.o setup.o sysirq_mask.o 5obj-y := gpio.o setup.o sysirq_mask.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
9 9
10obj-$(CONFIG_OLD_IRQ_AT91) += irq.o
10obj-$(CONFIG_OLD_CLK_AT91) += clock.o 11obj-$(CONFIG_OLD_CLK_AT91) += clock.o
11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
13obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o
14obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o 12obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
15 13
16# CPU-specific support 14# CPU-specific support
@@ -23,6 +21,7 @@ obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o
23obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o 21obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
24obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o 22obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
25obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o 23obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
24obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
26 25
27obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o 26obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
28obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o 27obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
@@ -46,7 +45,6 @@ obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
46obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o 45obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
47obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o 46obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
48obj-$(CONFIG_MACH_ECO920) += board-eco920.o 47obj-$(CONFIG_MACH_ECO920) += board-eco920.o
49obj-$(CONFIG_MACH_RSI_EWS) += board-rsi-ews.o
50 48
51# AT91SAM9260 board-specific support 49# AT91SAM9260 board-specific support
52obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o 50obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
@@ -69,7 +67,6 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
69# AT91SAM9G20 board-specific support 67# AT91SAM9G20 board-specific support
70obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o 68obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
71obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 69obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
72obj-$(CONFIG_MACH_ACMENETUSFOXG20) += board-foxg20.o
73obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o 70obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
74obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o 71obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
75obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o 72obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
diff --git a/arch/arm/mach-at91/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h
deleted file mode 100644
index a600e6992920..000000000000
--- a/arch/arm/mach-at91/at91_rstc.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_rstc.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Reset Controller (RSTC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_RSTC_H
17#define AT91_RSTC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_rstc_base;
21
22#define at91_rstc_read(field) \
23 __raw_readl(at91_rstc_base + field)
24
25#define at91_rstc_write(field, value) \
26 __raw_writel(value, at91_rstc_base + field)
27#else
28.extern at91_rstc_base
29#endif
30
31#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
32#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
33#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
34#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
35#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
36
37#define AT91_RSTC_SR 0x04 /* Reset Controller Status Register */
38#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
39#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
40#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
41#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
42#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
43#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
44#define AT91_RSTC_RSTTYP_USER (4 << 8)
45#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
46#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
47
48#define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
49#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
50#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
51#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
52
53#endif
diff --git a/arch/arm/mach-at91/at91_shdwc.h b/arch/arm/mach-at91/at91_shdwc.h
deleted file mode 100644
index 9e29f31ec9a6..000000000000
--- a/arch/arm/mach-at91/at91_shdwc.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_shdwc.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Shutdown Controller (SHDWC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_SHDWC_H
17#define AT91_SHDWC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_shdwc_base;
21
22#define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
24
25#define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field)
27#endif
28
29#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
30#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
31#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
32
33#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
34#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
35#define AT91_SHDW_WKMODE0_NONE 0
36#define AT91_SHDW_WKMODE0_HIGH 1
37#define AT91_SHDW_WKMODE0_LOW 2
38#define AT91_SHDW_WKMODE0_ANYLEVEL 3
39#define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */
40#define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
41#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
42#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
43#define AT91_SHDW_RTCWKEN (1 << 17) /* Real Time Clock Wake-up Enable */
44
45#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
46#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
47#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
48#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
49
50#endif
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 3477ba94c4c5..aab1f969a7c3 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -24,7 +25,6 @@
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25 26
26#include "at91_aic.h" 27#include "at91_aic.h"
27#include "at91_rstc.h"
28#include "soc.h" 28#include "soc.h"
29#include "generic.h" 29#include "generic.h"
30#include "sam9_smc.h" 30#include "sam9_smc.h"
@@ -342,8 +342,6 @@ static void __init at91sam9260_map_io(void)
342 342
343static void __init at91sam9260_ioremap_registers(void) 343static void __init at91sam9260_ioremap_registers(void)
344{ 344{
345 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
346 at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
347 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512); 345 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
348 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); 346 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
349 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); 347 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
@@ -354,7 +352,6 @@ static void __init at91sam9260_ioremap_registers(void)
354static void __init at91sam9260_initialize(void) 352static void __init at91sam9260_initialize(void)
355{ 353{
356 arm_pm_idle = at91sam9_idle; 354 arm_pm_idle = at91sam9_idle;
357 arm_pm_restart = at91sam9_alt_restart;
358 355
359 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); 356 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
360 357
@@ -362,6 +359,45 @@ static void __init at91sam9260_initialize(void)
362 at91_gpio_init(at91sam9260_gpio, 3); 359 at91_gpio_init(at91sam9260_gpio, 3);
363} 360}
364 361
362static struct resource rstc_resources[] = {
363 [0] = {
364 .start = AT91SAM9260_BASE_RSTC,
365 .end = AT91SAM9260_BASE_RSTC + SZ_16 - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = AT91SAM9260_BASE_SDRAMC,
370 .end = AT91SAM9260_BASE_SDRAMC + SZ_512 - 1,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device rstc_device = {
376 .name = "at91-sam9260-reset",
377 .resource = rstc_resources,
378 .num_resources = ARRAY_SIZE(rstc_resources),
379};
380
381static struct resource shdwc_resources[] = {
382 [0] = {
383 .start = AT91SAM9260_BASE_SHDWC,
384 .end = AT91SAM9260_BASE_SHDWC + SZ_16 - 1,
385 .flags = IORESOURCE_MEM,
386 },
387};
388
389static struct platform_device shdwc_device = {
390 .name = "at91-poweroff",
391 .resource = shdwc_resources,
392 .num_resources = ARRAY_SIZE(shdwc_resources),
393};
394
395static void __init at91sam9260_register_devices(void)
396{
397 platform_device_register(&rstc_device);
398 platform_device_register(&shdwc_device);
399}
400
365/* -------------------------------------------------------------------- 401/* --------------------------------------------------------------------
366 * Interrupt initialization 402 * Interrupt initialization
367 * -------------------------------------------------------------------- */ 403 * -------------------------------------------------------------------- */
@@ -404,6 +440,11 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
404 0, /* Advanced Interrupt Controller */ 440 0, /* Advanced Interrupt Controller */
405}; 441};
406 442
443static void __init at91sam9260_init_time(void)
444{
445 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
446}
447
407AT91_SOC_START(at91sam9260) 448AT91_SOC_START(at91sam9260)
408 .map_io = at91sam9260_map_io, 449 .map_io = at91sam9260_map_io,
409 .default_irq_priority = at91sam9260_default_irq_priority, 450 .default_irq_priority = at91sam9260_default_irq_priority,
@@ -411,5 +452,7 @@ AT91_SOC_START(at91sam9260)
411 | (1 << AT91SAM9260_ID_IRQ2), 452 | (1 << AT91SAM9260_ID_IRQ2),
412 .ioremap_registers = at91sam9260_ioremap_registers, 453 .ioremap_registers = at91sam9260_ioremap_registers,
413 .register_clocks = at91sam9260_register_clocks, 454 .register_clocks = at91sam9260_register_clocks,
455 .register_devices = at91sam9260_register_devices,
414 .init = at91sam9260_initialize, 456 .init = at91sam9260_initialize,
457 .init_time = at91sam9260_init_time,
415AT91_SOC_END 458AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index fb164a5d04a9..a8bd35963332 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -23,7 +24,6 @@
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24 25
25#include "at91_aic.h" 26#include "at91_aic.h"
26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
@@ -301,8 +301,6 @@ static void __init at91sam9261_map_io(void)
301 301
302static void __init at91sam9261_ioremap_registers(void) 302static void __init at91sam9261_ioremap_registers(void)
303{ 303{
304 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
305 at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
306 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512); 304 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
307 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); 305 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
308 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); 306 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
@@ -313,7 +311,6 @@ static void __init at91sam9261_ioremap_registers(void)
313static void __init at91sam9261_initialize(void) 311static void __init at91sam9261_initialize(void)
314{ 312{
315 arm_pm_idle = at91sam9_idle; 313 arm_pm_idle = at91sam9_idle;
316 arm_pm_restart = at91sam9_alt_restart;
317 314
318 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); 315 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
319 316
@@ -321,6 +318,45 @@ static void __init at91sam9261_initialize(void)
321 at91_gpio_init(at91sam9261_gpio, 3); 318 at91_gpio_init(at91sam9261_gpio, 3);
322} 319}
323 320
321static struct resource rstc_resources[] = {
322 [0] = {
323 .start = AT91SAM9261_BASE_RSTC,
324 .end = AT91SAM9261_BASE_RSTC + SZ_16 - 1,
325 .flags = IORESOURCE_MEM,
326 },
327 [1] = {
328 .start = AT91SAM9261_BASE_SDRAMC,
329 .end = AT91SAM9261_BASE_SDRAMC + SZ_512 - 1,
330 .flags = IORESOURCE_MEM,
331 },
332};
333
334static struct platform_device rstc_device = {
335 .name = "at91-sam9260-reset",
336 .resource = rstc_resources,
337 .num_resources = ARRAY_SIZE(rstc_resources),
338};
339
340static struct resource shdwc_resources[] = {
341 [0] = {
342 .start = AT91SAM9261_BASE_SHDWC,
343 .end = AT91SAM9261_BASE_SHDWC + SZ_16 - 1,
344 .flags = IORESOURCE_MEM,
345 },
346};
347
348static struct platform_device shdwc_device = {
349 .name = "at91-poweroff",
350 .resource = shdwc_resources,
351 .num_resources = ARRAY_SIZE(shdwc_resources),
352};
353
354static void __init at91sam9261_register_devices(void)
355{
356 platform_device_register(&rstc_device);
357 platform_device_register(&shdwc_device);
358}
359
324/* -------------------------------------------------------------------- 360/* --------------------------------------------------------------------
325 * Interrupt initialization 361 * Interrupt initialization
326 * -------------------------------------------------------------------- */ 362 * -------------------------------------------------------------------- */
@@ -363,6 +399,11 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
363 0, /* Advanced Interrupt Controller */ 399 0, /* Advanced Interrupt Controller */
364}; 400};
365 401
402static void __init at91sam9261_init_time(void)
403{
404 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
405}
406
366AT91_SOC_START(at91sam9261) 407AT91_SOC_START(at91sam9261)
367 .map_io = at91sam9261_map_io, 408 .map_io = at91sam9261_map_io,
368 .default_irq_priority = at91sam9261_default_irq_priority, 409 .default_irq_priority = at91sam9261_default_irq_priority,
@@ -370,5 +411,7 @@ AT91_SOC_START(at91sam9261)
370 | (1 << AT91SAM9261_ID_IRQ2), 411 | (1 << AT91SAM9261_ID_IRQ2),
371 .ioremap_registers = at91sam9261_ioremap_registers, 412 .ioremap_registers = at91sam9261_ioremap_registers,
372 .register_clocks = at91sam9261_register_clocks, 413 .register_clocks = at91sam9261_register_clocks,
414 .register_devices = at91sam9261_register_devices,
373 .init = at91sam9261_initialize, 415 .init = at91sam9261_initialize,
416 .init_time = at91sam9261_init_time,
374AT91_SOC_END 417AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 810fa5f15a51..fbff228cc63e 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -22,7 +23,6 @@
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23 24
24#include "at91_aic.h" 25#include "at91_aic.h"
25#include "at91_rstc.h"
26#include "soc.h" 26#include "soc.h"
27#include "generic.h" 27#include "generic.h"
28#include "sam9_smc.h" 28#include "sam9_smc.h"
@@ -321,8 +321,6 @@ static void __init at91sam9263_map_io(void)
321 321
322static void __init at91sam9263_ioremap_registers(void) 322static void __init at91sam9263_ioremap_registers(void)
323{ 323{
324 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
325 at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
326 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512); 324 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
327 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512); 325 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
328 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); 326 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
@@ -335,7 +333,6 @@ static void __init at91sam9263_ioremap_registers(void)
335static void __init at91sam9263_initialize(void) 333static void __init at91sam9263_initialize(void)
336{ 334{
337 arm_pm_idle = at91sam9_idle; 335 arm_pm_idle = at91sam9_idle;
338 arm_pm_restart = at91sam9_alt_restart;
339 336
340 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); 337 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
341 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); 338 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
@@ -344,6 +341,45 @@ static void __init at91sam9263_initialize(void)
344 at91_gpio_init(at91sam9263_gpio, 5); 341 at91_gpio_init(at91sam9263_gpio, 5);
345} 342}
346 343
344static struct resource rstc_resources[] = {
345 [0] = {
346 .start = AT91SAM9263_BASE_RSTC,
347 .end = AT91SAM9263_BASE_RSTC + SZ_16 - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 [1] = {
351 .start = AT91SAM9263_BASE_SDRAMC0,
352 .end = AT91SAM9263_BASE_SDRAMC0 + SZ_512 - 1,
353 .flags = IORESOURCE_MEM,
354 },
355};
356
357static struct platform_device rstc_device = {
358 .name = "at91-sam9260-reset",
359 .resource = rstc_resources,
360 .num_resources = ARRAY_SIZE(rstc_resources),
361};
362
363static struct resource shdwc_resources[] = {
364 [0] = {
365 .start = AT91SAM9263_BASE_SHDWC,
366 .end = AT91SAM9263_BASE_SHDWC + SZ_16 - 1,
367 .flags = IORESOURCE_MEM,
368 },
369};
370
371static struct platform_device shdwc_device = {
372 .name = "at91-poweroff",
373 .resource = shdwc_resources,
374 .num_resources = ARRAY_SIZE(shdwc_resources),
375};
376
377static void __init at91sam9263_register_devices(void)
378{
379 platform_device_register(&rstc_device);
380 platform_device_register(&shdwc_device);
381}
382
347/* -------------------------------------------------------------------- 383/* --------------------------------------------------------------------
348 * Interrupt initialization 384 * Interrupt initialization
349 * -------------------------------------------------------------------- */ 385 * -------------------------------------------------------------------- */
@@ -386,11 +422,18 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
386 0, /* Advanced Interrupt Controller (IRQ1) */ 422 0, /* Advanced Interrupt Controller (IRQ1) */
387}; 423};
388 424
425static void __init at91sam9263_init_time(void)
426{
427 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
428}
429
389AT91_SOC_START(at91sam9263) 430AT91_SOC_START(at91sam9263)
390 .map_io = at91sam9263_map_io, 431 .map_io = at91sam9263_map_io,
391 .default_irq_priority = at91sam9263_default_irq_priority, 432 .default_irq_priority = at91sam9263_default_irq_priority,
392 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1), 433 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
393 .ioremap_registers = at91sam9263_ioremap_registers, 434 .ioremap_registers = at91sam9263_ioremap_registers,
394 .register_clocks = at91sam9263_register_clocks, 435 .register_clocks = at91sam9263_register_clocks,
436 .register_devices = at91sam9263_register_devices,
395 .init = at91sam9263_initialize, 437 .init = at91sam9263_initialize,
438 .init_time = at91sam9263_init_time,
396AT91_SOC_END 439AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
deleted file mode 100644
index 0a9e2fc8f796..000000000000
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ /dev/null
@@ -1,294 +0,0 @@
1/*
2 * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
3 *
4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
6 * Converted to ClockSource/ClockEvents by David Brownell.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/kernel.h>
15#include <linux/clk.h>
16#include <linux/clockchips.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20
21#include <asm/mach/time.h>
22#include <mach/hardware.h>
23
24#define AT91_PIT_MR 0x00 /* Mode Register */
25#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
26#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
27#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
28
29#define AT91_PIT_SR 0x04 /* Status Register */
30#define AT91_PIT_PITS (1 << 0) /* Timer Status */
31
32#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
33#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
34#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
35#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
36
37#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
38#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
39
40static u32 pit_cycle; /* write-once */
41static u32 pit_cnt; /* access only w/system irq blocked */
42static void __iomem *pit_base_addr __read_mostly;
43static struct clk *mck;
44
45static inline unsigned int pit_read(unsigned int reg_offset)
46{
47 return __raw_readl(pit_base_addr + reg_offset);
48}
49
50static inline void pit_write(unsigned int reg_offset, unsigned long value)
51{
52 __raw_writel(value, pit_base_addr + reg_offset);
53}
54
55/*
56 * Clocksource: just a monotonic counter of MCK/16 cycles.
57 * We don't care whether or not PIT irqs are enabled.
58 */
59static cycle_t read_pit_clk(struct clocksource *cs)
60{
61 unsigned long flags;
62 u32 elapsed;
63 u32 t;
64
65 raw_local_irq_save(flags);
66 elapsed = pit_cnt;
67 t = pit_read(AT91_PIT_PIIR);
68 raw_local_irq_restore(flags);
69
70 elapsed += PIT_PICNT(t) * pit_cycle;
71 elapsed += PIT_CPIV(t);
72 return elapsed;
73}
74
75static struct clocksource pit_clk = {
76 .name = "pit",
77 .rating = 175,
78 .read = read_pit_clk,
79 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
80};
81
82
83/*
84 * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
85 */
86static void
87pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
88{
89 switch (mode) {
90 case CLOCK_EVT_MODE_PERIODIC:
91 /* update clocksource counter */
92 pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
93 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
94 | AT91_PIT_PITIEN);
95 break;
96 case CLOCK_EVT_MODE_ONESHOT:
97 BUG();
98 /* FALLTHROUGH */
99 case CLOCK_EVT_MODE_SHUTDOWN:
100 case CLOCK_EVT_MODE_UNUSED:
101 /* disable irq, leaving the clocksource active */
102 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
103 break;
104 case CLOCK_EVT_MODE_RESUME:
105 break;
106 }
107}
108
109static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
110{
111 /* Disable timer */
112 pit_write(AT91_PIT_MR, 0);
113}
114
115static void at91sam926x_pit_reset(void)
116{
117 /* Disable timer and irqs */
118 pit_write(AT91_PIT_MR, 0);
119
120 /* Clear any pending interrupts, wait for PIT to stop counting */
121 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
122 cpu_relax();
123
124 /* Start PIT but don't enable IRQ */
125 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
126}
127
128static void at91sam926x_pit_resume(struct clock_event_device *cedev)
129{
130 at91sam926x_pit_reset();
131}
132
133static struct clock_event_device pit_clkevt = {
134 .name = "pit",
135 .features = CLOCK_EVT_FEAT_PERIODIC,
136 .shift = 32,
137 .rating = 100,
138 .set_mode = pit_clkevt_mode,
139 .suspend = at91sam926x_pit_suspend,
140 .resume = at91sam926x_pit_resume,
141};
142
143
144/*
145 * IRQ handler for the timer.
146 */
147static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
148{
149 /*
150 * irqs should be disabled here, but as the irq is shared they are only
151 * guaranteed to be off if the timer irq is registered first.
152 */
153 WARN_ON_ONCE(!irqs_disabled());
154
155 /* The PIT interrupt may be disabled, and is shared */
156 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
157 && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
158 unsigned nr_ticks;
159
160 /* Get number of ticks performed before irq, and ack it */
161 nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
162 do {
163 pit_cnt += pit_cycle;
164 pit_clkevt.event_handler(&pit_clkevt);
165 nr_ticks--;
166 } while (nr_ticks);
167
168 return IRQ_HANDLED;
169 }
170
171 return IRQ_NONE;
172}
173
174static struct irqaction at91sam926x_pit_irq = {
175 .name = "at91_tick",
176 .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
177 .handler = at91sam926x_pit_interrupt,
178 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
179};
180
181#ifdef CONFIG_OF
182static struct of_device_id pit_timer_ids[] = {
183 { .compatible = "atmel,at91sam9260-pit" },
184 { /* sentinel */ }
185};
186
187static int __init of_at91sam926x_pit_init(void)
188{
189 struct device_node *np;
190 int ret;
191
192 np = of_find_matching_node(NULL, pit_timer_ids);
193 if (!np)
194 goto err;
195
196 pit_base_addr = of_iomap(np, 0);
197 if (!pit_base_addr)
198 goto node_err;
199
200 mck = of_clk_get(np, 0);
201
202 /* Get the interrupts property */
203 ret = irq_of_parse_and_map(np, 0);
204 if (!ret) {
205 pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
206 if (!IS_ERR(mck))
207 clk_put(mck);
208 goto ioremap_err;
209 }
210 at91sam926x_pit_irq.irq = ret;
211
212 of_node_put(np);
213
214 return 0;
215
216ioremap_err:
217 iounmap(pit_base_addr);
218node_err:
219 of_node_put(np);
220err:
221 return -EINVAL;
222}
223#else
224static int __init of_at91sam926x_pit_init(void)
225{
226 return -EINVAL;
227}
228#endif
229
230/*
231 * Set up both clocksource and clockevent support.
232 */
233void __init at91sam926x_pit_init(void)
234{
235 unsigned long pit_rate;
236 unsigned bits;
237 int ret;
238
239 mck = ERR_PTR(-ENOENT);
240
241 /* For device tree enabled device: initialize here */
242 of_at91sam926x_pit_init();
243
244 /*
245 * Use our actual MCK to figure out how many MCK/16 ticks per
246 * 1/HZ period (instead of a compile-time constant LATCH).
247 */
248 if (IS_ERR(mck))
249 mck = clk_get(NULL, "mck");
250
251 if (IS_ERR(mck))
252 panic("AT91: PIT: Unable to get mck clk\n");
253 pit_rate = clk_get_rate(mck) / 16;
254 pit_cycle = (pit_rate + HZ/2) / HZ;
255 WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
256
257 /* Initialize and enable the timer */
258 at91sam926x_pit_reset();
259
260 /*
261 * Register clocksource. The high order bits of PIV are unused,
262 * so this isn't a 32-bit counter unless we get clockevent irqs.
263 */
264 bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
265 pit_clk.mask = CLOCKSOURCE_MASK(bits);
266 clocksource_register_hz(&pit_clk, pit_rate);
267
268 /* Set up irq handler */
269 ret = setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
270 if (ret)
271 pr_crit("AT91: PIT: Unable to setup IRQ\n");
272
273 /* Set up and register clockevents */
274 pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
275 pit_clkevt.cpumask = cpumask_of(0);
276 clockevents_register_device(&pit_clkevt);
277}
278
279void __init at91sam926x_ioremap_pit(u32 addr)
280{
281#if defined(CONFIG_OF)
282 struct device_node *np =
283 of_find_matching_node(NULL, pit_timer_ids);
284
285 if (np) {
286 of_node_put(np);
287 return;
288 }
289#endif
290 pit_base_addr = ioremap(addr, 16);
291
292 if (!pit_base_addr)
293 panic("Impossible to ioremap PIT\n");
294}
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
deleted file mode 100644
index f039538d3bdb..000000000000
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * reset AT91SAM9G20 as per errata
3 *
4 * (C) BitBox Ltd 2010
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/linkage.h>
17#include <mach/hardware.h>
18#include <mach/at91_ramc.h>
19#include "at91_rstc.h"
20
21 .arm
22
23 .globl at91sam9_alt_restart
24
25at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
26 ldr r0, [r0]
27 ldr r4, =at91_rstc_base
28 ldr r1, [r4]
29
30 mov r2, #1
31 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
32 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
33
34 .balign 32 @ align to cache line
35
36 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
37 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
38 str r4, [r1, #AT91_RSTC_CR] @ reset processor
39
40 b .
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9d45496e4932..405427ec05f8 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -13,6 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/irq.h> 18#include <asm/irq.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
@@ -371,8 +372,6 @@ static void __init at91sam9g45_map_io(void)
371 372
372static void __init at91sam9g45_ioremap_registers(void) 373static void __init at91sam9g45_ioremap_registers(void)
373{ 374{
374 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
375 at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
376 at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512); 375 at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
377 at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512); 376 at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
378 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); 377 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
@@ -384,7 +383,6 @@ static void __init at91sam9g45_ioremap_registers(void)
384static void __init at91sam9g45_initialize(void) 383static void __init at91sam9g45_initialize(void)
385{ 384{
386 arm_pm_idle = at91sam9_idle; 385 arm_pm_idle = at91sam9_idle;
387 arm_pm_restart = at91sam9g45_restart;
388 386
389 at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); 387 at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
390 at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); 388 at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
@@ -393,6 +391,50 @@ static void __init at91sam9g45_initialize(void)
393 at91_gpio_init(at91sam9g45_gpio, 5); 391 at91_gpio_init(at91sam9g45_gpio, 5);
394} 392}
395 393
394static struct resource rstc_resources[] = {
395 [0] = {
396 .start = AT91SAM9G45_BASE_RSTC,
397 .end = AT91SAM9G45_BASE_RSTC + SZ_16 - 1,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = AT91SAM9G45_BASE_DDRSDRC1,
402 .end = AT91SAM9G45_BASE_DDRSDRC1 + SZ_512 - 1,
403 .flags = IORESOURCE_MEM,
404 },
405 [2] = {
406 .start = AT91SAM9G45_BASE_DDRSDRC0,
407 .end = AT91SAM9G45_BASE_DDRSDRC0 + SZ_512 - 1,
408 .flags = IORESOURCE_MEM,
409 },
410};
411
412static struct platform_device rstc_device = {
413 .name = "at91-sam9g45-reset",
414 .resource = rstc_resources,
415 .num_resources = ARRAY_SIZE(rstc_resources),
416};
417
418static struct resource shdwc_resources[] = {
419 [0] = {
420 .start = AT91SAM9G45_BASE_SHDWC,
421 .end = AT91SAM9G45_BASE_SHDWC + SZ_16 - 1,
422 .flags = IORESOURCE_MEM,
423 },
424};
425
426static struct platform_device shdwc_device = {
427 .name = "at91-poweroff",
428 .resource = shdwc_resources,
429 .num_resources = ARRAY_SIZE(shdwc_resources),
430};
431
432static void __init at91sam9g45_register_devices(void)
433{
434 platform_device_register(&rstc_device);
435 platform_device_register(&shdwc_device);
436}
437
396/* -------------------------------------------------------------------- 438/* --------------------------------------------------------------------
397 * Interrupt initialization 439 * Interrupt initialization
398 * -------------------------------------------------------------------- */ 440 * -------------------------------------------------------------------- */
@@ -435,11 +477,18 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
435 0, /* Advanced Interrupt Controller (IRQ0) */ 477 0, /* Advanced Interrupt Controller (IRQ0) */
436}; 478};
437 479
480static void __init at91sam9g45_init_time(void)
481{
482 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
483}
484
438AT91_SOC_START(at91sam9g45) 485AT91_SOC_START(at91sam9g45)
439 .map_io = at91sam9g45_map_io, 486 .map_io = at91sam9g45_map_io,
440 .default_irq_priority = at91sam9g45_default_irq_priority, 487 .default_irq_priority = at91sam9g45_default_irq_priority,
441 .extern_irq = (1 << AT91SAM9G45_ID_IRQ0), 488 .extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
442 .ioremap_registers = at91sam9g45_ioremap_registers, 489 .ioremap_registers = at91sam9g45_ioremap_registers,
443 .register_clocks = at91sam9g45_register_clocks, 490 .register_clocks = at91sam9g45_register_clocks,
491 .register_devices = at91sam9g45_register_devices,
444 .init = at91sam9g45_initialize, 492 .init = at91sam9g45_initialize,
493 .init_time = at91sam9g45_init_time,
445AT91_SOC_END 494AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
deleted file mode 100644
index c40c1e2ef80f..000000000000
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * reset AT91SAM9G45 as per errata
3 *
4 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * GPLv2 Only
11 */
12
13#include <linux/linkage.h>
14#include <mach/hardware.h>
15#include <mach/at91_ramc.h>
16#include "at91_rstc.h"
17 .arm
18
19/*
20 * at91_ramc_base is an array void*
21 * init at NULL if only one DDR controler is present in or DT
22 */
23 .globl at91sam9g45_restart
24
25at91sam9g45_restart:
26 ldr r5, =at91_ramc_base @ preload constants
27 ldr r0, [r5]
28 ldr r5, [r5, #4] @ ddr1
29 cmp r5, #0
30 ldr r4, =at91_rstc_base
31 ldr r1, [r4]
32
33 mov r2, #1
34 mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
35 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
36
37 .balign 32 @ align to cache line
38
39 strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
40 strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
41 str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
42 str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
43 str r4, [r1, #AT91_RSTC_CR] @ reset processor
44
45 b .
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 878d5015daab..f553e4ea034b 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/platform_device.h>
13#include <linux/clk/at91_pmc.h> 14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/proc-fns.h> 16#include <asm/proc-fns.h>
@@ -23,7 +24,6 @@
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24 25
25#include "at91_aic.h" 26#include "at91_aic.h"
26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
@@ -311,8 +311,6 @@ static void __init at91sam9rl_map_io(void)
311 311
312static void __init at91sam9rl_ioremap_registers(void) 312static void __init at91sam9rl_ioremap_registers(void)
313{ 313{
314 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
315 at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
316 at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512); 314 at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
317 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); 315 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
318 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); 316 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
@@ -323,7 +321,6 @@ static void __init at91sam9rl_ioremap_registers(void)
323static void __init at91sam9rl_initialize(void) 321static void __init at91sam9rl_initialize(void)
324{ 322{
325 arm_pm_idle = at91sam9_idle; 323 arm_pm_idle = at91sam9_idle;
326 arm_pm_restart = at91sam9_alt_restart;
327 324
328 at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); 325 at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
329 at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); 326 at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
@@ -332,6 +329,45 @@ static void __init at91sam9rl_initialize(void)
332 at91_gpio_init(at91sam9rl_gpio, 4); 329 at91_gpio_init(at91sam9rl_gpio, 4);
333} 330}
334 331
332static struct resource rstc_resources[] = {
333 [0] = {
334 .start = AT91SAM9RL_BASE_RSTC,
335 .end = AT91SAM9RL_BASE_RSTC + SZ_16 - 1,
336 .flags = IORESOURCE_MEM,
337 },
338 [1] = {
339 .start = AT91SAM9RL_BASE_SDRAMC,
340 .end = AT91SAM9RL_BASE_SDRAMC + SZ_512 - 1,
341 .flags = IORESOURCE_MEM,
342 },
343};
344
345static struct platform_device rstc_device = {
346 .name = "at91-sam9260-reset",
347 .resource = rstc_resources,
348 .num_resources = ARRAY_SIZE(rstc_resources),
349};
350
351static struct resource shdwc_resources[] = {
352 [0] = {
353 .start = AT91SAM9RL_BASE_SHDWC,
354 .end = AT91SAM9RL_BASE_SHDWC + SZ_16 - 1,
355 .flags = IORESOURCE_MEM,
356 },
357};
358
359static struct platform_device shdwc_device = {
360 .name = "at91-poweroff",
361 .resource = shdwc_resources,
362 .num_resources = ARRAY_SIZE(shdwc_resources),
363};
364
365static void __init at91sam9rl_register_devices(void)
366{
367 platform_device_register(&rstc_device);
368 platform_device_register(&shdwc_device);
369}
370
335/* -------------------------------------------------------------------- 371/* --------------------------------------------------------------------
336 * Interrupt initialization 372 * Interrupt initialization
337 * -------------------------------------------------------------------- */ 373 * -------------------------------------------------------------------- */
@@ -374,6 +410,11 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
374 0, /* Advanced Interrupt Controller */ 410 0, /* Advanced Interrupt Controller */
375}; 411};
376 412
413static void __init at91sam9rl_init_time(void)
414{
415 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
416}
417
377AT91_SOC_START(at91sam9rl) 418AT91_SOC_START(at91sam9rl)
378 .map_io = at91sam9rl_map_io, 419 .map_io = at91sam9rl_map_io,
379 .default_irq_priority = at91sam9rl_default_irq_priority, 420 .default_irq_priority = at91sam9rl_default_irq_priority,
@@ -382,5 +423,7 @@ AT91_SOC_START(at91sam9rl)
382#if defined(CONFIG_OLD_CLK_AT91) 423#if defined(CONFIG_OLD_CLK_AT91)
383 .register_clocks = at91sam9rl_register_clocks, 424 .register_clocks = at91sam9rl_register_clocks,
384#endif 425#endif
426 .register_devices = at91sam9rl_register_devices,
385 .init = at91sam9rl_initialize, 427 .init = at91sam9rl_initialize,
428 .init_time = at91sam9rl_init_time,
386AT91_SOC_END 429AT91_SOC_END
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 597c649170aa..e76e35ce81e7 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -167,6 +167,8 @@ static struct at91_cf_data afeb9260_cf_data = {
167 167
168static void __init afeb9260_board_init(void) 168static void __init afeb9260_board_init(void)
169{ 169{
170 at91_register_devices();
171
170 /* Serial */ 172 /* Serial */
171 /* DBGU on ttyS0. (Rx & Tx only) */ 173 /* DBGU on ttyS0. (Rx & Tx only) */
172 at91_register_uart(0, 0, 0); 174 at91_register_uart(0, 0, 0);
@@ -211,7 +213,7 @@ static void __init afeb9260_board_init(void)
211 213
212MACHINE_START(AFEB9260, "Custom afeb9260 board") 214MACHINE_START(AFEB9260, "Custom afeb9260 board")
213 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ 215 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
214 .init_time = at91sam926x_pit_init, 216 .init_time = at91_init_time,
215 .map_io = at91_map_io, 217 .map_io = at91_map_io,
216 .handle_irq = at91_aic_handle_irq, 218 .handle_irq = at91_aic_handle_irq,
217 .init_early = afeb9260_init_early, 219 .init_early = afeb9260_init_early,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index a30502c8d379..ae827dd2d0d2 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -170,6 +170,8 @@ static void __init cam60_add_device_nand(void)
170 170
171static void __init cam60_board_init(void) 171static void __init cam60_board_init(void)
172{ 172{
173 at91_register_devices();
174
173 /* Serial */ 175 /* Serial */
174 /* DBGU on ttyS0. (Rx & Tx only) */ 176 /* DBGU on ttyS0. (Rx & Tx only) */
175 at91_register_uart(0, 0, 0); 177 at91_register_uart(0, 0, 0);
@@ -188,7 +190,7 @@ static void __init cam60_board_init(void)
188 190
189MACHINE_START(CAM60, "KwikByte CAM60") 191MACHINE_START(CAM60, "KwikByte CAM60")
190 /* Maintainer: KwikByte */ 192 /* Maintainer: KwikByte */
191 .init_time = at91sam926x_pit_init, 193 .init_time = at91_init_time,
192 .map_io = at91_map_io, 194 .map_io = at91_map_io,
193 .handle_irq = at91_aic_handle_irq, 195 .handle_irq = at91_aic_handle_irq,
194 .init_early = cam60_init_early, 196 .init_early = cam60_init_early,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 2037f78c84e7..731c8318f4f5 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -322,6 +322,8 @@ static struct mci_platform_data __initdata cpu9krea_mci0_data = {
322 322
323static void __init cpu9krea_board_init(void) 323static void __init cpu9krea_board_init(void)
324{ 324{
325 at91_register_devices();
326
325 /* NOR */ 327 /* NOR */
326 cpu9krea_add_device_nor(); 328 cpu9krea_add_device_nor();
327 /* Serial */ 329 /* Serial */
@@ -375,7 +377,7 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260")
375MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") 377MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
376#endif 378#endif
377 /* Maintainer: Eric Benard - EUKREA Electromatique */ 379 /* Maintainer: Eric Benard - EUKREA Electromatique */
378 .init_time = at91sam926x_pit_init, 380 .init_time = at91_init_time,
379 .map_io = at91_map_io, 381 .map_io = at91_map_io,
380 .handle_irq = at91_aic_handle_irq, 382 .handle_irq = at91_aic_handle_irq,
381 .init_early = cpu9krea_init_early, 383 .init_early = cpu9krea_init_early,
diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c
index 3a185faee795..226563f850b8 100644
--- a/arch/arm/mach-at91/board-dt-rm9200.c
+++ b/arch/arm/mach-at91/board-dt-rm9200.c
@@ -14,6 +14,7 @@
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_irq.h> 16#include <linux/of_irq.h>
17#include <linux/clk-provider.h>
17 18
18#include <asm/setup.h> 19#include <asm/setup.h>
19#include <asm/irq.h> 20#include <asm/irq.h>
@@ -24,15 +25,12 @@
24#include "at91_aic.h" 25#include "at91_aic.h"
25#include "generic.h" 26#include "generic.h"
26 27
27 28static void __init at91rm9200_dt_timer_init(void)
28static const struct of_device_id irq_of_match[] __initconst = {
29 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
30 { /*sentinel*/ }
31};
32
33static void __init at91rm9200_dt_init_irq(void)
34{ 29{
35 of_irq_init(irq_of_match); 30#if defined(CONFIG_COMMON_CLK)
31 of_clk_init(NULL);
32#endif
33 at91rm9200_timer_init();
36} 34}
37 35
38static const char *at91rm9200_dt_board_compat[] __initdata = { 36static const char *at91rm9200_dt_board_compat[] __initdata = {
@@ -41,10 +39,8 @@ static const char *at91rm9200_dt_board_compat[] __initdata = {
41}; 39};
42 40
43DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") 41DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
44 .init_time = at91rm9200_timer_init, 42 .init_time = at91rm9200_dt_timer_init,
45 .map_io = at91_map_io, 43 .map_io = at91_map_io,
46 .handle_irq = at91_aic_handle_irq,
47 .init_early = at91rm9200_dt_initialize, 44 .init_early = at91rm9200_dt_initialize,
48 .init_irq = at91rm9200_dt_init_irq,
49 .dt_compat = at91rm9200_dt_board_compat, 45 .dt_compat = at91rm9200_dt_board_compat,
50MACHINE_END 46MACHINE_END
diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
index 575b0be66ca8..d3048ccdc41f 100644
--- a/arch/arm/mach-at91/board-dt-sam9.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
@@ -25,26 +25,6 @@
25#include "board.h" 25#include "board.h"
26#include "generic.h" 26#include "generic.h"
27 27
28
29static void __init sam9_dt_timer_init(void)
30{
31#if defined(CONFIG_COMMON_CLK)
32 of_clk_init(NULL);
33#endif
34 at91sam926x_pit_init();
35}
36
37static const struct of_device_id irq_of_match[] __initconst = {
38
39 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
40 { /*sentinel*/ }
41};
42
43static void __init at91_dt_init_irq(void)
44{
45 of_irq_init(irq_of_match);
46}
47
48static const char *at91_dt_board_compat[] __initdata = { 28static const char *at91_dt_board_compat[] __initdata = {
49 "atmel,at91sam9", 29 "atmel,at91sam9",
50 NULL 30 NULL
@@ -52,10 +32,7 @@ static const char *at91_dt_board_compat[] __initdata = {
52 32
53DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") 33DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
54 /* Maintainer: Atmel */ 34 /* Maintainer: Atmel */
55 .init_time = sam9_dt_timer_init,
56 .map_io = at91_map_io, 35 .map_io = at91_map_io,
57 .handle_irq = at91_aic_handle_irq,
58 .init_early = at91_dt_initialize, 36 .init_early = at91_dt_initialize,
59 .init_irq = at91_dt_init_irq,
60 .dt_compat = at91_dt_board_compat, 37 .dt_compat = at91_dt_board_compat,
61MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index 075ec0576ada..129e2917506b 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -27,64 +27,34 @@
27#include "at91_aic.h" 27#include "at91_aic.h"
28#include "generic.h" 28#include "generic.h"
29 29
30static void __init sama5_dt_timer_init(void)
31{
32#if defined(CONFIG_COMMON_CLK)
33 of_clk_init(NULL);
34#endif
35 at91sam926x_pit_init();
36}
37
38static const struct of_device_id irq_of_match[] __initconst = {
39
40 { .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init },
41 { /*sentinel*/ }
42};
43
44static void __init at91_dt_init_irq(void)
45{
46 of_irq_init(irq_of_match);
47}
48
49static int ksz9021rn_phy_fixup(struct phy_device *phy)
50{
51 int value;
52
53 /* Set delay values */
54 value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000;
55 phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
56 value = 0xF2F4;
57 phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
58 value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000;
59 phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
60 value = 0x2222;
61 phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
62
63 return 0;
64}
65
66static void __init sama5_dt_device_init(void) 30static void __init sama5_dt_device_init(void)
67{ 31{
68 if (of_machine_is_compatible("atmel,sama5d3xcm") &&
69 IS_ENABLED(CONFIG_PHYLIB))
70 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
71 ksz9021rn_phy_fixup);
72
73 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 32 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
74} 33}
75 34
76static const char *sama5_dt_board_compat[] __initdata = { 35static const char *sama5_dt_board_compat[] __initconst = {
77 "atmel,sama5", 36 "atmel,sama5",
78 NULL 37 NULL
79}; 38};
80 39
81DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") 40DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
82 /* Maintainer: Atmel */ 41 /* Maintainer: Atmel */
83 .init_time = sama5_dt_timer_init,
84 .map_io = at91_map_io, 42 .map_io = at91_map_io,
85 .handle_irq = at91_aic5_handle_irq,
86 .init_early = at91_dt_initialize, 43 .init_early = at91_dt_initialize,
87 .init_irq = at91_dt_init_irq,
88 .init_machine = sama5_dt_device_init, 44 .init_machine = sama5_dt_device_init,
89 .dt_compat = sama5_dt_board_compat, 45 .dt_compat = sama5_dt_board_compat,
90MACHINE_END 46MACHINE_END
47
48static const char *sama5_alt_dt_board_compat[] __initconst = {
49 "atmel,sama5d4",
50 NULL
51};
52
53DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5 (Device Tree)")
54 /* Maintainer: Atmel */
55 .map_io = at91_alt_map_io,
56 .init_early = at91_dt_initialize,
57 .init_machine = sama5_dt_device_init,
58 .dt_compat = sama5_alt_dt_board_compat,
59 .l2c_aux_mask = ~0UL,
60MACHINE_END
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 68f1ab6bd08f..a6aa4a2432f2 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -138,6 +138,8 @@ static struct gpio_led flexibity_leds[] = {
138 138
139static void __init flexibity_board_init(void) 139static void __init flexibity_board_init(void)
140{ 140{
141 at91_register_devices();
142
141 /* Serial */ 143 /* Serial */
142 /* DBGU on ttyS0. (Rx & Tx only) */ 144 /* DBGU on ttyS0. (Rx & Tx only) */
143 at91_register_uart(0, 0, 0); 145 at91_register_uart(0, 0, 0);
@@ -160,7 +162,7 @@ static void __init flexibity_board_init(void)
160 162
161MACHINE_START(FLEXIBITY, "Flexibity Connect") 163MACHINE_START(FLEXIBITY, "Flexibity Connect")
162 /* Maintainer: Maxim Osipov */ 164 /* Maintainer: Maxim Osipov */
163 .init_time = at91sam926x_pit_init, 165 .init_time = at91_init_time,
164 .map_io = at91_map_io, 166 .map_io = at91_map_io,
165 .handle_irq = at91_aic_handle_irq, 167 .handle_irq = at91_aic_handle_irq,
166 .init_early = flexibity_init_early, 168 .init_early = flexibity_init_early,
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
deleted file mode 100644
index 8b22c60bb238..000000000000
--- a/arch/arm/mach-at91/board-foxg20.c
+++ /dev/null
@@ -1,272 +0,0 @@
1/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2008 Atmel
4 * Copyright (C) 2010 Lee McLoughlin - lee@lmmrtech.com
5 * Copyright (C) 2010 Sergio Tanzilli - tanzilli@acmesystems.it
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28#include <linux/spi/at73c213.h>
29#include <linux/gpio.h>
30#include <linux/gpio_keys.h>
31#include <linux/input.h>
32#include <linux/clk.h>
33#include <linux/w1-gpio.h>
34
35#include <mach/hardware.h>
36#include <asm/setup.h>
37#include <asm/mach-types.h>
38#include <asm/irq.h>
39
40#include <asm/mach/arch.h>
41#include <asm/mach/map.h>
42#include <asm/mach/irq.h>
43
44#include <mach/at91sam9_smc.h>
45
46#include "at91_aic.h"
47#include "board.h"
48#include "sam9_smc.h"
49#include "generic.h"
50#include "gpio.h"
51
52/*
53 * The FOX Board G20 hardware comes as the "Netus G20" board with
54 * just the cpu, ram, dataflash and two header connectors.
55 * This is plugged into the FOX Board which provides the ethernet,
56 * usb, rtc, leds, switch, ...
57 *
58 * For more info visit: http://www.acmesystems.it/foxg20
59 */
60
61
62static void __init foxg20_init_early(void)
63{
64 /* Initialize processor: 18.432 MHz crystal */
65 at91_initialize(18432000);
66}
67
68/*
69 * USB Host port
70 */
71static struct at91_usbh_data __initdata foxg20_usbh_data = {
72 .ports = 2,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
75};
76
77/*
78 * USB Device port
79 */
80static struct at91_udc_data __initdata foxg20_udc_data = {
81 .vbus_pin = AT91_PIN_PC6,
82 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83};
84
85
86/*
87 * SPI devices.
88 */
89static struct spi_board_info foxg20_spi_devices[] = {
90#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
91 {
92 .modalias = "mtd_dataflash",
93 .chip_select = 1,
94 .max_speed_hz = 15 * 1000 * 1000,
95 .bus_num = 0,
96 },
97#endif
98};
99
100
101/*
102 * MACB Ethernet device
103 */
104static struct macb_platform_data __initdata foxg20_macb_data = {
105 .phy_irq_pin = AT91_PIN_PA7,
106 .is_rmii = 1,
107};
108
109/*
110 * MCI (SD/MMC)
111 * det_pin, wp_pin and vcc_pin are not connected
112 */
113static struct mci_platform_data __initdata foxg20_mci0_data = {
114 .slot[1] = {
115 .bus_width = 4,
116 .detect_pin = -EINVAL,
117 .wp_pin = -EINVAL,
118 },
119};
120
121
122/*
123 * LEDs
124 */
125static struct gpio_led foxg20_leds[] = {
126 { /* user led, red */
127 .name = "user_led",
128 .gpio = AT91_PIN_PC7,
129 .active_low = 0,
130 .default_trigger = "heartbeat",
131 },
132};
133
134
135/*
136 * GPIO Buttons
137 */
138#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
139static struct gpio_keys_button foxg20_buttons[] = {
140 {
141 .gpio = AT91_PIN_PC4,
142 .code = BTN_1,
143 .desc = "Button 1",
144 .active_low = 1,
145 .wakeup = 1,
146 },
147};
148
149static struct gpio_keys_platform_data foxg20_button_data = {
150 .buttons = foxg20_buttons,
151 .nbuttons = ARRAY_SIZE(foxg20_buttons),
152};
153
154static struct platform_device foxg20_button_device = {
155 .name = "gpio-keys",
156 .id = -1,
157 .num_resources = 0,
158 .dev = {
159 .platform_data = &foxg20_button_data,
160 }
161};
162
163static void __init foxg20_add_device_buttons(void)
164{
165 at91_set_gpio_input(AT91_PIN_PC4, 1); /* btn1 */
166 at91_set_deglitch(AT91_PIN_PC4, 1);
167
168 platform_device_register(&foxg20_button_device);
169}
170#else
171static void __init foxg20_add_device_buttons(void) {}
172#endif
173
174
175#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
176static struct w1_gpio_platform_data w1_gpio_pdata = {
177 /* If you choose to use a pin other than PB16 it needs to be 3.3V */
178 .pin = AT91_PIN_PB16,
179 .is_open_drain = 1,
180 .ext_pullup_enable_pin = -EINVAL,
181};
182
183static struct platform_device w1_device = {
184 .name = "w1-gpio",
185 .id = -1,
186 .dev.platform_data = &w1_gpio_pdata,
187};
188
189static void __init at91_add_device_w1(void)
190{
191 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
192 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
193 platform_device_register(&w1_device);
194}
195
196#endif
197
198
199static struct i2c_board_info __initdata foxg20_i2c_devices[] = {
200 {
201 I2C_BOARD_INFO("24c512", 0x50),
202 },
203};
204
205
206static void __init foxg20_board_init(void)
207{
208 /* Serial */
209 /* DBGU on ttyS0. (Rx & Tx only) */
210 at91_register_uart(0, 0, 0);
211
212 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
213 at91_register_uart(AT91SAM9260_ID_US0, 1,
214 ATMEL_UART_CTS
215 | ATMEL_UART_RTS
216 | ATMEL_UART_DTR
217 | ATMEL_UART_DSR
218 | ATMEL_UART_DCD
219 | ATMEL_UART_RI);
220
221 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
222 at91_register_uart(AT91SAM9260_ID_US1, 2,
223 ATMEL_UART_CTS
224 | ATMEL_UART_RTS);
225
226 /* USART2 on ttyS3. (Rx & Tx only) */
227 at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
228
229 /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
230 at91_register_uart(AT91SAM9260_ID_US3, 4,
231 ATMEL_UART_CTS
232 | ATMEL_UART_RTS);
233
234 /* USART4 on ttyS5. (Rx & Tx only) */
235 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
236
237 /* USART5 on ttyS6. (Rx & Tx only) */
238 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
239
240 /* Set the internal pull-up resistor on DRXD */
241 at91_set_A_periph(AT91_PIN_PB14, 1);
242 at91_add_device_serial();
243 /* USB Host */
244 at91_add_device_usbh(&foxg20_usbh_data);
245 /* USB Device */
246 at91_add_device_udc(&foxg20_udc_data);
247 /* SPI */
248 at91_add_device_spi(foxg20_spi_devices, ARRAY_SIZE(foxg20_spi_devices));
249 /* Ethernet */
250 at91_add_device_eth(&foxg20_macb_data);
251 /* MMC */
252 at91_add_device_mci(0, &foxg20_mci0_data);
253 /* I2C */
254 at91_add_device_i2c(foxg20_i2c_devices, ARRAY_SIZE(foxg20_i2c_devices));
255 /* LEDs */
256 at91_gpio_leds(foxg20_leds, ARRAY_SIZE(foxg20_leds));
257 /* Push Buttons */
258 foxg20_add_device_buttons();
259#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
260 at91_add_device_w1();
261#endif
262}
263
264MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
265 /* Maintainer: Sergio Tanzilli */
266 .init_time = at91sam926x_pit_init,
267 .map_io = at91_map_io,
268 .handle_irq = at91_aic_handle_irq,
269 .init_early = foxg20_init_early,
270 .init_irq = at91_init_irq_default,
271 .init_machine = foxg20_board_init,
272MACHINE_END
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index b729dd1271bf..bf5cc55c7db6 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -576,7 +576,7 @@ static void __init gsia18s_board_init(void)
576} 576}
577 577
578MACHINE_START(GSIA18S, "GS_IA18_S") 578MACHINE_START(GSIA18S, "GS_IA18_S")
579 .init_time = at91sam926x_pit_init, 579 .init_time = at91_init_time,
580 .map_io = at91_map_io, 580 .map_io = at91_map_io,
581 .handle_irq = at91_aic_handle_irq, 581 .handle_irq = at91_aic_handle_irq,
582 .init_early = gsia18s_init_early, 582 .init_early = gsia18s_init_early,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index b48d95ec5152..9c26b94ce448 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -219,7 +219,7 @@ static void __init pcontrol_g20_board_init(void)
219 219
220MACHINE_START(PCONTROL_G20, "PControl G20") 220MACHINE_START(PCONTROL_G20, "PControl G20")
221 /* Maintainer: pgsellmann@portner-elektronik.at */ 221 /* Maintainer: pgsellmann@portner-elektronik.at */
222 .init_time = at91sam926x_pit_init, 222 .init_time = at91_init_time,
223 .map_io = at91_map_io, 223 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq, 224 .handle_irq = at91_aic_handle_irq,
225 .init_early = pcontrol_g20_init_early, 225 .init_early = pcontrol_g20_init_early,
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
deleted file mode 100644
index f28e8b74df4b..000000000000
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ /dev/null
@@ -1,232 +0,0 @@
1/*
2 * board-rsi-ews.c
3 *
4 * Copyright (C)
5 * 2005 SAN People,
6 * 2008-2011 R-S-I Elektrotechnik GmbH & Co. KG
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/mm.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/spi/spi.h>
17#include <linux/mtd/physmap.h>
18
19#include <asm/setup.h>
20#include <asm/mach-types.h>
21#include <asm/irq.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <mach/hardware.h>
28
29#include <linux/gpio.h>
30
31#include "at91_aic.h"
32#include "board.h"
33#include "generic.h"
34#include "gpio.h"
35
36static void __init rsi_ews_init_early(void)
37{
38 /* Initialize processor: 18.432 MHz crystal */
39 at91_initialize(18432000);
40}
41
42/*
43 * Ethernet
44 */
45static struct macb_platform_data rsi_ews_eth_data __initdata = {
46 .phy_irq_pin = AT91_PIN_PC4,
47 .is_rmii = 1,
48};
49
50/*
51 * USB Host
52 */
53static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
54 .ports = 1,
55 .vbus_pin = {-EINVAL, -EINVAL},
56 .overcurrent_pin= {-EINVAL, -EINVAL},
57};
58
59/*
60 * SD/MC
61 */
62static struct mci_platform_data __initdata rsi_ews_mci0_data = {
63 .slot[0] = {
64 .bus_width = 4,
65 .detect_pin = AT91_PIN_PB27,
66 .wp_pin = AT91_PIN_PB29,
67 },
68};
69
70/*
71 * I2C
72 */
73static struct i2c_board_info rsi_ews_i2c_devices[] __initdata = {
74 {
75 I2C_BOARD_INFO("ds1337", 0x68),
76 },
77 {
78 I2C_BOARD_INFO("24c01", 0x50),
79 }
80};
81
82/*
83 * LEDs
84 */
85static struct gpio_led rsi_ews_leds[] = {
86 {
87 .name = "led0",
88 .gpio = AT91_PIN_PB6,
89 .active_low = 0,
90 },
91 {
92 .name = "led1",
93 .gpio = AT91_PIN_PB7,
94 .active_low = 0,
95 },
96 {
97 .name = "led2",
98 .gpio = AT91_PIN_PB8,
99 .active_low = 0,
100 },
101 {
102 .name = "led3",
103 .gpio = AT91_PIN_PB9,
104 .active_low = 0,
105 },
106};
107
108/*
109 * DataFlash
110 */
111static struct spi_board_info rsi_ews_spi_devices[] = {
112 { /* DataFlash chip 1*/
113 .modalias = "mtd_dataflash",
114 .chip_select = 0,
115 .max_speed_hz = 5 * 1000 * 1000,
116 },
117 { /* DataFlash chip 2*/
118 .modalias = "mtd_dataflash",
119 .chip_select = 1,
120 .max_speed_hz = 5 * 1000 * 1000,
121 },
122};
123
124/*
125 * NOR flash
126 */
127static struct mtd_partition rsiews_nor_partitions[] = {
128 {
129 .name = "boot",
130 .offset = 0,
131 .size = 3 * SZ_128K,
132 .mask_flags = MTD_WRITEABLE
133 },
134 {
135 .name = "kernel",
136 .offset = MTDPART_OFS_NXTBLK,
137 .size = SZ_2M - (3 * SZ_128K)
138 },
139 {
140 .name = "root",
141 .offset = MTDPART_OFS_NXTBLK,
142 .size = SZ_8M
143 },
144 {
145 .name = "kernelupd",
146 .offset = MTDPART_OFS_NXTBLK,
147 .size = 3 * SZ_512K,
148 .mask_flags = MTD_WRITEABLE
149 },
150 {
151 .name = "rootupd",
152 .offset = MTDPART_OFS_NXTBLK,
153 .size = 9 * SZ_512K,
154 .mask_flags = MTD_WRITEABLE
155 },
156};
157
158static struct physmap_flash_data rsiews_nor_data = {
159 .width = 2,
160 .parts = rsiews_nor_partitions,
161 .nr_parts = ARRAY_SIZE(rsiews_nor_partitions),
162};
163
164#define NOR_BASE AT91_CHIPSELECT_0
165#define NOR_SIZE SZ_16M
166
167static struct resource nor_flash_resources[] = {
168 {
169 .start = NOR_BASE,
170 .end = NOR_BASE + NOR_SIZE - 1,
171 .flags = IORESOURCE_MEM,
172 }
173};
174
175static struct platform_device rsiews_nor_flash = {
176 .name = "physmap-flash",
177 .id = 0,
178 .dev = {
179 .platform_data = &rsiews_nor_data,
180 },
181 .resource = nor_flash_resources,
182 .num_resources = ARRAY_SIZE(nor_flash_resources),
183};
184
185/*
186 * Init Func
187 */
188static void __init rsi_ews_board_init(void)
189{
190 /* Serial */
191 /* DBGU on ttyS0. (Rx & Tx only) */
192 /* This one is for debugging */
193 at91_register_uart(0, 0, 0);
194
195 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
196 /* Dialin/-out modem interface */
197 at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
198 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
199 | ATMEL_UART_RI);
200
201 /* USART3 on ttyS4. (Rx, Tx, RTS) */
202 /* RS485 communication */
203 at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
204 at91_add_device_serial();
205 at91_set_gpio_output(AT91_PIN_PA21, 0);
206 /* Ethernet */
207 at91_add_device_eth(&rsi_ews_eth_data);
208 /* USB Host */
209 at91_add_device_usbh(&rsi_ews_usbh_data);
210 /* I2C */
211 at91_add_device_i2c(rsi_ews_i2c_devices,
212 ARRAY_SIZE(rsi_ews_i2c_devices));
213 /* SPI */
214 at91_add_device_spi(rsi_ews_spi_devices,
215 ARRAY_SIZE(rsi_ews_spi_devices));
216 /* MMC */
217 at91_add_device_mci(0, &rsi_ews_mci0_data);
218 /* NOR Flash */
219 platform_device_register(&rsiews_nor_flash);
220 /* LEDs */
221 at91_gpio_leds(rsi_ews_leds, ARRAY_SIZE(rsi_ews_leds));
222}
223
224MACHINE_START(RSI_EWS, "RSI EWS")
225 /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */
226 .init_time = at91rm9200_timer_init,
227 .map_io = at91_map_io,
228 .handle_irq = at91_aic_handle_irq,
229 .init_early = rsi_ews_init_early,
230 .init_irq = at91_init_irq_default,
231 .init_machine = rsi_ews_board_init,
232MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index d24dda67e2d3..c2166e3a236c 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -187,6 +187,8 @@ static struct gpio_led ek_leds[] = {
187 187
188static void __init ek_board_init(void) 188static void __init ek_board_init(void)
189{ 189{
190 at91_register_devices();
191
190 /* Serial */ 192 /* Serial */
191 /* DBGU on ttyS0. (Rx & Tx only) */ 193 /* DBGU on ttyS0. (Rx & Tx only) */
192 at91_register_uart(0, 0, 0); 194 at91_register_uart(0, 0, 0);
@@ -219,7 +221,7 @@ static void __init ek_board_init(void)
219 221
220MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") 222MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
221 /* Maintainer: Olimex */ 223 /* Maintainer: Olimex */
222 .init_time = at91sam926x_pit_init, 224 .init_time = at91_init_time,
223 .map_io = at91_map_io, 225 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq, 226 .handle_irq = at91_aic_handle_irq,
225 .init_early = ek_init_early, 227 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 65dea12d685e..bf8a946b4cd0 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -45,7 +45,6 @@
45#include <mach/system_rev.h> 45#include <mach/system_rev.h>
46 46
47#include "at91_aic.h" 47#include "at91_aic.h"
48#include "at91_shdwc.h"
49#include "board.h" 48#include "board.h"
50#include "sam9_smc.h" 49#include "sam9_smc.h"
51#include "generic.h" 50#include "generic.h"
@@ -307,6 +306,8 @@ static void __init ek_add_device_buttons(void) {}
307 306
308static void __init ek_board_init(void) 307static void __init ek_board_init(void)
309{ 308{
309 at91_register_devices();
310
310 /* Serial */ 311 /* Serial */
311 /* DBGU on ttyS0. (Rx & Tx only) */ 312 /* DBGU on ttyS0. (Rx & Tx only) */
312 at91_register_uart(0, 0, 0); 313 at91_register_uart(0, 0, 0);
@@ -344,7 +345,7 @@ static void __init ek_board_init(void)
344 345
345MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 346MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
346 /* Maintainer: Atmel */ 347 /* Maintainer: Atmel */
347 .init_time = at91sam926x_pit_init, 348 .init_time = at91_init_time,
348 .map_io = at91_map_io, 349 .map_io = at91_map_io,
349 .handle_irq = at91_aic_handle_irq, 350 .handle_irq = at91_aic_handle_irq,
350 .init_early = ek_init_early, 351 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4637432de08f..e85ada820bfb 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -49,7 +49,6 @@
49#include <mach/system_rev.h> 49#include <mach/system_rev.h>
50 50
51#include "at91_aic.h" 51#include "at91_aic.h"
52#include "at91_shdwc.h"
53#include "board.h" 52#include "board.h"
54#include "sam9_smc.h" 53#include "sam9_smc.h"
55#include "generic.h" 54#include "generic.h"
@@ -561,6 +560,8 @@ static struct gpio_led ek_leds[] = {
561 560
562static void __init ek_board_init(void) 561static void __init ek_board_init(void)
563{ 562{
563 at91_register_devices();
564
564 /* Serial */ 565 /* Serial */
565 /* DBGU on ttyS0. (Rx & Tx only) */ 566 /* DBGU on ttyS0. (Rx & Tx only) */
566 at91_register_uart(0, 0, 0); 567 at91_register_uart(0, 0, 0);
@@ -603,7 +604,7 @@ static void __init ek_board_init(void)
603 604
604MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") 605MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
605 /* Maintainer: Atmel */ 606 /* Maintainer: Atmel */
606 .init_time = at91sam926x_pit_init, 607 .init_time = at91_init_time,
607 .map_io = at91_map_io, 608 .map_io = at91_map_io,
608 .handle_irq = at91_aic_handle_irq, 609 .handle_irq = at91_aic_handle_irq,
609 .init_early = ek_init_early, 610 .init_early = ek_init_early,
@@ -613,7 +614,7 @@ MACHINE_END
613 614
614MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") 615MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
615 /* Maintainer: Atmel */ 616 /* Maintainer: Atmel */
616 .init_time = at91sam926x_pit_init, 617 .init_time = at91_init_time,
617 .map_io = at91_map_io, 618 .map_io = at91_map_io,
618 .handle_irq = at91_aic_handle_irq, 619 .handle_irq = at91_aic_handle_irq,
619 .init_early = ek_init_early, 620 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index fc446097f410..d76680f2a209 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -50,7 +50,6 @@
50#include <mach/system_rev.h> 50#include <mach/system_rev.h>
51 51
52#include "at91_aic.h" 52#include "at91_aic.h"
53#include "at91_shdwc.h"
54#include "board.h" 53#include "board.h"
55#include "sam9_smc.h" 54#include "sam9_smc.h"
56#include "generic.h" 55#include "generic.h"
@@ -439,6 +438,8 @@ static struct platform_device *devices[] __initdata = {
439 438
440static void __init ek_board_init(void) 439static void __init ek_board_init(void)
441{ 440{
441 at91_register_devices();
442
442 /* Serial */ 443 /* Serial */
443 /* DBGU on ttyS0. (Rx & Tx only) */ 444 /* DBGU on ttyS0. (Rx & Tx only) */
444 at91_register_uart(0, 0, 0); 445 at91_register_uart(0, 0, 0);
@@ -483,7 +484,7 @@ static void __init ek_board_init(void)
483 484
484MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") 485MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
485 /* Maintainer: Atmel */ 486 /* Maintainer: Atmel */
486 .init_time = at91sam926x_pit_init, 487 .init_time = at91_init_time,
487 .map_io = at91_map_io, 488 .map_io = at91_map_io,
488 .handle_irq = at91_aic_handle_irq, 489 .handle_irq = at91_aic_handle_irq,
489 .init_early = ek_init_early, 490 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index e1be6e25b380..49f075213451 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -410,7 +410,7 @@ static void __init ek_board_init(void)
410 410
411MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") 411MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
412 /* Maintainer: Atmel */ 412 /* Maintainer: Atmel */
413 .init_time = at91sam926x_pit_init, 413 .init_time = at91_init_time,
414 .map_io = at91_map_io, 414 .map_io = at91_map_io,
415 .handle_irq = at91_aic_handle_irq, 415 .handle_irq = at91_aic_handle_irq,
416 .init_early = ek_init_early, 416 .init_early = ek_init_early,
@@ -420,7 +420,7 @@ MACHINE_END
420 420
421MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") 421MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
422 /* Maintainer: Atmel */ 422 /* Maintainer: Atmel */
423 .init_time = at91sam926x_pit_init, 423 .init_time = at91_init_time,
424 .map_io = at91_map_io, 424 .map_io = at91_map_io,
425 .handle_irq = at91_aic_handle_irq, 425 .handle_irq = at91_aic_handle_irq,
426 .init_early = ek_init_early, 426 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index b227732b0c83..a517c7f7af92 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -48,7 +48,6 @@
48#include <mach/system_rev.h> 48#include <mach/system_rev.h>
49 49
50#include "at91_aic.h" 50#include "at91_aic.h"
51#include "at91_shdwc.h"
52#include "board.h" 51#include "board.h"
53#include "sam9_smc.h" 52#include "sam9_smc.h"
54#include "generic.h" 53#include "generic.h"
@@ -471,6 +470,8 @@ static struct platform_device *devices[] __initdata = {
471 470
472static void __init ek_board_init(void) 471static void __init ek_board_init(void)
473{ 472{
473 at91_register_devices();
474
474 /* Serial */ 475 /* Serial */
475 /* DGBU on ttyS0. (Rx & Tx only) */ 476 /* DGBU on ttyS0. (Rx & Tx only) */
476 at91_register_uart(0, 0, 0); 477 at91_register_uart(0, 0, 0);
@@ -517,7 +518,7 @@ static void __init ek_board_init(void)
517 518
518MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") 519MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
519 /* Maintainer: Atmel */ 520 /* Maintainer: Atmel */
520 .init_time = at91sam926x_pit_init, 521 .init_time = at91_init_time,
521 .map_io = at91_map_io, 522 .map_io = at91_map_io,
522 .handle_irq = at91_aic_handle_irq, 523 .handle_irq = at91_aic_handle_irq,
523 .init_early = ek_init_early, 524 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b64648b4a1fc..8bca329b0293 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -35,7 +35,6 @@
35 35
36 36
37#include "at91_aic.h" 37#include "at91_aic.h"
38#include "at91_shdwc.h"
39#include "board.h" 38#include "board.h"
40#include "sam9_smc.h" 39#include "sam9_smc.h"
41#include "generic.h" 40#include "generic.h"
@@ -292,6 +291,8 @@ static void __init ek_add_device_buttons(void) {}
292 291
293static void __init ek_board_init(void) 292static void __init ek_board_init(void)
294{ 293{
294 at91_register_devices();
295
295 /* Serial */ 296 /* Serial */
296 /* DBGU on ttyS0. (Rx & Tx only) */ 297 /* DBGU on ttyS0. (Rx & Tx only) */
297 at91_register_uart(0, 0, 0); 298 at91_register_uart(0, 0, 0);
@@ -323,7 +324,7 @@ static void __init ek_board_init(void)
323 324
324MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") 325MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
325 /* Maintainer: Atmel */ 326 /* Maintainer: Atmel */
326 .init_time = at91sam926x_pit_init, 327 .init_time = at91_init_time,
327 .map_io = at91_map_io, 328 .map_io = at91_map_io,
328 .handle_irq = at91_aic_handle_irq, 329 .handle_irq = at91_aic_handle_irq,
329 .init_early = ek_init_early, 330 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 1b870e6def0c..b4aff840a1a0 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -154,6 +154,8 @@ static void __init snapper9260_add_device_nand(void)
154 154
155static void __init snapper9260_board_init(void) 155static void __init snapper9260_board_init(void)
156{ 156{
157 at91_register_devices();
158
157 at91_add_device_i2c(snapper9260_i2c_devices, 159 at91_add_device_i2c(snapper9260_i2c_devices,
158 ARRAY_SIZE(snapper9260_i2c_devices)); 160 ARRAY_SIZE(snapper9260_i2c_devices));
159 161
@@ -178,7 +180,7 @@ static void __init snapper9260_board_init(void)
178} 180}
179 181
180MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") 182MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
181 .init_time = at91sam926x_pit_init, 183 .init_time = at91_init_time,
182 .map_io = at91_map_io, 184 .map_io = at91_map_io,
183 .handle_irq = at91_aic_handle_irq, 185 .handle_irq = at91_aic_handle_irq,
184 .init_early = snapper9260_init_early, 186 .init_early = snapper9260_init_early,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 3b575036ff96..e825641a1dee 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -275,7 +275,7 @@ static void __init stamp9g20evb_board_init(void)
275 275
276MACHINE_START(PORTUXG20, "taskit PortuxG20") 276MACHINE_START(PORTUXG20, "taskit PortuxG20")
277 /* Maintainer: taskit GmbH */ 277 /* Maintainer: taskit GmbH */
278 .init_time = at91sam926x_pit_init, 278 .init_time = at91_init_time,
279 .map_io = at91_map_io, 279 .map_io = at91_map_io,
280 .handle_irq = at91_aic_handle_irq, 280 .handle_irq = at91_aic_handle_irq,
281 .init_early = stamp9g20_init_early, 281 .init_early = stamp9g20_init_early,
@@ -285,7 +285,7 @@ MACHINE_END
285 285
286MACHINE_START(STAMP9G20, "taskit Stamp9G20") 286MACHINE_START(STAMP9G20, "taskit Stamp9G20")
287 /* Maintainer: taskit GmbH */ 287 /* Maintainer: taskit GmbH */
288 .init_time = at91sam926x_pit_init, 288 .init_time = at91_init_time,
289 .map_io = at91_map_io, 289 .map_io = at91_map_io,
290 .handle_irq = at91_aic_handle_irq, 290 .handle_irq = at91_aic_handle_irq,
291 .init_early = stamp9g20_init_early, 291 .init_early = stamp9g20_init_early,
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 034529d801b2..d66f102c352a 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -962,6 +962,7 @@ static int __init at91_clock_reset(void)
962 } 962 }
963 963
964 at91_pmc_write(AT91_PMC_SCDR, scdr); 964 at91_pmc_write(AT91_PMC_SCDR, scdr);
965 at91_pmc_write(AT91_PMC_PCDR, pcdr);
965 if (cpu_is_sama5d3()) 966 if (cpu_is_sama5d3())
966 at91_pmc_write(AT91_PMC_PCDR1, pcdr1); 967 at91_pmc_write(AT91_PMC_PCDR1, pcdr1);
967 968
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 631fa3b8c16d..81959cf4a137 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -8,12 +8,16 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef _AT91_GENERIC_H
12#define _AT91_GENERIC_H
13
11#include <linux/clkdev.h> 14#include <linux/clkdev.h>
12#include <linux/of.h> 15#include <linux/of.h>
13#include <linux/reboot.h> 16#include <linux/reboot.h>
14 17
15 /* Map io */ 18 /* Map io */
16extern void __init at91_map_io(void); 19extern void __init at91_map_io(void);
20extern void __init at91_alt_map_io(void);
17extern void __init at91_init_sram(int bank, unsigned long base, 21extern void __init at91_init_sram(int bank, unsigned long base,
18 unsigned int length); 22 unsigned int length);
19 23
@@ -37,12 +41,15 @@ extern int __init at91_aic5_of_init(struct device_node *node,
37extern void __init at91_sysirq_mask_rtc(u32 rtc_base); 41extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
38extern void __init at91_sysirq_mask_rtt(u32 rtt_base); 42extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
39 43
44 /* Devices */
45extern void __init at91_register_devices(void);
40 46
41 /* Timer */ 47 /* Timer */
48extern void __init at91_init_time(void);
42extern void at91rm9200_ioremap_st(u32 addr); 49extern void at91rm9200_ioremap_st(u32 addr);
43extern void at91rm9200_timer_init(void); 50extern void at91rm9200_timer_init(void);
44extern void at91sam926x_ioremap_pit(u32 addr); 51extern void at91sam926x_ioremap_pit(u32 addr);
45extern void at91sam926x_pit_init(void); 52extern void at91sam926x_pit_init(int irq);
46extern void at91x40_timer_init(void); 53extern void at91x40_timer_init(void);
47 54
48 /* Clocks */ 55 /* Clocks */
@@ -62,14 +69,6 @@ extern void at91_irq_resume(void);
62/* idle */ 69/* idle */
63extern void at91sam9_idle(void); 70extern void at91sam9_idle(void);
64 71
65/* reset */
66extern void at91_ioremap_rstc(u32 base_addr);
67extern void at91sam9_alt_restart(enum reboot_mode, const char *);
68extern void at91sam9g45_restart(enum reboot_mode, const char *);
69
70/* shutdown */
71extern void at91_ioremap_shdwc(u32 base_addr);
72
73/* Matrix */ 72/* Matrix */
74extern void at91_ioremap_matrix(u32 base_addr); 73extern void at91_ioremap_matrix(u32 base_addr);
75 74
@@ -90,3 +89,5 @@ extern int __init at91_gpio_of_irq_setup(struct device_node *node,
90 struct device_node *parent); 89 struct device_node *parent);
91 90
92extern u32 at91_get_extern_irq(void); 91extern u32 at91_get_extern_irq(void);
92
93#endif /* _AT91_GENERIC_H */
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
index 732b11c37f1a..7b7366253ceb 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -71,4 +71,10 @@
71#define ABCDSR_PERIPH_C 0x2 71#define ABCDSR_PERIPH_C 0x2
72#define ABCDSR_PERIPH_D 0x3 72#define ABCDSR_PERIPH_D 0x3
73 73
74#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/
75#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/
76
77#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/
78#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/
79
74#endif 80#endif
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 86c71debab5b..b27e9ca65653 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -36,7 +36,7 @@
36#define ARCH_ID_AT91M40807 0x14080745 36#define ARCH_ID_AT91M40807 0x14080745
37#define ARCH_ID_AT91R40008 0x44000840 37#define ARCH_ID_AT91R40008 0x44000840
38 38
39#define ARCH_ID_SAMA5D3 0x8A5C07C0 39#define ARCH_ID_SAMA5 0x8A5C07C0
40 40
41#define ARCH_EXID_AT91SAM9M11 0x00000001 41#define ARCH_EXID_AT91SAM9M11 0x00000001
42#define ARCH_EXID_AT91SAM9M10 0x00000002 42#define ARCH_EXID_AT91SAM9M10 0x00000002
@@ -49,12 +49,19 @@
49#define ARCH_EXID_AT91SAM9G25 0x00000003 49#define ARCH_EXID_AT91SAM9G25 0x00000003
50#define ARCH_EXID_AT91SAM9X25 0x00000004 50#define ARCH_EXID_AT91SAM9X25 0x00000004
51 51
52#define ARCH_EXID_SAMA5D3 0x00004300
52#define ARCH_EXID_SAMA5D31 0x00444300 53#define ARCH_EXID_SAMA5D31 0x00444300
53#define ARCH_EXID_SAMA5D33 0x00414300 54#define ARCH_EXID_SAMA5D33 0x00414300
54#define ARCH_EXID_SAMA5D34 0x00414301 55#define ARCH_EXID_SAMA5D34 0x00414301
55#define ARCH_EXID_SAMA5D35 0x00584300 56#define ARCH_EXID_SAMA5D35 0x00584300
56#define ARCH_EXID_SAMA5D36 0x00004301 57#define ARCH_EXID_SAMA5D36 0x00004301
57 58
59#define ARCH_EXID_SAMA5D4 0x00000007
60#define ARCH_EXID_SAMA5D41 0x00000001
61#define ARCH_EXID_SAMA5D42 0x00000002
62#define ARCH_EXID_SAMA5D43 0x00000003
63#define ARCH_EXID_SAMA5D44 0x00000004
64
58#define ARCH_FAMILY_AT91X92 0x09200000 65#define ARCH_FAMILY_AT91X92 0x09200000
59#define ARCH_FAMILY_AT91SAM9 0x01900000 66#define ARCH_FAMILY_AT91SAM9 0x01900000
60#define ARCH_FAMILY_AT91SAM9XE 0x02900000 67#define ARCH_FAMILY_AT91SAM9XE 0x02900000
@@ -86,6 +93,9 @@ enum at91_soc_type {
86 /* SAMA5D3 */ 93 /* SAMA5D3 */
87 AT91_SOC_SAMA5D3, 94 AT91_SOC_SAMA5D3,
88 95
96 /* SAMA5D4 */
97 AT91_SOC_SAMA5D4,
98
89 /* Unknown type */ 99 /* Unknown type */
90 AT91_SOC_UNKNOWN, 100 AT91_SOC_UNKNOWN,
91}; 101};
@@ -108,6 +118,10 @@ enum at91_soc_subtype {
108 AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, 118 AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
109 AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36, 119 AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36,
110 120
121 /* SAMA5D4 */
122 AT91_SOC_SAMA5D41, AT91_SOC_SAMA5D42, AT91_SOC_SAMA5D43,
123 AT91_SOC_SAMA5D44,
124
111 /* No subtype for this SoC */ 125 /* No subtype for this SoC */
112 AT91_SOC_SUBTYPE_NONE, 126 AT91_SOC_SUBTYPE_NONE,
113 127
@@ -211,6 +225,12 @@ static inline int at91_soc_is_detected(void)
211#define cpu_is_sama5d3() (0) 225#define cpu_is_sama5d3() (0)
212#endif 226#endif
213 227
228#ifdef CONFIG_SOC_SAMA5D4
229#define cpu_is_sama5d4() (at91_soc_initdata.type == AT91_SOC_SAMA5D4)
230#else
231#define cpu_is_sama5d4() (0)
232#endif
233
214/* 234/*
215 * Since this is ARM, we will never run on any AVR32 CPU. But these 235 * Since this is ARM, we will never run on any AVR32 CPU. But these
216 * definitions may reduce clutter in common drivers. 236 * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index c6bb9e2d9baa..2103a90f2261 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -16,8 +16,11 @@
16 16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) 17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0 18#define AT91_DBGU AT91_BASE_DBGU0
19#else 19#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
20#define AT91_DBGU AT91_BASE_DBGU1 20#define AT91_DBGU AT91_BASE_DBGU1
21#else
22/* On sama5d4, use USART3 as low level serial console */
23#define AT91_DBGU SAMA5D4_BASE_USART3
21#endif 24#endif
22 25
23 .macro addruart, rp, rv, tmp 26 .macro addruart, rp, rv, tmp
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 56338245653a..c13797352688 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -19,8 +19,10 @@
19/* DBGU base */ 19/* DBGU base */
20/* rm9200, 9260/9g20, 9261/9g10, 9rl */ 20/* rm9200, 9260/9g20, 9261/9g10, 9rl */
21#define AT91_BASE_DBGU0 0xfffff200 21#define AT91_BASE_DBGU0 0xfffff200
22/* 9263, 9g45 */ 22/* 9263, 9g45, sama5d3 */
23#define AT91_BASE_DBGU1 0xffffee00 23#define AT91_BASE_DBGU1 0xffffee00
24/* sama5d4 */
25#define AT91_BASE_DBGU2 0xfc069000
24 26
25#if defined(CONFIG_ARCH_AT91X40) 27#if defined(CONFIG_ARCH_AT91X40)
26#include <mach/at91x40.h> 28#include <mach/at91x40.h>
@@ -34,6 +36,7 @@
34#include <mach/at91sam9x5.h> 36#include <mach/at91sam9x5.h>
35#include <mach/at91sam9n12.h> 37#include <mach/at91sam9n12.h>
36#include <mach/sama5d3.h> 38#include <mach/sama5d3.h>
39#include <mach/sama5d4.h>
37 40
38/* 41/*
39 * On all at91 except rm9200 and x40 have the System Controller starts 42 * On all at91 except rm9200 and x40 have the System Controller starts
@@ -47,9 +50,15 @@
47 * and map the same memory space 50 * and map the same memory space
48 */ 51 */
49#define AT91_BASE_SYS 0xffffc000 52#define AT91_BASE_SYS 0xffffc000
53
50#endif 54#endif
51 55
52/* 56/*
57 * On sama5d4 there is no system controller, we map some needed peripherals
58 */
59#define AT91_ALT_BASE_SYS 0xfc069000
60
61/*
53 * On all at91 have the Advanced Interrupt Controller starts at address 62 * On all at91 have the Advanced Interrupt Controller starts at address
54 * 0xfffff000 and the Power Management Controller starts at 0xfffffc00 63 * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
55 */ 64 */
@@ -69,23 +78,35 @@
69 */ 78 */
70#define AT91_IO_PHYS_BASE 0xFFF78000 79#define AT91_IO_PHYS_BASE 0xFFF78000
71#define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE) 80#define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
81
82/*
83 * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
84 * to 0xFB069000 .. 0xFB06F000. (24Kb)
85 */
86#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
87#define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000)
72#else 88#else
73/* 89/*
74 * Identity mapping for the non MMU case. 90 * Identity mapping for the non MMU case.
75 */ 91 */
76#define AT91_IO_PHYS_BASE AT91_BASE_SYS 92#define AT91_IO_PHYS_BASE AT91_BASE_SYS
77#define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE) 93#define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE)
94
95#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
96#define AT91_ALT_IO_VIRT_BASE IOMEM(AT91_ALT_BASE_SYS)
78#endif 97#endif
79 98
80#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) 99#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
81 100
82 /* Convert a physical IO address to virtual IO address */ 101 /* Convert a physical IO address to virtual IO address */
83#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) 102#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
103#define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)
84 104
85/* 105/*
86 * Virtual to Physical Address mapping for IO devices. 106 * Virtual to Physical Address mapping for IO devices.
87 */ 107 */
88#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) 108#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
109#define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)
89 110
90 /* Internal SRAM is mapped below the IO devices */ 111 /* Internal SRAM is mapped below the IO devices */
91#define AT91_SRAM_MAX SZ_1M 112#define AT91_SRAM_MAX SZ_1M
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h
new file mode 100644
index 000000000000..f256a45d9854
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama5d4.h
@@ -0,0 +1,33 @@
1/*
2 * Chip-specific header file for the SAMA5D4 family
3 *
4 * Copyright (C) 2013 Atmel Corporation,
5 * Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Common definitions.
8 * Based on SAMA5D4 datasheet.
9 *
10 * Licensed under GPLv2 or later.
11 */
12
13#ifndef SAMA5D4_H
14#define SAMA5D4_H
15
16/*
17 * User Peripheral physical base addresses.
18 */
19#define SAMA5D4_BASE_USART3 0xfc00c000 /* (USART3 non-secure) Base Address */
20#define SAMA5D4_BASE_PMC 0xf0018000 /* (PMC) Base Address */
21#define SAMA5D4_BASE_MPDDRC 0xf0010000 /* (MPDDRC) Base Address */
22#define SAMA5D4_BASE_PIOD 0xfc068000 /* (PIOD) Base Address */
23
24/* Some other peripherals */
25#define SAMA5D4_BASE_SYS2 SAMA5D4_BASE_PIOD
26
27/*
28 * Internal Memory.
29 */
30#define SAMA5D4_NS_SRAM_BASE 0x00210000 /* Internal SRAM base address Non-Secure */
31#define SAMA5D4_NS_SRAM_SIZE (64 * SZ_1K) /* Internal SRAM size Non-Secure part (64Kb) */
32
33#endif
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 4bb644f8e87c..acb2d890ad7e 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
94 0, 94 0,
95}; 95};
96 96
97static const u32 uarts_sama5[] = { 97static const u32 uarts_sama5d3[] = {
98 AT91_BASE_DBGU1, 98 AT91_BASE_DBGU1,
99 SAMA5D3_BASE_USART0, 99 SAMA5D3_BASE_USART0,
100 SAMA5D3_BASE_USART1, 100 SAMA5D3_BASE_USART1,
@@ -103,6 +103,12 @@ static const u32 uarts_sama5[] = {
103 0, 103 0,
104}; 104};
105 105
106static const u32 uarts_sama5d4[] = {
107 AT91_BASE_DBGU2,
108 SAMA5D4_BASE_USART3,
109 0,
110};
111
106static inline const u32* decomp_soc_detect(void __iomem *dbgu_base) 112static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
107{ 113{
108 u32 cidr, socid; 114 u32 cidr, socid;
@@ -134,8 +140,14 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
134 case ARCH_ID_AT91SAM9X5: 140 case ARCH_ID_AT91SAM9X5:
135 return uarts_sam9x5; 141 return uarts_sam9x5;
136 142
137 case ARCH_ID_SAMA5D3: 143 case ARCH_ID_SAMA5:
138 return uarts_sama5; 144 cidr = __raw_readl(dbgu_base + AT91_DBGU_EXID);
145 if (cidr & ARCH_EXID_SAMA5D3)
146 return uarts_sama5d3;
147 else if (cidr & ARCH_EXID_SAMA5D4)
148 return uarts_sama5d4;
149
150 break;
139 } 151 }
140 152
141 /* at91sam9g10 */ 153 /* at91sam9g10 */
@@ -156,9 +168,10 @@ static inline void arch_decomp_setup(void)
156 const u32* usarts; 168 const u32* usarts;
157 169
158 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0); 170 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
159
160 if (!usarts) 171 if (!usarts)
161 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1); 172 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
173 if (!usarts)
174 usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU2);
162 if (!usarts) { 175 if (!usarts) {
163 at91_uart = NULL; 176 at91_uart = NULL;
164 return; 177 return;
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 3d192c5aee66..cdb3ec9efd2b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -48,11 +48,6 @@ void __iomem *at91_aic_base;
48static struct irq_domain *at91_aic_domain; 48static struct irq_domain *at91_aic_domain;
49static struct device_node *at91_aic_np; 49static struct device_node *at91_aic_np;
50static unsigned int n_irqs = NR_AIC_IRQS; 50static unsigned int n_irqs = NR_AIC_IRQS;
51static unsigned long at91_aic_caps = 0;
52
53/* AIC5 introduces a Source Select Register */
54#define AT91_AIC_CAP_AIC5 (1 << 0)
55#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5)
56 51
57#ifdef CONFIG_PM 52#ifdef CONFIG_PM
58 53
@@ -92,50 +87,14 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
92 87
93void at91_irq_suspend(void) 88void at91_irq_suspend(void)
94{ 89{
95 int bit = -1; 90 at91_aic_write(AT91_AIC_IDCR, *backups);
96 91 at91_aic_write(AT91_AIC_IECR, *wakeups);
97 if (has_aic5()) {
98 /* disable enabled irqs */
99 while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
100 at91_aic_write(AT91_AIC5_SSR,
101 bit & AT91_AIC5_INTSEL_MSK);
102 at91_aic_write(AT91_AIC5_IDCR, 1);
103 }
104 /* enable wakeup irqs */
105 bit = -1;
106 while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
107 at91_aic_write(AT91_AIC5_SSR,
108 bit & AT91_AIC5_INTSEL_MSK);
109 at91_aic_write(AT91_AIC5_IECR, 1);
110 }
111 } else {
112 at91_aic_write(AT91_AIC_IDCR, *backups);
113 at91_aic_write(AT91_AIC_IECR, *wakeups);
114 }
115} 92}
116 93
117void at91_irq_resume(void) 94void at91_irq_resume(void)
118{ 95{
119 int bit = -1; 96 at91_aic_write(AT91_AIC_IDCR, *wakeups);
120 97 at91_aic_write(AT91_AIC_IECR, *backups);
121 if (has_aic5()) {
122 /* disable wakeup irqs */
123 while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
124 at91_aic_write(AT91_AIC5_SSR,
125 bit & AT91_AIC5_INTSEL_MSK);
126 at91_aic_write(AT91_AIC5_IDCR, 1);
127 }
128 /* enable irqs disabled for suspend */
129 bit = -1;
130 while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
131 at91_aic_write(AT91_AIC5_SSR,
132 bit & AT91_AIC5_INTSEL_MSK);
133 at91_aic_write(AT91_AIC5_IECR, 1);
134 }
135 } else {
136 at91_aic_write(AT91_AIC_IDCR, *wakeups);
137 at91_aic_write(AT91_AIC_IECR, *backups);
138 }
139} 98}
140 99
141#else 100#else
@@ -169,21 +128,6 @@ at91_aic_handle_irq(struct pt_regs *regs)
169 handle_IRQ(irqnr, regs); 128 handle_IRQ(irqnr, regs);
170} 129}
171 130
172asmlinkage void __exception_irq_entry
173at91_aic5_handle_irq(struct pt_regs *regs)
174{
175 u32 irqnr;
176 u32 irqstat;
177
178 irqnr = at91_aic_read(AT91_AIC5_IVR);
179 irqstat = at91_aic_read(AT91_AIC5_ISR);
180
181 if (!irqstat)
182 at91_aic_write(AT91_AIC5_EOICR, 0);
183 else
184 handle_IRQ(irqnr, regs);
185}
186
187static void at91_aic_mask_irq(struct irq_data *d) 131static void at91_aic_mask_irq(struct irq_data *d)
188{ 132{
189 /* Disable interrupt on AIC */ 133 /* Disable interrupt on AIC */
@@ -192,15 +136,6 @@ static void at91_aic_mask_irq(struct irq_data *d)
192 clear_backup(d->hwirq); 136 clear_backup(d->hwirq);
193} 137}
194 138
195static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
196{
197 /* Disable interrupt on AIC5 */
198 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
199 at91_aic_write(AT91_AIC5_IDCR, 1);
200 /* Update ISR cache */
201 clear_backup(d->hwirq);
202}
203
204static void at91_aic_unmask_irq(struct irq_data *d) 139static void at91_aic_unmask_irq(struct irq_data *d)
205{ 140{
206 /* Enable interrupt on AIC */ 141 /* Enable interrupt on AIC */
@@ -209,15 +144,6 @@ static void at91_aic_unmask_irq(struct irq_data *d)
209 set_backup(d->hwirq); 144 set_backup(d->hwirq);
210} 145}
211 146
212static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
213{
214 /* Enable interrupt on AIC5 */
215 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
216 at91_aic_write(AT91_AIC5_IECR, 1);
217 /* Update ISR cache */
218 set_backup(d->hwirq);
219}
220
221static void at91_aic_eoi(struct irq_data *d) 147static void at91_aic_eoi(struct irq_data *d)
222{ 148{
223 /* 149 /*
@@ -227,11 +153,6 @@ static void at91_aic_eoi(struct irq_data *d)
227 at91_aic_write(AT91_AIC_EOICR, 0); 153 at91_aic_write(AT91_AIC_EOICR, 0);
228} 154}
229 155
230static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
231{
232 at91_aic_write(AT91_AIC5_EOICR, 0);
233}
234
235static unsigned long *at91_extern_irq; 156static unsigned long *at91_extern_irq;
236 157
237u32 at91_get_extern_irq(void) 158u32 at91_get_extern_irq(void)
@@ -282,16 +203,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
282 if (srctype < 0) 203 if (srctype < 0)
283 return srctype; 204 return srctype;
284 205
285 if (has_aic5()) { 206 smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE;
286 at91_aic_write(AT91_AIC5_SSR, 207 at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
287 d->hwirq & AT91_AIC5_INTSEL_MSK);
288 smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE;
289 at91_aic_write(AT91_AIC5_SMR, smr | srctype);
290 } else {
291 smr = at91_aic_read(AT91_AIC_SMR(d->hwirq))
292 & ~AT91_AIC_SRCTYPE;
293 at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
294 }
295 208
296 return 0; 209 return 0;
297} 210}
@@ -331,177 +244,6 @@ static void __init at91_aic_hw_init(unsigned int spu_vector)
331 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); 244 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
332} 245}
333 246
334static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector)
335{
336 int i;
337
338 /*
339 * Perform 8 End Of Interrupt Command to make sure AIC
340 * will not Lock out nIRQ
341 */
342 for (i = 0; i < 8; i++)
343 at91_aic_write(AT91_AIC5_EOICR, 0);
344
345 /*
346 * Spurious Interrupt ID in Spurious Vector Register.
347 * When there is no current interrupt, the IRQ Vector Register
348 * reads the value stored in AIC_SPU
349 */
350 at91_aic_write(AT91_AIC5_SPU, spu_vector);
351
352 /* No debugging in AIC: Debug (Protect) Control Register */
353 at91_aic_write(AT91_AIC5_DCR, 0);
354
355 /* Disable and clear all interrupts initially */
356 for (i = 0; i < n_irqs; i++) {
357 at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK);
358 at91_aic_write(AT91_AIC5_IDCR, 1);
359 at91_aic_write(AT91_AIC5_ICCR, 1);
360 }
361}
362
363#if defined(CONFIG_OF)
364static unsigned int *at91_aic_irq_priorities;
365
366static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
367 irq_hw_number_t hw)
368{
369 /* Put virq number in Source Vector Register */
370 at91_aic_write(AT91_AIC_SVR(hw), virq);
371
372 /* Active Low interrupt, with priority */
373 at91_aic_write(AT91_AIC_SMR(hw),
374 AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
375
376 irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
377 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
378
379 return 0;
380}
381
382static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq,
383 irq_hw_number_t hw)
384{
385 at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK);
386
387 /* Put virq number in Source Vector Register */
388 at91_aic_write(AT91_AIC5_SVR, virq);
389
390 /* Active Low interrupt, with priority */
391 at91_aic_write(AT91_AIC5_SMR,
392 AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
393
394 irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
395 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
396
397 return 0;
398}
399
400static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
401 const u32 *intspec, unsigned int intsize,
402 irq_hw_number_t *out_hwirq, unsigned int *out_type)
403{
404 if (WARN_ON(intsize < 3))
405 return -EINVAL;
406 if (WARN_ON(intspec[0] >= n_irqs))
407 return -EINVAL;
408 if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY)
409 || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
410 return -EINVAL;
411
412 *out_hwirq = intspec[0];
413 *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
414 at91_aic_irq_priorities[*out_hwirq] = intspec[2];
415
416 return 0;
417}
418
419static struct irq_domain_ops at91_aic_irq_ops = {
420 .map = at91_aic_irq_map,
421 .xlate = at91_aic_irq_domain_xlate,
422};
423
424int __init at91_aic_of_common_init(struct device_node *node,
425 struct device_node *parent)
426{
427 struct property *prop;
428 const __be32 *p;
429 u32 val;
430
431 at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
432 * sizeof(*at91_extern_irq), GFP_KERNEL);
433 if (!at91_extern_irq)
434 return -ENOMEM;
435
436 if (at91_aic_pm_init()) {
437 kfree(at91_extern_irq);
438 return -ENOMEM;
439 }
440
441 at91_aic_irq_priorities = kzalloc(n_irqs
442 * sizeof(*at91_aic_irq_priorities),
443 GFP_KERNEL);
444 if (!at91_aic_irq_priorities)
445 return -ENOMEM;
446
447 at91_aic_base = of_iomap(node, 0);
448 at91_aic_np = node;
449
450 at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs,
451 &at91_aic_irq_ops, NULL);
452 if (!at91_aic_domain)
453 panic("Unable to add AIC irq domain (DT)\n");
454
455 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
456 if (val >= n_irqs)
457 pr_warn("AIC: external irq %d >= %d skip it\n",
458 val, n_irqs);
459 else
460 set_bit(val, at91_extern_irq);
461 }
462
463 irq_set_default_host(at91_aic_domain);
464
465 return 0;
466}
467
468int __init at91_aic_of_init(struct device_node *node,
469 struct device_node *parent)
470{
471 int err;
472
473 err = at91_aic_of_common_init(node, parent);
474 if (err)
475 return err;
476
477 at91_aic_hw_init(n_irqs);
478
479 return 0;
480}
481
482int __init at91_aic5_of_init(struct device_node *node,
483 struct device_node *parent)
484{
485 int err;
486
487 at91_aic_caps |= AT91_AIC_CAP_AIC5;
488 n_irqs = NR_AIC5_IRQS;
489 at91_aic_chip.irq_ack = at91_aic5_mask_irq;
490 at91_aic_chip.irq_mask = at91_aic5_mask_irq;
491 at91_aic_chip.irq_unmask = at91_aic5_unmask_irq;
492 at91_aic_chip.irq_eoi = at91_aic5_eoi;
493 at91_aic_irq_ops.map = at91_aic5_irq_map;
494
495 err = at91_aic_of_common_init(node, parent);
496 if (err)
497 return err;
498
499 at91_aic5_hw_init(n_irqs);
500
501 return 0;
502}
503#endif
504
505/* 247/*
506 * Initialize the AIC interrupt controller. 248 * Initialize the AIC interrupt controller.
507 */ 249 */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index e95554532987..4073ab7f38f3 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,79 +34,8 @@
34#include "pm.h" 34#include "pm.h"
35#include "gpio.h" 35#include "gpio.h"
36 36
37/*
38 * Show the reason for the previous system reset.
39 */
40
41#include "at91_rstc.h"
42#include "at91_shdwc.h"
43
44static void (*at91_pm_standby)(void); 37static void (*at91_pm_standby)(void);
45 38
46static void __init show_reset_status(void)
47{
48 static char reset[] __initdata = "reset";
49
50 static char general[] __initdata = "general";
51 static char wakeup[] __initdata = "wakeup";
52 static char watchdog[] __initdata = "watchdog";
53 static char software[] __initdata = "software";
54 static char user[] __initdata = "user";
55 static char unknown[] __initdata = "unknown";
56
57 static char signal[] __initdata = "signal";
58 static char rtc[] __initdata = "rtc";
59 static char rtt[] __initdata = "rtt";
60 static char restore[] __initdata = "power-restored";
61
62 char *reason, *r2 = reset;
63 u32 reset_type, wake_type;
64
65 if (!at91_shdwc_base || !at91_rstc_base)
66 return;
67
68 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
69 wake_type = at91_shdwc_read(AT91_SHDW_SR);
70
71 switch (reset_type) {
72 case AT91_RSTC_RSTTYP_GENERAL:
73 reason = general;
74 break;
75 case AT91_RSTC_RSTTYP_WAKEUP:
76 /* board-specific code enabled the wakeup sources */
77 reason = wakeup;
78
79 /* "wakeup signal" */
80 if (wake_type & AT91_SHDW_WAKEUP0)
81 r2 = signal;
82 else {
83 r2 = reason;
84 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
85 reason = rtt;
86 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
87 reason = rtc;
88 else if (wake_type == 0) /* power-restored wakeup */
89 reason = restore;
90 else /* unknown wakeup */
91 reason = unknown;
92 }
93 break;
94 case AT91_RSTC_RSTTYP_WATCHDOG:
95 reason = watchdog;
96 break;
97 case AT91_RSTC_RSTTYP_SOFTWARE:
98 reason = software;
99 break;
100 case AT91_RSTC_RSTTYP_USER:
101 reason = user;
102 break;
103 default:
104 reason = unknown;
105 break;
106 }
107 pr_info("AT91: Starting after %s %s\n", reason, r2);
108}
109
110static int at91_pm_valid_state(suspend_state_t state) 39static int at91_pm_valid_state(suspend_state_t state)
111{ 40{
112 switch (state) { 41 switch (state) {
@@ -206,16 +135,19 @@ static int at91_pm_enter(suspend_state_t state)
206 at91_pinctrl_gpio_suspend(); 135 at91_pinctrl_gpio_suspend();
207 else 136 else
208 at91_gpio_suspend(); 137 at91_gpio_suspend();
209 at91_irq_suspend();
210 138
211 pr_debug("AT91: PM - wake mask %08x, pm state %d\n", 139 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) {
212 /* remember all the always-wake irqs */ 140 at91_irq_suspend();
213 (at91_pmc_read(AT91_PMC_PCSR) 141
214 | (1 << AT91_ID_FIQ) 142 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
215 | (1 << AT91_ID_SYS) 143 /* remember all the always-wake irqs */
216 | (at91_get_extern_irq())) 144 (at91_pmc_read(AT91_PMC_PCSR)
217 & at91_aic_read(AT91_AIC_IMR), 145 | (1 << AT91_ID_FIQ)
218 state); 146 | (1 << AT91_ID_SYS)
147 | (at91_get_extern_irq()))
148 & at91_aic_read(AT91_AIC_IMR),
149 state);
150 }
219 151
220 switch (state) { 152 switch (state) {
221 /* 153 /*
@@ -280,12 +212,17 @@ static int at91_pm_enter(suspend_state_t state)
280 goto error; 212 goto error;
281 } 213 }
282 214
283 pr_debug("AT91: PM - wakeup %08x\n", 215 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
284 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); 216 pr_debug("AT91: PM - wakeup %08x\n",
217 at91_aic_read(AT91_AIC_IPR) &
218 at91_aic_read(AT91_AIC_IMR));
285 219
286error: 220error:
287 target_state = PM_SUSPEND_ON; 221 target_state = PM_SUSPEND_ON;
288 at91_irq_resume(); 222
223 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
224 at91_irq_resume();
225
289 if (of_have_populated_dt()) 226 if (of_have_populated_dt())
290 at91_pinctrl_gpio_resume(); 227 at91_pinctrl_gpio_resume();
291 else 228 else
@@ -338,7 +275,6 @@ static int __init at91_pm_init(void)
338 275
339 suspend_set_ops(&at91_pm_ops); 276 suspend_set_ops(&at91_pm_ops);
340 277
341 show_reset_status();
342 return 0; 278 return 0;
343} 279}
344arch_initcall(at91_pm_init); 280arch_initcall(at91_pm_init);
diff --git a/arch/arm/mach-at91/sama5d4.c b/arch/arm/mach-at91/sama5d4.c
new file mode 100644
index 000000000000..7638509639f4
--- /dev/null
+++ b/arch/arm/mach-at91/sama5d4.c
@@ -0,0 +1,64 @@
1/*
2 * Chip-specific setup code for the SAMA5D4 family
3 *
4 * Copyright (C) 2013 Atmel Corporation,
5 * Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/dma-mapping.h>
12#include <linux/clk/at91_pmc.h>
13
14#include <asm/irq.h>
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <mach/sama5d4.h>
18#include <mach/cpu.h>
19#include <mach/hardware.h>
20
21#include "soc.h"
22#include "generic.h"
23#include "sam9_smc.h"
24
25/* --------------------------------------------------------------------
26 * Processor initialization
27 * -------------------------------------------------------------------- */
28static struct map_desc at91_io_desc[] __initdata = {
29 {
30 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC),
31 .pfn = __phys_to_pfn(SAMA5D4_BASE_MPDDRC),
32 .length = SZ_512,
33 .type = MT_DEVICE,
34 },
35 {
36 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC),
37 .pfn = __phys_to_pfn(SAMA5D4_BASE_PMC),
38 .length = SZ_512,
39 .type = MT_DEVICE,
40 },
41 { /* On sama5d4, we use USART3 as serial console */
42 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3),
43 .pfn = __phys_to_pfn(SAMA5D4_BASE_USART3),
44 .length = SZ_256,
45 .type = MT_DEVICE,
46 },
47 { /* A bunch of peripheral with fine grained IO space */
48 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2),
49 .pfn = __phys_to_pfn(SAMA5D4_BASE_SYS2),
50 .length = SZ_2K,
51 .type = MT_DEVICE,
52 },
53};
54
55
56static void __init sama5d4_map_io(void)
57{
58 iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc));
59 at91_init_sram(0, SAMA5D4_NS_SRAM_BASE, SAMA5D4_NS_SRAM_SIZE);
60}
61
62AT91_SOC_START(sama5d4)
63 .map_io = sama5d4_map_io,
64AT91_SOC_END
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index f7a07a58ebb6..961079250b83 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -5,6 +5,8 @@
5 * Under GPLv2 5 * Under GPLv2
6 */ 6 */
7 7
8#define pr_fmt(fmt) "AT91: " fmt
9
8#include <linux/module.h> 10#include <linux/module.h>
9#include <linux/io.h> 11#include <linux/io.h>
10#include <linux/mm.h> 12#include <linux/mm.h>
@@ -20,7 +22,6 @@
20#include <mach/cpu.h> 22#include <mach/cpu.h>
21#include <mach/at91_dbgu.h> 23#include <mach/at91_dbgu.h>
22 24
23#include "at91_shdwc.h"
24#include "soc.h" 25#include "soc.h"
25#include "generic.h" 26#include "generic.h"
26#include "pm.h" 27#include "pm.h"
@@ -37,7 +38,7 @@ void __init at91rm9200_set_type(int type)
37 else 38 else
38 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; 39 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
39 40
40 pr_info("AT91: filled in soc subtype: %s\n", 41 pr_info("filled in soc subtype: %s\n",
41 at91_get_soc_subtype(&at91_soc_initdata)); 42 at91_get_soc_subtype(&at91_soc_initdata));
42} 43}
43 44
@@ -49,7 +50,8 @@ void __init at91_init_irq_default(void)
49void __init at91_init_interrupts(unsigned int *priority) 50void __init at91_init_interrupts(unsigned int *priority)
50{ 51{
51 /* Initialize the AIC interrupt controller */ 52 /* Initialize the AIC interrupt controller */
52 at91_aic_init(priority, at91_boot_soc.extern_irq); 53 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91))
54 at91_aic_init(priority, at91_boot_soc.extern_irq);
53 55
54 /* Enable GPIO interrupts */ 56 /* Enable GPIO interrupts */
55 at91_gpio_irq_setup(); 57 at91_gpio_irq_setup();
@@ -66,7 +68,7 @@ void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
66 } 68 }
67 at91_ramc_base[id] = ioremap(addr, size); 69 at91_ramc_base[id] = ioremap(addr, size);
68 if (!at91_ramc_base[id]) 70 if (!at91_ramc_base[id])
69 panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); 71 panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
70} 72}
71 73
72static struct map_desc sram_desc[2] __initdata; 74static struct map_desc sram_desc[2] __initdata;
@@ -83,7 +85,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
83 desc->length = length; 85 desc->length = length;
84 desc->type = MT_MEMORY_RWX_NONCACHED; 86 desc->type = MT_MEMORY_RWX_NONCACHED;
85 87
86 pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n", 88 pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n",
87 base, length, desc->virtual); 89 base, length, desc->virtual);
88 90
89 iotable_init(desc, 1); 91 iotable_init(desc, 1);
@@ -96,6 +98,13 @@ static struct map_desc at91_io_desc __initdata __maybe_unused = {
96 .type = MT_DEVICE, 98 .type = MT_DEVICE,
97}; 99};
98 100
101static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
102 .virtual = (unsigned long)AT91_ALT_VA_BASE_SYS,
103 .pfn = __phys_to_pfn(AT91_ALT_BASE_SYS),
104 .length = 24 * SZ_1K,
105 .type = MT_DEVICE,
106};
107
99static void __init soc_detect(u32 dbgu_base) 108static void __init soc_detect(u32 dbgu_base)
100{ 109{
101 u32 cidr, socid; 110 u32 cidr, socid;
@@ -158,9 +167,12 @@ static void __init soc_detect(u32 dbgu_base)
158 at91_boot_soc = at91sam9n12_soc; 167 at91_boot_soc = at91sam9n12_soc;
159 break; 168 break;
160 169
161 case ARCH_ID_SAMA5D3: 170 case ARCH_ID_SAMA5:
162 at91_soc_initdata.type = AT91_SOC_SAMA5D3; 171 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
163 at91_boot_soc = sama5d3_soc; 172 if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
173 at91_soc_initdata.type = AT91_SOC_SAMA5D3;
174 at91_boot_soc = sama5d3_soc;
175 }
164 break; 176 break;
165 } 177 }
166 178
@@ -183,7 +195,8 @@ static void __init soc_detect(u32 dbgu_base)
183 at91_soc_initdata.cidr = cidr; 195 at91_soc_initdata.cidr = cidr;
184 196
185 /* sub version of soc */ 197 /* sub version of soc */
186 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID); 198 if (!at91_soc_initdata.exid)
199 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
187 200
188 if (at91_soc_initdata.type == AT91_SOC_SAM9G45) { 201 if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
189 switch (at91_soc_initdata.exid) { 202 switch (at91_soc_initdata.exid) {
@@ -240,6 +253,54 @@ static void __init soc_detect(u32 dbgu_base)
240 } 253 }
241} 254}
242 255
256static void __init alt_soc_detect(u32 dbgu_base)
257{
258 u32 cidr, socid;
259
260 /* SoC ID */
261 cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
262 socid = cidr & ~AT91_CIDR_VERSION;
263
264 switch (socid) {
265 case ARCH_ID_SAMA5:
266 at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
267 if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
268 at91_soc_initdata.type = AT91_SOC_SAMA5D3;
269 at91_boot_soc = sama5d3_soc;
270 } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
271 at91_soc_initdata.type = AT91_SOC_SAMA5D4;
272 at91_boot_soc = sama5d4_soc;
273 }
274 break;
275 }
276
277 if (!at91_soc_is_detected())
278 return;
279
280 at91_soc_initdata.cidr = cidr;
281
282 /* sub version of soc */
283 if (!at91_soc_initdata.exid)
284 at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
285
286 if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
287 switch (at91_soc_initdata.exid) {
288 case ARCH_EXID_SAMA5D41:
289 at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
290 break;
291 case ARCH_EXID_SAMA5D42:
292 at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
293 break;
294 case ARCH_EXID_SAMA5D43:
295 at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
296 break;
297 case ARCH_EXID_SAMA5D44:
298 at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
299 break;
300 }
301 }
302}
303
243static const char *soc_name[] = { 304static const char *soc_name[] = {
244 [AT91_SOC_RM9200] = "at91rm9200", 305 [AT91_SOC_RM9200] = "at91rm9200",
245 [AT91_SOC_SAM9260] = "at91sam9260", 306 [AT91_SOC_SAM9260] = "at91sam9260",
@@ -252,6 +313,7 @@ static const char *soc_name[] = {
252 [AT91_SOC_SAM9X5] = "at91sam9x5", 313 [AT91_SOC_SAM9X5] = "at91sam9x5",
253 [AT91_SOC_SAM9N12] = "at91sam9n12", 314 [AT91_SOC_SAM9N12] = "at91sam9n12",
254 [AT91_SOC_SAMA5D3] = "sama5d3", 315 [AT91_SOC_SAMA5D3] = "sama5d3",
316 [AT91_SOC_SAMA5D4] = "sama5d4",
255 [AT91_SOC_UNKNOWN] = "Unknown", 317 [AT91_SOC_UNKNOWN] = "Unknown",
256}; 318};
257 319
@@ -279,6 +341,10 @@ static const char *soc_subtype_name[] = {
279 [AT91_SOC_SAMA5D34] = "sama5d34", 341 [AT91_SOC_SAMA5D34] = "sama5d34",
280 [AT91_SOC_SAMA5D35] = "sama5d35", 342 [AT91_SOC_SAMA5D35] = "sama5d35",
281 [AT91_SOC_SAMA5D36] = "sama5d36", 343 [AT91_SOC_SAMA5D36] = "sama5d36",
344 [AT91_SOC_SAMA5D41] = "sama5d41",
345 [AT91_SOC_SAMA5D42] = "sama5d42",
346 [AT91_SOC_SAMA5D43] = "sama5d43",
347 [AT91_SOC_SAMA5D44] = "sama5d44",
282 [AT91_SOC_SUBTYPE_NONE] = "None", 348 [AT91_SOC_SUBTYPE_NONE] = "None",
283 [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown", 349 [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
284}; 350};
@@ -302,43 +368,44 @@ void __init at91_map_io(void)
302 soc_detect(AT91_BASE_DBGU1); 368 soc_detect(AT91_BASE_DBGU1);
303 369
304 if (!at91_soc_is_detected()) 370 if (!at91_soc_is_detected())
305 panic("AT91: Impossible to detect the SOC type"); 371 panic(pr_fmt("Impossible to detect the SOC type"));
306 372
307 pr_info("AT91: Detected soc type: %s\n", 373 pr_info("Detected soc type: %s\n",
308 at91_get_soc_type(&at91_soc_initdata)); 374 at91_get_soc_type(&at91_soc_initdata));
309 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) 375 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
310 pr_info("AT91: Detected soc subtype: %s\n", 376 pr_info("Detected soc subtype: %s\n",
311 at91_get_soc_subtype(&at91_soc_initdata)); 377 at91_get_soc_subtype(&at91_soc_initdata));
312 378
313 if (!at91_soc_is_enabled()) 379 if (!at91_soc_is_enabled())
314 panic("AT91: Soc not enabled"); 380 panic(pr_fmt("Soc not enabled"));
315 381
316 if (at91_boot_soc.map_io) 382 if (at91_boot_soc.map_io)
317 at91_boot_soc.map_io(); 383 at91_boot_soc.map_io();
318} 384}
319 385
320void __iomem *at91_shdwc_base = NULL; 386void __init at91_alt_map_io(void)
321
322static void at91sam9_poweroff(void)
323{ 387{
324 at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); 388 /* Map peripherals */
325} 389 iotable_init(&at91_alt_io_desc, 1);
326 390
327void __init at91_ioremap_shdwc(u32 base_addr) 391 at91_soc_initdata.type = AT91_SOC_UNKNOWN;
328{ 392 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
329 at91_shdwc_base = ioremap(base_addr, 16);
330 if (!at91_shdwc_base)
331 panic("Impossible to ioremap at91_shdwc_base\n");
332 pm_power_off = at91sam9_poweroff;
333}
334 393
335void __iomem *at91_rstc_base; 394 alt_soc_detect(AT91_BASE_DBGU2);
395 if (!at91_soc_is_detected())
396 panic("AT91: Impossible to detect the SOC type");
336 397
337void __init at91_ioremap_rstc(u32 base_addr) 398 pr_info("AT91: Detected soc type: %s\n",
338{ 399 at91_get_soc_type(&at91_soc_initdata));
339 at91_rstc_base = ioremap(base_addr, 16); 400 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
340 if (!at91_rstc_base) 401 pr_info("AT91: Detected soc subtype: %s\n",
341 panic("Impossible to ioremap at91_rstc_base\n"); 402 at91_get_soc_subtype(&at91_soc_initdata));
403
404 if (!at91_soc_is_enabled())
405 panic("AT91: Soc not enabled");
406
407 if (at91_boot_soc.map_io)
408 at91_boot_soc.map_io();
342} 409}
343 410
344void __iomem *at91_matrix_base; 411void __iomem *at91_matrix_base;
@@ -348,42 +415,15 @@ void __init at91_ioremap_matrix(u32 base_addr)
348{ 415{
349 at91_matrix_base = ioremap(base_addr, 512); 416 at91_matrix_base = ioremap(base_addr, 512);
350 if (!at91_matrix_base) 417 if (!at91_matrix_base)
351 panic("Impossible to ioremap at91_matrix_base\n"); 418 panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
352} 419}
353 420
354#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40) 421#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40)
355static struct of_device_id rstc_ids[] = {
356 { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
357 { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
358 { /*sentinel*/ }
359};
360
361static void at91_dt_rstc(void)
362{
363 struct device_node *np;
364 const struct of_device_id *of_id;
365
366 np = of_find_matching_node(NULL, rstc_ids);
367 if (!np)
368 panic("unable to find compatible rstc node in dtb\n");
369
370 at91_rstc_base = of_iomap(np, 0);
371 if (!at91_rstc_base)
372 panic("unable to map rstc cpu registers\n");
373
374 of_id = of_match_node(rstc_ids, np);
375 if (!of_id)
376 panic("AT91: rtsc no restart function available\n");
377
378 arm_pm_restart = of_id->data;
379
380 of_node_put(np);
381}
382
383static struct of_device_id ramc_ids[] = { 422static struct of_device_id ramc_ids[] = {
384 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, 423 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
385 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, 424 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
386 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, 425 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
426 { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
387 { /*sentinel*/ } 427 { /*sentinel*/ }
388}; 428};
389 429
@@ -391,100 +431,29 @@ static void at91_dt_ramc(void)
391{ 431{
392 struct device_node *np; 432 struct device_node *np;
393 const struct of_device_id *of_id; 433 const struct of_device_id *of_id;
434 int idx = 0;
435 const void *standby = NULL;
394 436
395 np = of_find_matching_node(NULL, ramc_ids); 437 for_each_matching_node_and_match(np, ramc_ids, &of_id) {
396 if (!np) 438 at91_ramc_base[idx] = of_iomap(np, 0);
397 panic("unable to find compatible ram controller node in dtb\n"); 439 if (!at91_ramc_base[idx])
398 440 panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
399 at91_ramc_base[0] = of_iomap(np, 0);
400 if (!at91_ramc_base[0])
401 panic("unable to map ramc[0] cpu registers\n");
402 /* the controller may have 2 banks */
403 at91_ramc_base[1] = of_iomap(np, 1);
404 441
405 of_id = of_match_node(ramc_ids, np); 442 if (!standby)
406 if (!of_id) 443 standby = of_id->data;
407 pr_warn("AT91: ramc no standby function available\n");
408 else
409 at91_pm_set_standby(of_id->data);
410 444
411 of_node_put(np); 445 idx++;
412}
413
414static struct of_device_id shdwc_ids[] = {
415 { .compatible = "atmel,at91sam9260-shdwc", },
416 { .compatible = "atmel,at91sam9rl-shdwc", },
417 { .compatible = "atmel,at91sam9x5-shdwc", },
418 { /*sentinel*/ }
419};
420
421static const char *shdwc_wakeup_modes[] = {
422 [AT91_SHDW_WKMODE0_NONE] = "none",
423 [AT91_SHDW_WKMODE0_HIGH] = "high",
424 [AT91_SHDW_WKMODE0_LOW] = "low",
425 [AT91_SHDW_WKMODE0_ANYLEVEL] = "any",
426};
427
428const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
429{
430 const char *pm;
431 int err, i;
432
433 err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
434 if (err < 0)
435 return AT91_SHDW_WKMODE0_ANYLEVEL;
436
437 for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
438 if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
439 return i;
440
441 return -ENODEV;
442}
443
444static void at91_dt_shdwc(void)
445{
446 struct device_node *np;
447 int wakeup_mode;
448 u32 reg;
449 u32 mode = 0;
450
451 np = of_find_matching_node(NULL, shdwc_ids);
452 if (!np) {
453 pr_debug("AT91: unable to find compatible shutdown (shdwc) controller node in dtb\n");
454 return;
455 } 446 }
456 447
457 at91_shdwc_base = of_iomap(np, 0); 448 if (!idx)
458 if (!at91_shdwc_base) 449 panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
459 panic("AT91: unable to map shdwc cpu registers\n");
460
461 wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
462 if (wakeup_mode < 0) {
463 pr_warn("AT91: shdwc unknown wakeup mode\n");
464 goto end;
465 }
466 450
467 if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) { 451 if (!standby) {
468 if (reg > AT91_SHDW_CPTWK0_MAX) { 452 pr_warn("ramc no standby function available\n");
469 pr_warn("AT91: shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", 453 return;
470 reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
471 reg = AT91_SHDW_CPTWK0_MAX;
472 }
473 mode |= AT91_SHDW_CPTWK0_(reg);
474 } 454 }
475 455
476 if (of_property_read_bool(np, "atmel,wakeup-rtc-timer")) 456 at91_pm_set_standby(standby);
477 mode |= AT91_SHDW_RTCWKEN;
478
479 if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
480 mode |= AT91_SHDW_RTTWKEN;
481
482 at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
483
484end:
485 pm_power_off = at91sam9_poweroff;
486
487 of_node_put(np);
488} 457}
489 458
490void __init at91rm9200_dt_initialize(void) 459void __init at91rm9200_dt_initialize(void)
@@ -503,9 +472,7 @@ void __init at91rm9200_dt_initialize(void)
503 472
504void __init at91_dt_initialize(void) 473void __init at91_dt_initialize(void)
505{ 474{
506 at91_dt_rstc();
507 at91_dt_ramc(); 475 at91_dt_ramc();
508 at91_dt_shdwc();
509 476
510 /* Init clock subsystem */ 477 /* Init clock subsystem */
511 at91_dt_clock_init(); 478 at91_dt_clock_init();
@@ -533,3 +500,13 @@ void __init at91_initialize(unsigned long main_clock)
533 500
534 pinctrl_provide_dummies(); 501 pinctrl_provide_dummies();
535} 502}
503
504void __init at91_register_devices(void)
505{
506 at91_boot_soc.register_devices();
507}
508
509void __init at91_init_time(void)
510{
511 at91_boot_soc.init_time();
512}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a1e1482c6da8..9a8fd97a8bef 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -11,7 +11,9 @@ struct at91_init_soc {
11 void (*map_io)(void); 11 void (*map_io)(void);
12 void (*ioremap_registers)(void); 12 void (*ioremap_registers)(void);
13 void (*register_clocks)(void); 13 void (*register_clocks)(void);
14 void (*register_devices)(void);
14 void (*init)(void); 15 void (*init)(void);
16 void (*init_time)(void);
15}; 17};
16 18
17extern struct at91_init_soc at91_boot_soc; 19extern struct at91_init_soc at91_boot_soc;
@@ -24,6 +26,7 @@ extern struct at91_init_soc at91sam9rl_soc;
24extern struct at91_init_soc at91sam9x5_soc; 26extern struct at91_init_soc at91sam9x5_soc;
25extern struct at91_init_soc at91sam9n12_soc; 27extern struct at91_init_soc at91sam9n12_soc;
26extern struct at91_init_soc sama5d3_soc; 28extern struct at91_init_soc sama5d3_soc;
29extern struct at91_init_soc sama5d4_soc;
27 30
28#define AT91_SOC_START(_name) \ 31#define AT91_SOC_START(_name) \
29struct at91_init_soc __initdata _name##_soc \ 32struct at91_init_soc __initdata _name##_soc \
@@ -74,3 +77,7 @@ static inline int at91_soc_is_enabled(void)
74#if !defined(CONFIG_SOC_SAMA5D3) 77#if !defined(CONFIG_SOC_SAMA5D3)
75#define sama5d3_soc at91_boot_soc 78#define sama5d3_soc at91_boot_soc
76#endif 79#endif
80
81#if !defined(CONFIG_SOC_SAMA5D4)
82#define sama5d4_soc at91_boot_soc
83#endif
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-07 06:05:06 -0500