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-rw-r--r--arch/arm/mach-at91/Kconfig56
-rw-r--r--arch/arm/mach-at91/Makefile8
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c99
-rw-r--r--arch/arm/mach-at91/at91sam9260.c16
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c44
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c16
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c128
-rw-r--r--arch/arm/mach-at91/at91x40.c18
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c9
-rw-r--r--arch/arm/mach-at91/board-carmeva.c23
-rw-r--r--arch/arm/mach-at91/board-csb637.c4
-rw-r--r--arch/arm/mach-at91/board-dk.c25
-rw-r--r--arch/arm/mach-at91/board-eb9200.c26
-rw-r--r--arch/arm/mach-at91/board-ek.c25
-rw-r--r--arch/arm/mach-at91/board-kb9202.c29
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c255
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c218
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c10
-rw-r--r--arch/arm/mach-at91/board-usb-a9260.c215
-rw-r--r--arch/arm/mach-at91/board-usb-a9263.c230
-rwxr-xr-xarch/arm/mach-at91/board-yl-9200.c853
-rw-r--r--arch/arm/mach-at91/clock.c64
-rw-r--r--arch/arm/mach-at91/pm.c2
24 files changed, 1781 insertions, 596 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 0fc07b6db749..5bad6b9b00d7 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -30,6 +30,11 @@ config ARCH_AT91SAM9RL
30 select GENERIC_TIME 30 select GENERIC_TIME
31 select GENERIC_CLOCKEVENTS 31 select GENERIC_CLOCKEVENTS
32 32
33config ARCH_AT91SAM9G20
34 bool "AT91SAM9G20"
35 select GENERIC_TIME
36 select GENERIC_CLOCKEVENTS
37
33config ARCH_AT91CAP9 38config ARCH_AT91CAP9
34 bool "AT91CAP9" 39 bool "AT91CAP9"
35 select GENERIC_TIME 40 select GENERIC_TIME
@@ -126,6 +131,12 @@ config MACH_ECBAT91
126 Select this if you are using emQbit's ECB_AT91 board. 131 Select this if you are using emQbit's ECB_AT91 board.
127 <http://wiki.emqbit.com/free-ecb-at91> 132 <http://wiki.emqbit.com/free-ecb-at91>
128 133
134config MACH_YL9200
135 bool "ucDragon YL-9200"
136 depends on ARCH_AT91RM9200
137 help
138 Select this if you are using the ucDragon YL-9200 board.
139
129endif 140endif
130 141
131# ---------------------------------------------------------- 142# ----------------------------------------------------------
@@ -164,6 +175,20 @@ config MACH_SAM9_L9260
164 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. 175 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
165 <http://www.olimex.com/dev/sam9-L9260.html> 176 <http://www.olimex.com/dev/sam9-L9260.html>
166 177
178config MACH_USB_A9260
179 bool "CALAO USB-A9260"
180 depends on ARCH_AT91SAM9260
181 help
182 Select this if you are using a Calao Systems USB-A9260.
183 <http://www.calao-systems.com>
184
185config MACH_QIL_A9260
186 bool "CALAO QIL-A9260 board"
187 depends on ARCH_AT91SAM9260
188 help
189 Select this if you are using a Calao Systems QIL-A9260 Board.
190 <http://www.calao-systems.com>
191
167endif 192endif
168 193
169# ---------------------------------------------------------- 194# ----------------------------------------------------------
@@ -194,6 +219,13 @@ config MACH_AT91SAM9263EK
194 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. 219 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
195 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> 220 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
196 221
222config MACH_USB_A9263
223 bool "CALAO USB-A9263"
224 depends on ARCH_AT91SAM9263
225 help
226 Select this if you are using a Calao Systems USB-A9263.
227 <http://www.calao-systems.com>
228
197endif 229endif
198 230
199# ---------------------------------------------------------- 231# ----------------------------------------------------------
@@ -212,6 +244,20 @@ endif
212 244
213# ---------------------------------------------------------- 245# ----------------------------------------------------------
214 246
247if ARCH_AT91SAM9G20
248
249comment "AT91SAM9G20 Board Type"
250
251config MACH_AT91SAM9G20EK
252 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
253 depends on ARCH_AT91SAM9G20
254 help
255 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit.
256
257endif
258
259# ----------------------------------------------------------
260
215if ARCH_AT91CAP9 261if ARCH_AT91CAP9
216 262
217comment "AT91CAP9 Board Type" 263comment "AT91CAP9 Board Type"
@@ -247,13 +293,13 @@ comment "AT91 Board Options"
247 293
248config MTD_AT91_DATAFLASH_CARD 294config MTD_AT91_DATAFLASH_CARD
249 bool "Enable DataFlash Card support" 295 bool "Enable DataFlash Card support"
250 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK || MACH_SAM9_L9260 || MACH_ECBAT91) 296 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK)
251 help 297 help
252 Enable support for the DataFlash card. 298 Enable support for the DataFlash card.
253 299
254config MTD_NAND_AT91_BUSWIDTH_16 300config MTD_NAND_AT91_BUSWIDTH_16
255 bool "Enable 16-bit data bus interface to NAND flash" 301 bool "Enable 16-bit data bus interface to NAND flash"
256 depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) 302 depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91CAP9ADK)
257 help 303 help
258 On AT91SAM926x boards both types of NAND flash can be present 304 On AT91SAM926x boards both types of NAND flash can be present
259 (8 and 16 bit data bus width). 305 (8 and 16 bit data bus width).
@@ -302,15 +348,15 @@ config AT91_EARLY_USART2
302 348
303config AT91_EARLY_USART3 349config AT91_EARLY_USART3
304 bool "USART3" 350 bool "USART3"
305 depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260) 351 depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
306 352
307config AT91_EARLY_USART4 353config AT91_EARLY_USART4
308 bool "USART4" 354 bool "USART4"
309 depends on ARCH_AT91SAM9260 355 depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20
310 356
311config AT91_EARLY_USART5 357config AT91_EARLY_USART5
312 bool "USART5" 358 bool "USART5"
313 depends on ARCH_AT91SAM9260 359 depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20
314 360
315endchoice 361endchoice
316 362
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 8d9bc0153b18..7d641f97516b 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_d
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o 16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o 17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
18obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
18obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o 19obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o
19obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 20obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
20 21
@@ -30,21 +31,28 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
30obj-$(CONFIG_MACH_KAFA) += board-kafa.o 31obj-$(CONFIG_MACH_KAFA) += board-kafa.o
31obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o 32obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
32obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o 33obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
34obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
33 35
34# AT91SAM9260 board-specific support 36# AT91SAM9260 board-specific support
35obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o 37obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
36obj-$(CONFIG_MACH_CAM60) += board-cam60.o 38obj-$(CONFIG_MACH_CAM60) += board-cam60.o
37obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o 39obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
40obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
41obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
38 42
39# AT91SAM9261 board-specific support 43# AT91SAM9261 board-specific support
40obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o 44obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
41 45
42# AT91SAM9263 board-specific support 46# AT91SAM9263 board-specific support
43obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o 47obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
48obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
44 49
45# AT91SAM9RL board-specific support 50# AT91SAM9RL board-specific support
46obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o 51obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
47 52
53# AT91SAM9G20 board-specific support
54obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
55
48# AT91CAP9 board-specific support 56# AT91CAP9 board-specific support
49obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o 57obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
50 58
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index be526746e01e..747b9dedab88 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -84,6 +84,105 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 84
85 85
86/* -------------------------------------------------------------------- 86/* --------------------------------------------------------------------
87 * USB HS Device (Gadget)
88 * -------------------------------------------------------------------- */
89
90#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
91
92static struct resource usba_udc_resources[] = {
93 [0] = {
94 .start = AT91CAP9_UDPHS_FIFO,
95 .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 .start = AT91CAP9_BASE_UDPHS,
100 .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
101 .flags = IORESOURCE_MEM,
102 },
103 [2] = {
104 .start = AT91CAP9_ID_UDPHS,
105 .end = AT91CAP9_ID_UDPHS,
106 .flags = IORESOURCE_IRQ,
107 },
108};
109
110#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
111 [idx] = { \
112 .name = nam, \
113 .index = idx, \
114 .fifo_size = maxpkt, \
115 .nr_banks = maxbk, \
116 .can_dma = dma, \
117 .can_isoc = isoc, \
118 }
119
120static struct usba_ep_data usba_udc_ep[] = {
121 EP("ep0", 0, 64, 1, 0, 0),
122 EP("ep1", 1, 1024, 3, 1, 1),
123 EP("ep2", 2, 1024, 3, 1, 1),
124 EP("ep3", 3, 1024, 2, 1, 1),
125 EP("ep4", 4, 1024, 2, 1, 1),
126 EP("ep5", 5, 1024, 2, 1, 0),
127 EP("ep6", 6, 1024, 2, 1, 0),
128 EP("ep7", 7, 1024, 2, 0, 0),
129};
130
131#undef EP
132
133/*
134 * pdata doesn't have room for any endpoints, so we need to
135 * append room for the ones we need right after it.
136 */
137static struct {
138 struct usba_platform_data pdata;
139 struct usba_ep_data ep[8];
140} usba_udc_data;
141
142static struct platform_device at91_usba_udc_device = {
143 .name = "atmel_usba_udc",
144 .id = -1,
145 .dev = {
146 .platform_data = &usba_udc_data.pdata,
147 },
148 .resource = usba_udc_resources,
149 .num_resources = ARRAY_SIZE(usba_udc_resources),
150};
151
152void __init at91_add_device_usba(struct usba_platform_data *data)
153{
154 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
155 AT91_MATRIX_UDPHS_BYPASS_LOCK);
156
157 /*
158 * Invalid pins are 0 on AT91, but the usba driver is shared
159 * with AVR32, which use negative values instead. Once/if
160 * gpio_is_valid() is ported to AT91, revisit this code.
161 */
162 usba_udc_data.pdata.vbus_pin = -EINVAL;
163 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
164 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
165
166 if (data && data->vbus_pin > 0) {
167 at91_set_gpio_input(data->vbus_pin, 0);
168 at91_set_deglitch(data->vbus_pin, 1);
169 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
170 }
171
172 /* Pullup pin is handled internally by USB device peripheral */
173
174 /* Clocks */
175 at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
176 at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
177
178 platform_device_register(&at91_usba_udc_device);
179}
180#else
181void __init at91_add_device_usba(struct usba_platform_data *data) {}
182#endif
183
184
185/* --------------------------------------------------------------------
87 * Ethernet 186 * Ethernet
88 * -------------------------------------------------------------------- */ 187 * -------------------------------------------------------------------- */
89 188
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index ee26550cdc21..380f12a12200 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -47,6 +47,20 @@ static struct map_desc at91sam9260_sram_desc[] __initdata = {
47 } 47 }
48}; 48};
49 49
50static struct map_desc at91sam9g20_sram_desc[] __initdata = {
51 {
52 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE,
53 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM0_BASE),
54 .length = AT91SAM9G20_SRAM0_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE - AT91SAM9G20_SRAM1_SIZE,
58 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM1_BASE),
59 .length = AT91SAM9G20_SRAM1_SIZE,
60 .type = MT_DEVICE,
61 }
62};
63
50static struct map_desc at91sam9xe_sram_desc[] __initdata = { 64static struct map_desc at91sam9xe_sram_desc[] __initdata = {
51 { 65 {
52 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE), 66 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
@@ -307,6 +321,8 @@ void __init at91sam9260_initialize(unsigned long main_clock)
307 321
308 if (cpu_is_at91sam9xe()) 322 if (cpu_is_at91sam9xe())
309 at91sam9xe_initialize(); 323 at91sam9xe_initialize();
324 else if (cpu_is_at91sam9g20())
325 iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc));
310 else 326 else
311 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); 327 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
312 328
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 393a32aefce5..86cba4ac29b1 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -18,6 +18,7 @@
18 18
19#include <asm/arch/board.h> 19#include <asm/arch/board.h>
20#include <asm/arch/gpio.h> 20#include <asm/arch/gpio.h>
21#include <asm/arch/cpu.h>
21#include <asm/arch/at91sam9260.h> 22#include <asm/arch/at91sam9260.h>
22#include <asm/arch/at91sam9260_matrix.h> 23#include <asm/arch/at91sam9260_matrix.h>
23#include <asm/arch/at91sam9_smc.h> 24#include <asm/arch/at91sam9_smc.h>
@@ -320,20 +321,41 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
320 csa = at91_sys_read(AT91_MATRIX_EBICSA); 321 csa = at91_sys_read(AT91_MATRIX_EBICSA);
321 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 322 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
322 323
323 /* set the bus interface characteristics */ 324 if (cpu_is_at91sam9260()) {
324 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) 325 /* Timing for sam9260 */
325 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); 326 /* set the bus interface characteristics */
327 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
328 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
326 329
327 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) 330 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
328 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); 331 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
329 332
330 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); 333 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
331 334
332 if (data->bus_width_16) 335 if (data->bus_width_16)
333 mode = AT91_SMC_DBW_16; 336 mode = AT91_SMC_DBW_16;
334 else 337 else
335 mode = AT91_SMC_DBW_8; 338 mode = AT91_SMC_DBW_8;
336 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2)); 339 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
340 }
341
342 if (cpu_is_at91sam9g20()) {
343 /* Timing for sam9g20 */
344 /* set the bus interface characteristics */
345 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
346 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
347
348 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
349 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
350
351 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
352
353 if (data->bus_width_16)
354 mode = AT91_SMC_DBW_16;
355 else
356 mode = AT91_SMC_DBW_8;
357 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
358 }
337 359
338 /* enable pin */ 360 /* enable pin */
339 if (data->enable_pin) 361 if (data->enable_pin)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 728bb8f39441..ec1891375dfb 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -232,19 +232,19 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
233 233
234 /* set the bus interface characteristics */ 234 /* set the bus interface characteristics */
235 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) 235 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
236 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); 236 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
237 237
238 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) 238 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
239 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); 239 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
240 240
241 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); 241 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
242 242
243 if (data->bus_width_16) 243 if (data->bus_width_16)
244 mode = AT91_SMC_DBW_16; 244 mode = AT91_SMC_DBW_16;
245 else 245 else
246 mode = AT91_SMC_DBW_8; 246 mode = AT91_SMC_DBW_8;
247 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); 247 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
248 248
249 /* enable pin */ 249 /* enable pin */
250 if (data->enable_pin) 250 if (data->enable_pin)
@@ -544,10 +544,10 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
544 struct resource *fb_res = &lcdc_resources[2]; 544 struct resource *fb_res = &lcdc_resources[2];
545 size_t fb_len = fb_res->end - fb_res->start + 1; 545 size_t fb_len = fb_res->end - fb_res->start + 1;
546 546
547 fb = ioremap_writecombine(fb_res->start, fb_len); 547 fb = ioremap(fb_res->start, fb_len);
548 if (fb) { 548 if (fb) {
549 memset(fb, 0, fb_len); 549 memset(fb, 0, fb_len);
550 iounmap(fb, fb_len); 550 iounmap(fb);
551 } 551 }
552 } 552 }
553 lcdc_data = *data; 553 lcdc_data = *data;
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 719667e25c98..8a81f76f0200 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -391,8 +391,8 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
392 392
393 /* set the bus interface characteristics */ 393 /* set the bus interface characteristics */
394 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) 394 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
395 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); 395 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
396 396
397 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) 397 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
398 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); 398 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 054689804e77..ae28101e7542 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -26,6 +26,101 @@
26 26
27 27
28/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
29 * USB HS Device (Gadget)
30 * -------------------------------------------------------------------- */
31
32#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
33
34static struct resource usba_udc_resources[] = {
35 [0] = {
36 .start = AT91SAM9RL_UDPHS_FIFO,
37 .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
38 .flags = IORESOURCE_MEM,
39 },
40 [1] = {
41 .start = AT91SAM9RL_BASE_UDPHS,
42 .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [2] = {
46 .start = AT91SAM9RL_ID_UDPHS,
47 .end = AT91SAM9RL_ID_UDPHS,
48 .flags = IORESOURCE_IRQ,
49 },
50};
51
52#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
53 [idx] = { \
54 .name = nam, \
55 .index = idx, \
56 .fifo_size = maxpkt, \
57 .nr_banks = maxbk, \
58 .can_dma = dma, \
59 .can_isoc = isoc, \
60 }
61
62static struct usba_ep_data usba_udc_ep[] __initdata = {
63 EP("ep0", 0, 64, 1, 0, 0),
64 EP("ep1", 1, 1024, 2, 1, 1),
65 EP("ep2", 2, 1024, 2, 1, 1),
66 EP("ep3", 3, 1024, 3, 1, 0),
67 EP("ep4", 4, 1024, 3, 1, 0),
68 EP("ep5", 5, 1024, 3, 1, 1),
69 EP("ep6", 6, 1024, 3, 1, 1),
70};
71
72#undef EP
73
74/*
75 * pdata doesn't have room for any endpoints, so we need to
76 * append room for the ones we need right after it.
77 */
78static struct {
79 struct usba_platform_data pdata;
80 struct usba_ep_data ep[7];
81} usba_udc_data;
82
83static struct platform_device at91_usba_udc_device = {
84 .name = "atmel_usba_udc",
85 .id = -1,
86 .dev = {
87 .platform_data = &usba_udc_data.pdata,
88 },
89 .resource = usba_udc_resources,
90 .num_resources = ARRAY_SIZE(usba_udc_resources),
91};
92
93void __init at91_add_device_usba(struct usba_platform_data *data)
94{
95 /*
96 * Invalid pins are 0 on AT91, but the usba driver is shared
97 * with AVR32, which use negative values instead. Once/if
98 * gpio_is_valid() is ported to AT91, revisit this code.
99 */
100 usba_udc_data.pdata.vbus_pin = -EINVAL;
101 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
102 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
103
104 if (data && data->vbus_pin > 0) {
105 at91_set_gpio_input(data->vbus_pin, 0);
106 at91_set_deglitch(data->vbus_pin, 1);
107 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
108 }
109
110 /* Pullup pin is handled internally by USB device peripheral */
111
112 /* Clocks */
113 at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
114 at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
115
116 platform_device_register(&at91_usba_udc_device);
117}
118#else
119void __init at91_add_device_usba(struct usba_platform_data *data) {}
120#endif
121
122
123/* --------------------------------------------------------------------
29 * MMC / SD 124 * MMC / SD
30 * -------------------------------------------------------------------- */ 125 * -------------------------------------------------------------------- */
31 126
@@ -138,15 +233,15 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
138 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
139 234
140 /* set the bus interface characteristics */ 235 /* set the bus interface characteristics */
141 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) 236 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
142 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); 237 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
143 238
144 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) 239 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
145 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); 240 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
146 241
147 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); 242 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
148 243
149 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); 244 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
150 245
151 /* enable pin */ 246 /* enable pin */
152 if (data->enable_pin) 247 if (data->enable_pin)
@@ -332,13 +427,6 @@ static struct resource lcdc_resources[] = {
332 .end = AT91SAM9RL_ID_LCDC, 427 .end = AT91SAM9RL_ID_LCDC,
333 .flags = IORESOURCE_IRQ, 428 .flags = IORESOURCE_IRQ,
334 }, 429 },
335#if defined(CONFIG_FB_INTSRAM)
336 [2] = {
337 .start = AT91SAM9RL_SRAM_BASE,
338 .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
339 .flags = IORESOURCE_MEM,
340 },
341#endif
342}; 430};
343 431
344static struct platform_device at91_lcdc_device = { 432static struct platform_device at91_lcdc_device = {
@@ -381,20 +469,6 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
381 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ 469 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
382 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ 470 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
383 471
384#ifdef CONFIG_FB_INTSRAM
385 {
386 void __iomem *fb;
387 struct resource *fb_res = &lcdc_resources[2];
388 size_t fb_len = fb_res->end - fb_res->start + 1;
389
390 fb = ioremap_writecombine(fb_res->start, fb_len);
391 if (fb) {
392 memset(fb, 0, fb_len);
393 iounmap(fb, fb_len);
394 }
395 }
396#endif
397
398 lcdc_data = *data; 472 lcdc_data = *data;
399 platform_device_register(&at91_lcdc_device); 473 platform_device_register(&at91_lcdc_device);
400} 474}
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 1de121fc55f4..f44647738ee4 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -16,16 +16,32 @@
16#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/arch/at91x40.h> 17#include <asm/arch/at91x40.h>
18#include <asm/arch/at91_st.h> 18#include <asm/arch/at91_st.h>
19#include <asm/arch/timex.h>
19#include "generic.h" 20#include "generic.h"
20 21
21/* 22/*
22 * This is used in the gpio code, stub locally. 23 * Export the clock functions for the AT91X40. Some external code common
24 * to all AT91 family parts relys on this, like the gpio and serial support.
23 */ 25 */
24int clk_enable(struct clk *clk) 26int clk_enable(struct clk *clk)
25{ 27{
26 return 0; 28 return 0;
27} 29}
28 30
31void clk_disable(struct clk *clk)
32{
33}
34
35unsigned long clk_get_rate(struct clk *clk)
36{
37 return AT91X40_MASTER_CLOCK;
38}
39
40struct clk *clk_get(struct device *dev, const char *id)
41{
42 return NULL;
43}
44
29void __init at91x40_initialize(unsigned long main_clock) 45void __init at91x40_initialize(unsigned long main_clock)
30{ 46{
31 at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) 47 at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index e5512d1ff217..8a2a958639db 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -78,6 +78,12 @@ static struct at91_usbh_data __initdata cap9adk_usbh_data = {
78 .ports = 2, 78 .ports = 2,
79}; 79};
80 80
81/*
82 * USB HS Device port
83 */
84static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
85 .vbus_pin = AT91_PIN_PB31,
86};
81 87
82/* 88/*
83 * ADS7846 Touchscreen 89 * ADS7846 Touchscreen
@@ -326,6 +332,9 @@ static void __init cap9adk_board_init(void)
326 /* USB Host */ 332 /* USB Host */
327 set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH); 333 set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
328 at91_add_device_usbh(&cap9adk_usbh_data); 334 at91_add_device_usbh(&cap9adk_usbh_data);
335 /* USB HS */
336 set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
337 at91_add_device_usba(&cap9adk_usba_udc_data);
329 /* SPI */ 338 /* SPI */
330 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); 339 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
331 /* Touchscreen */ 340 /* Touchscreen */
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 0f0878294a67..9854fc3dd1f2 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -40,24 +40,21 @@
40#include "generic.h" 40#include "generic.h"
41 41
42 42
43/*
44 * Serial port configuration.
45 * 0 .. 3 = USART0 .. USART3
46 * 4 = DBGU
47 */
48static struct at91_uart_config __initdata carmeva_uart_config = {
49 .console_tty = 0, /* ttyS0 */
50 .nr_tty = 2,
51 .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
52};
53
54static void __init carmeva_map_io(void) 43static void __init carmeva_map_io(void)
55{ 44{
56 /* Initialize processor: 20.000 MHz crystal */ 45 /* Initialize processor: 20.000 MHz crystal */
57 at91rm9200_initialize(20000000, AT91RM9200_BGA); 46 at91rm9200_initialize(20000000, AT91RM9200_BGA);
58 47
59 /* Setup the serial ports and console */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
60 at91_init_serial(&carmeva_uart_config); 49 at91_register_uart(0, 0, 0);
50
51 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
52 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
53 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
54 | ATMEL_UART_RI);
55
56 /* set serial console to ttyS0 (ie, DBGU) */
57 at91_set_serial_console(0);
61} 58}
62 59
63static void __init carmeva_init_irq(void) 60static void __init carmeva_init_irq(void)
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 419fd19b620b..bb1a5474ddab 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -45,10 +45,10 @@ static void __init csb637_map_io(void)
45 /* Initialize processor: 3.6864 MHz crystal */ 45 /* Initialize processor: 3.6864 MHz crystal */
46 at91rm9200_initialize(3686400, AT91RM9200_BGA); 46 at91rm9200_initialize(3686400, AT91RM9200_BGA);
47 47
48 /* DBGU on ttyS0 */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
49 at91_register_uart(0, 0, 0); 49 at91_register_uart(0, 0, 0);
50 50
51 /* make console=ttyS0 the default */ 51 /* make console=ttyS0 (ie, DBGU) the default */
52 at91_set_serial_console(0); 52 at91_set_serial_console(0);
53} 53}
54 54
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c
index c1a813c7169b..dab958d25926 100644
--- a/arch/arm/mach-at91/board-dk.c
+++ b/arch/arm/mach-at91/board-dk.c
@@ -45,17 +45,6 @@
45#include "generic.h" 45#include "generic.h"
46 46
47 47
48/*
49 * Serial port configuration.
50 * 0 .. 3 = USART0 .. USART3
51 * 4 = DBGU
52 */
53static struct at91_uart_config __initdata dk_uart_config = {
54 .console_tty = 0, /* ttyS0 */
55 .nr_tty = 2,
56 .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
57};
58
59static void __init dk_map_io(void) 48static void __init dk_map_io(void)
60{ 49{
61 /* Initialize processor: 18.432 MHz crystal */ 50 /* Initialize processor: 18.432 MHz crystal */
@@ -64,8 +53,16 @@ static void __init dk_map_io(void)
64 /* Setup the LEDs */ 53 /* Setup the LEDs */
65 at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); 54 at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
66 55
67 /* Setup the serial ports and console */ 56 /* DBGU on ttyS0. (Rx & Tx only) */
68 at91_init_serial(&dk_uart_config); 57 at91_register_uart(0, 0, 0);
58
59 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
60 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
61 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
62 | ATMEL_UART_RI);
63
64 /* set serial console to ttyS0 (ie, DBGU) */
65 at91_set_serial_console(0);
69} 66}
70 67
71static void __init dk_init_irq(void) 68static void __init dk_init_irq(void)
@@ -163,7 +160,7 @@ static struct at91_nand_data __initdata dk_nand_data = {
163#define DK_FLASH_SIZE 0x200000 160#define DK_FLASH_SIZE 0x200000
164 161
165static struct physmap_flash_data dk_flash_data = { 162static struct physmap_flash_data dk_flash_data = {
166 .width = 2, 163 .width = 2,
167}; 164};
168 165
169static struct resource dk_flash_resource = { 166static struct resource dk_flash_resource = {
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index af1a1d8ecc30..3fe054e0056b 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -40,24 +40,24 @@
40#include "generic.h" 40#include "generic.h"
41 41
42 42
43/*
44 * Serial port configuration.
45 * 0 .. 3 = USART0 .. USART3
46 * 4 = DBGU
47 */
48static struct at91_uart_config __initdata eb9200_uart_config = {
49 .console_tty = 0, /* ttyS0 */
50 .nr_tty = 2,
51 .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
52};
53
54static void __init eb9200_map_io(void) 43static void __init eb9200_map_io(void)
55{ 44{
56 /* Initialize processor: 18.432 MHz crystal */ 45 /* Initialize processor: 18.432 MHz crystal */
57 at91rm9200_initialize(18432000, AT91RM9200_BGA); 46 at91rm9200_initialize(18432000, AT91RM9200_BGA);
58 47
59 /* Setup the serial ports and console */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
60 at91_init_serial(&eb9200_uart_config); 49 at91_register_uart(0, 0, 0);
50
51 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
52 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
53 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
54 | ATMEL_UART_RI);
55
56 /* USART2 on ttyS2. (Rx, Tx) - IRDA */
57 at91_register_uart(AT91RM9200_ID_US2, 2, 0);
58
59 /* set serial console to ttyS0 (ie, DBGU) */
60 at91_set_serial_console(0);
61} 61}
62 62
63static void __init eb9200_init_irq(void) 63static void __init eb9200_init_irq(void)
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c
index 0574e50a30dd..74aa4325eab3 100644
--- a/arch/arm/mach-at91/board-ek.c
+++ b/arch/arm/mach-at91/board-ek.c
@@ -45,17 +45,6 @@
45#include "generic.h" 45#include "generic.h"
46 46
47 47
48/*
49 * Serial port configuration.
50 * 0 .. 3 = USART0 .. USART3
51 * 4 = DBGU
52 */
53static struct at91_uart_config __initdata ek_uart_config = {
54 .console_tty = 0, /* ttyS0 */
55 .nr_tty = 2,
56 .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
57};
58
59static void __init ek_map_io(void) 48static void __init ek_map_io(void)
60{ 49{
61 /* Initialize processor: 18.432 MHz crystal */ 50 /* Initialize processor: 18.432 MHz crystal */
@@ -64,8 +53,16 @@ static void __init ek_map_io(void)
64 /* Setup the LEDs */ 53 /* Setup the LEDs */
65 at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); 54 at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
66 55
67 /* Setup the serial ports and console */ 56 /* DBGU on ttyS0. (Rx & Tx only) */
68 at91_init_serial(&ek_uart_config); 57 at91_register_uart(0, 0, 0);
58
59 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
60 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
61 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
62 | ATMEL_UART_RI);
63
64 /* set serial console to ttyS0 (ie, DBGU) */
65 at91_set_serial_console(0);
69} 66}
70 67
71static void __init ek_init_irq(void) 68static void __init ek_init_irq(void)
@@ -122,7 +119,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
122#define EK_FLASH_SIZE 0x200000 119#define EK_FLASH_SIZE 0x200000
123 120
124static struct physmap_flash_data ek_flash_data = { 121static struct physmap_flash_data ek_flash_data = {
125 .width = 2, 122 .width = 2,
126}; 123};
127 124
128static struct resource ek_flash_resource = { 125static struct resource ek_flash_resource = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index 4b39b9cda75b..cb065febd95e 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -37,19 +37,10 @@
37#include <asm/arch/board.h> 37#include <asm/arch/board.h>
38#include <asm/arch/gpio.h> 38#include <asm/arch/gpio.h>
39 39
40#include "generic.h" 40#include <asm/arch/at91rm9200_mc.h>
41 41
42#include "generic.h"
42 43
43/*
44 * Serial port configuration.
45 * 0 .. 3 = USART0 .. USART3
46 * 4 = DBGU
47 */
48static struct at91_uart_config __initdata kb9202_uart_config = {
49 .console_tty = 0, /* ttyS0 */
50 .nr_tty = 3,
51 .tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */
52};
53 44
54static void __init kb9202_map_io(void) 45static void __init kb9202_map_io(void)
55{ 46{
@@ -59,8 +50,20 @@ static void __init kb9202_map_io(void)
59 /* Set up the LEDs */ 50 /* Set up the LEDs */
60 at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); 51 at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
61 52
62 /* Setup the serial ports and console */ 53 /* DBGU on ttyS0. (Rx & Tx only) */
63 at91_init_serial(&kb9202_uart_config); 54 at91_register_uart(0, 0, 0);
55
56 /* USART0 on ttyS1 (Rx & Tx only) */
57 at91_register_uart(AT91RM9200_ID_US0, 1, 0);
58
59 /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
60 at91_register_uart(AT91RM9200_ID_US1, 2, 0);
61
62 /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
63 at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
64
65 /* set serial console to ttyS0 (ie, DBGU) */
66 at91_set_serial_console(0);
64} 67}
65 68
66static void __init kb9202_init_irq(void) 69static void __init kb9202_init_irq(void)
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
new file mode 100644
index 000000000000..99b4ec3818d6
--- /dev/null
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -0,0 +1,255 @@
1/*
2 * linux/arch/arm/mach-at91/board-qil-a9260.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2007 Calao-systems
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/gpio_keys.h>
30#include <linux/input.h>
31#include <linux/clk.h>
32
33#include <asm/hardware.h>
34#include <asm/setup.h>
35#include <asm/mach-types.h>
36#include <asm/irq.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41
42#include <asm/arch/board.h>
43#include <asm/arch/gpio.h>
44#include <asm/arch/at91_shdwc.h>
45
46#include "generic.h"
47
48
49static void __init ek_map_io(void)
50{
51 /* Initialize processor: 12.000 MHz crystal */
52 at91sam9260_initialize(12000000);
53
54 /* DGBU on ttyS0. (Rx & Tx only) */
55 at91_register_uart(0, 0, 0);
56
57 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
58 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
59 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
60 | ATMEL_UART_RI);
61
62 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
63 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
64
65 /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
66 at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
67
68 /* set serial console to ttyS1 (ie, USART0) */
69 at91_set_serial_console(1);
70
71}
72
73static void __init ek_init_irq(void)
74{
75 at91sam9260_init_interrupts(NULL);
76}
77
78
79/*
80 * USB Host port
81 */
82static struct at91_usbh_data __initdata ek_usbh_data = {
83 .ports = 2,
84};
85
86/*
87 * USB Device port
88 */
89static struct at91_udc_data __initdata ek_udc_data = {
90 .vbus_pin = AT91_PIN_PC5,
91 .pullup_pin = 0, /* pull-up driven by UDC */
92};
93
94/*
95 * SPI devices.
96 */
97static struct spi_board_info ek_spi_devices[] = {
98#if defined(CONFIG_RTC_DRV_M41T94)
99 { /* M41T94 RTC */
100 .modalias = "m41t94",
101 .chip_select = 0,
102 .max_speed_hz = 1 * 1000 * 1000,
103 .bus_num = 0,
104 }
105#endif
106};
107
108/*
109 * MACB Ethernet device
110 */
111static struct at91_eth_data __initdata ek_macb_data = {
112 .phy_irq_pin = AT91_PIN_PA31,
113 .is_rmii = 1,
114};
115
116/*
117 * NAND flash
118 */
119static struct mtd_partition __initdata ek_nand_partition[] = {
120 {
121 .name = "Uboot & Kernel",
122 .offset = 0x00000000,
123 .size = 16 * 1024 * 1024,
124 },
125 {
126 .name = "Root FS",
127 .offset = 0x01000000,
128 .size = 120 * 1024 * 1024,
129 },
130 {
131 .name = "FS",
132 .offset = 0x08800000,
133 .size = 120 * 1024 * 1024,
134 },
135};
136
137static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
138{
139 *num_partitions = ARRAY_SIZE(ek_nand_partition);
140 return ek_nand_partition;
141}
142
143static struct at91_nand_data __initdata ek_nand_data = {
144 .ale = 21,
145 .cle = 22,
146// .det_pin = ... not connected
147 .rdy_pin = AT91_PIN_PC13,
148 .enable_pin = AT91_PIN_PC14,
149 .partition_info = nand_partitions,
150#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
151 .bus_width_16 = 1,
152#else
153 .bus_width_16 = 0,
154#endif
155};
156
157/*
158 * MCI (SD/MMC)
159 */
160static struct at91_mmc_data __initdata ek_mmc_data = {
161 .slot_b = 0,
162 .wire4 = 1,
163// .det_pin = ... not connected
164// .wp_pin = ... not connected
165// .vcc_pin = ... not connected
166};
167
168/*
169 * GPIO Buttons
170 */
171#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
172static struct gpio_keys_button ek_buttons[] = {
173 { /* USER PUSH BUTTON */
174 .code = KEY_ENTER,
175 .gpio = AT91_PIN_PB10,
176 .active_low = 1,
177 .desc = "user_pb",
178 .wakeup = 1,
179 }
180};
181
182static struct gpio_keys_platform_data ek_button_data = {
183 .buttons = ek_buttons,
184 .nbuttons = ARRAY_SIZE(ek_buttons),
185};
186
187static struct platform_device ek_button_device = {
188 .name = "gpio-keys",
189 .id = -1,
190 .num_resources = 0,
191 .dev = {
192 .platform_data = &ek_button_data,
193 }
194};
195
196static void __init ek_add_device_buttons(void)
197{
198 at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
199 at91_set_deglitch(AT91_PIN_PB10, 1);
200
201 platform_device_register(&ek_button_device);
202}
203#else
204static void __init ek_add_device_buttons(void) {}
205#endif
206
207/*
208 * LEDs
209 */
210static struct gpio_led ek_leds[] = {
211 { /* user_led (green) */
212 .name = "user_led",
213 .gpio = AT91_PIN_PB21,
214 .active_low = 0,
215 .default_trigger = "heartbeat",
216 }
217};
218
219static void __init ek_board_init(void)
220{
221 /* Serial */
222 at91_add_device_serial();
223 /* USB Host */
224 at91_add_device_usbh(&ek_usbh_data);
225 /* USB Device */
226 at91_add_device_udc(&ek_udc_data);
227 /* SPI */
228 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
229 /* NAND */
230 at91_add_device_nand(&ek_nand_data);
231 /* I2C */
232 at91_add_device_i2c(NULL, 0);
233 /* Ethernet */
234 at91_add_device_eth(&ek_macb_data);
235 /* MMC */
236 at91_add_device_mmc(0, &ek_mmc_data);
237 /* Push Buttons */
238 ek_add_device_buttons();
239 /* LEDs */
240 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
241 /* shutdown controller, wakeup button (5 msec low) */
242 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
243 | AT91_SHDW_RTTWKEN);
244}
245
246MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
247 /* Maintainer: calao-systems */
248 .phys_io = AT91_BASE_SYS,
249 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
250 .boot_params = AT91_SDRAM_BASE + 0x100,
251 .timer = &at91sam926x_timer,
252 .map_io = ek_map_io,
253 .init_irq = ek_init_irq,
254 .init_machine = ek_board_init,
255MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
new file mode 100644
index 000000000000..45617c201240
--- /dev/null
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -0,0 +1,218 @@
1/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2008 Atmel
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/spi/spi.h>
26#include <linux/spi/at73c213.h>
27#include <linux/clk.h>
28
29#include <asm/hardware.h>
30#include <asm/setup.h>
31#include <asm/mach-types.h>
32#include <asm/irq.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/irq.h>
37
38#include <asm/arch/board.h>
39#include <asm/arch/gpio.h>
40
41#include "generic.h"
42
43
44static void __init ek_map_io(void)
45{
46 /* Initialize processor: 18.432 MHz crystal */
47 at91sam9260_initialize(18432000);
48
49 /* DGBU on ttyS0. (Rx & Tx only) */
50 at91_register_uart(0, 0, 0);
51
52 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
53 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
54 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
55 | ATMEL_UART_RI);
56
57 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
58 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
59
60 /* set serial console to ttyS0 (ie, DBGU) */
61 at91_set_serial_console(0);
62}
63
64static void __init ek_init_irq(void)
65{
66 at91sam9260_init_interrupts(NULL);
67}
68
69
70/*
71 * USB Host port
72 */
73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2,
75};
76
77/*
78 * USB Device port
79 */
80static struct at91_udc_data __initdata ek_udc_data = {
81 .vbus_pin = AT91_PIN_PC5,
82 .pullup_pin = 0, /* pull-up driven by UDC */
83};
84
85
86/*
87 * SPI devices.
88 */
89static struct spi_board_info ek_spi_devices[] = {
90#if !defined(CONFIG_MMC_AT91)
91 { /* DataFlash chip */
92 .modalias = "mtd_dataflash",
93 .chip_select = 1,
94 .max_speed_hz = 15 * 1000 * 1000,
95 .bus_num = 0,
96 },
97#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
98 { /* DataFlash card */
99 .modalias = "mtd_dataflash",
100 .chip_select = 0,
101 .max_speed_hz = 15 * 1000 * 1000,
102 .bus_num = 0,
103 },
104#endif
105#endif
106};
107
108
109/*
110 * MACB Ethernet device
111 */
112static struct at91_eth_data __initdata ek_macb_data = {
113 .phy_irq_pin = AT91_PIN_PA7,
114 .is_rmii = 1,
115};
116
117
118/*
119 * NAND flash
120 */
121static struct mtd_partition __initdata ek_nand_partition[] = {
122 {
123 .name = "Bootstrap",
124 .offset = 0,
125 .size = 4 * 1024 * 1024,
126 },
127 {
128 .name = "Partition 1",
129 .offset = 4 * 1024 * 1024,
130 .size = 60 * 1024 * 1024,
131 },
132 {
133 .name = "Partition 2",
134 .offset = 64 * 1024 * 1024,
135 .size = MTDPART_SIZ_FULL,
136 },
137};
138
139static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
140{
141 *num_partitions = ARRAY_SIZE(ek_nand_partition);
142 return ek_nand_partition;
143}
144
145/* det_pin is not connected */
146static struct at91_nand_data __initdata ek_nand_data = {
147 .ale = 21,
148 .cle = 22,
149 .rdy_pin = AT91_PIN_PC13,
150 .enable_pin = AT91_PIN_PC14,
151 .partition_info = nand_partitions,
152#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
153 .bus_width_16 = 1,
154#else
155 .bus_width_16 = 0,
156#endif
157};
158
159
160/*
161 * MCI (SD/MMC)
162 * det_pin, wp_pin and vcc_pin are not connected
163 */
164static struct at91_mmc_data __initdata ek_mmc_data = {
165 .slot_b = 1,
166 .wire4 = 1,
167};
168
169
170/*
171 * LEDs
172 */
173static struct gpio_led ek_leds[] = {
174 { /* "bottom" led, green, userled1 to be defined */
175 .name = "ds5",
176 .gpio = AT91_PIN_PA6,
177 .active_low = 1,
178 .default_trigger = "none",
179 },
180 { /* "power" led, yellow */
181 .name = "ds1",
182 .gpio = AT91_PIN_PA9,
183 .default_trigger = "heartbeat",
184 }
185};
186
187static void __init ek_board_init(void)
188{
189 /* Serial */
190 at91_add_device_serial();
191 /* USB Host */
192 at91_add_device_usbh(&ek_usbh_data);
193 /* USB Device */
194 at91_add_device_udc(&ek_udc_data);
195 /* SPI */
196 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
197 /* NAND */
198 at91_add_device_nand(&ek_nand_data);
199 /* Ethernet */
200 at91_add_device_eth(&ek_macb_data);
201 /* MMC */
202 at91_add_device_mmc(0, &ek_mmc_data);
203 /* I2C */
204 at91_add_device_i2c(NULL, 0);
205 /* LEDs */
206 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
207}
208
209MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
210 /* Maintainer: Atmel */
211 .phys_io = AT91_BASE_SYS,
212 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
213 .boot_params = AT91_SDRAM_BASE + 0x100,
214 .timer = &at91sam926x_timer,
215 .map_io = ek_map_io,
216 .init_irq = ek_init_irq,
217 .init_machine = ek_board_init,
218MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index ffc0597aee8d..b6a70fc735c3 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -56,6 +56,14 @@ static void __init ek_init_irq(void)
56 56
57 57
58/* 58/*
59 * USB HS Device port
60 */
61static struct usba_platform_data __initdata ek_usba_udc_data = {
62 .vbus_pin = AT91_PIN_PA8,
63};
64
65
66/*
59 * MCI (SD/MMC) 67 * MCI (SD/MMC)
60 */ 68 */
61static struct at91_mmc_data __initdata ek_mmc_data = { 69static struct at91_mmc_data __initdata ek_mmc_data = {
@@ -175,6 +183,8 @@ static void __init ek_board_init(void)
175{ 183{
176 /* Serial */ 184 /* Serial */
177 at91_add_device_serial(); 185 at91_add_device_serial();
186 /* USB HS */
187 at91_add_device_usba(&ek_usba_udc_data);
178 /* I2C */ 188 /* I2C */
179 at91_add_device_i2c(NULL, 0); 189 at91_add_device_i2c(NULL, 0);
180 /* NAND */ 190 /* NAND */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
new file mode 100644
index 000000000000..837aedf8ffeb
--- /dev/null
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -0,0 +1,215 @@
1/*
2 * linux/arch/arm/mach-at91/board-usb-a9260.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2007 Calao-systems
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/gpio_keys.h>
30#include <linux/input.h>
31#include <linux/clk.h>
32
33#include <asm/hardware.h>
34#include <asm/setup.h>
35#include <asm/mach-types.h>
36#include <asm/irq.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41
42#include <asm/arch/board.h>
43#include <asm/arch/gpio.h>
44#include <asm/arch/at91_shdwc.h>
45
46#include "generic.h"
47
48
49static void __init ek_map_io(void)
50{
51 /* Initialize processor: 12.000 MHz crystal */
52 at91sam9260_initialize(12000000);
53
54 /* DGBU on ttyS0. (Rx & Tx only) */
55 at91_register_uart(0, 0, 0);
56
57 /* set serial console to ttyS0 (ie, DBGU) */
58 at91_set_serial_console(0);
59}
60
61static void __init ek_init_irq(void)
62{
63 at91sam9260_init_interrupts(NULL);
64}
65
66
67/*
68 * USB Host port
69 */
70static struct at91_usbh_data __initdata ek_usbh_data = {
71 .ports = 2,
72};
73
74/*
75 * USB Device port
76 */
77static struct at91_udc_data __initdata ek_udc_data = {
78 .vbus_pin = AT91_PIN_PC5,
79 .pullup_pin = 0, /* pull-up driven by UDC */
80};
81
82/*
83 * MACB Ethernet device
84 */
85static struct at91_eth_data __initdata ek_macb_data = {
86 .phy_irq_pin = AT91_PIN_PA31,
87 .is_rmii = 1,
88};
89
90/*
91 * NAND flash
92 */
93static struct mtd_partition __initdata ek_nand_partition[] = {
94 {
95 .name = "Uboot & Kernel",
96 .offset = 0x00000000,
97 .size = 16 * 1024 * 1024,
98 },
99 {
100 .name = "Root FS",
101 .offset = 0x01000000,
102 .size = 120 * 1024 * 1024,
103 },
104 {
105 .name = "FS",
106 .offset = 0x08800000,
107 .size = 120 * 1024 * 1024,
108 }
109};
110
111static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
112{
113 *num_partitions = ARRAY_SIZE(ek_nand_partition);
114 return ek_nand_partition;
115}
116
117static struct at91_nand_data __initdata ek_nand_data = {
118 .ale = 21,
119 .cle = 22,
120// .det_pin = ... not connected
121 .rdy_pin = AT91_PIN_PC13,
122 .enable_pin = AT91_PIN_PC14,
123 .partition_info = nand_partitions,
124#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
125 .bus_width_16 = 1,
126#else
127 .bus_width_16 = 0,
128#endif
129};
130
131/*
132 * GPIO Buttons
133 */
134
135#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
136static struct gpio_keys_button ek_buttons[] = {
137 { /* USER PUSH BUTTON */
138 .code = KEY_ENTER,
139 .gpio = AT91_PIN_PB10,
140 .active_low = 1,
141 .desc = "user_pb",
142 .wakeup = 1,
143 }
144};
145
146static struct gpio_keys_platform_data ek_button_data = {
147 .buttons = ek_buttons,
148 .nbuttons = ARRAY_SIZE(ek_buttons),
149};
150
151static struct platform_device ek_button_device = {
152 .name = "gpio-keys",
153 .id = -1,
154 .num_resources = 0,
155 .dev = {
156 .platform_data = &ek_button_data,
157 }
158};
159
160static void __init ek_add_device_buttons(void)
161{
162 at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
163 at91_set_deglitch(AT91_PIN_PB10, 1);
164
165 platform_device_register(&ek_button_device);
166}
167#else
168static void __init ek_add_device_buttons(void) {}
169#endif
170
171/*
172 * LEDs
173 */
174static struct gpio_led ek_leds[] = {
175 { /* user_led (green) */
176 .name = "user_led",
177 .gpio = AT91_PIN_PB21,
178 .active_low = 0,
179 .default_trigger = "heartbeat",
180 }
181};
182
183static void __init ek_board_init(void)
184{
185 /* Serial */
186 at91_add_device_serial();
187 /* USB Host */
188 at91_add_device_usbh(&ek_usbh_data);
189 /* USB Device */
190 at91_add_device_udc(&ek_udc_data);
191 /* NAND */
192 at91_add_device_nand(&ek_nand_data);
193 /* I2C */
194 at91_add_device_i2c(NULL, 0);
195 /* Ethernet */
196 at91_add_device_eth(&ek_macb_data);
197 /* Push Buttons */
198 ek_add_device_buttons();
199 /* LEDs */
200 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
201 /* shutdown controller, wakeup button (5 msec low) */
202 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
203 | AT91_SHDW_RTTWKEN);
204}
205
206MACHINE_START(USB_A9260, "CALAO USB_A9260")
207 /* Maintainer: calao-systems */
208 .phys_io = AT91_BASE_SYS,
209 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
210 .boot_params = AT91_SDRAM_BASE + 0x100,
211 .timer = &at91sam926x_timer,
212 .map_io = ek_map_io,
213 .init_irq = ek_init_irq,
214 .init_machine = ek_board_init,
215MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
new file mode 100644
index 000000000000..95800d32bd49
--- /dev/null
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -0,0 +1,230 @@
1/*
2 * linux/arch/arm/mach-at91/board-usb-a9263.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation.
6 * Copyright (C) 2007 Calao-systems
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/gpio_keys.h>
30#include <linux/input.h>
31
32#include <asm/hardware.h>
33#include <asm/setup.h>
34#include <asm/mach-types.h>
35#include <asm/irq.h>
36
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/irq.h>
40
41#include <asm/arch/board.h>
42#include <asm/arch/gpio.h>
43#include <asm/arch/at91_shdwc.h>
44
45#include "generic.h"
46
47
48static void __init ek_map_io(void)
49{
50 /* Initialize processor: 12.00 MHz crystal */
51 at91sam9263_initialize(12000000);
52
53 /* DGBU on ttyS0. (Rx & Tx only) */
54 at91_register_uart(0, 0, 0);
55
56 /* set serial console to ttyS0 (ie, DBGU) */
57 at91_set_serial_console(0);
58}
59
60static void __init ek_init_irq(void)
61{
62 at91sam9263_init_interrupts(NULL);
63}
64
65
66/*
67 * USB Host port
68 */
69static struct at91_usbh_data __initdata ek_usbh_data = {
70 .ports = 2,
71};
72
73/*
74 * USB Device port
75 */
76static struct at91_udc_data __initdata ek_udc_data = {
77 .vbus_pin = AT91_PIN_PB11,
78 .pullup_pin = 0, /* pull-up driven by UDC */
79};
80
81/*
82 * SPI devices.
83 */
84static struct spi_board_info ek_spi_devices[] = {
85#if !defined(CONFIG_MMC_AT91)
86 { /* DataFlash chip */
87 .modalias = "mtd_dataflash",
88 .chip_select = 0,
89 .max_speed_hz = 15 * 1000 * 1000,
90 .bus_num = 0,
91 }
92#endif
93};
94
95/*
96 * MACB Ethernet device
97 */
98static struct at91_eth_data __initdata ek_macb_data = {
99 .phy_irq_pin = AT91_PIN_PE31,
100 .is_rmii = 1,
101};
102
103/*
104 * NAND flash
105 */
106static struct mtd_partition __initdata ek_nand_partition[] = {
107 {
108 .name = "Linux Kernel",
109 .offset = 0x00000000,
110 .size = 16 * 1024 * 1024,
111 },
112 {
113 .name = "Root FS",
114 .offset = 0x01000000,
115 .size = 120 * 1024 * 1024,
116 },
117 {
118 .name = "FS",
119 .offset = 0x08800000,
120 .size = 120 * 1024 * 1024,
121 }
122};
123
124static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
125{
126 *num_partitions = ARRAY_SIZE(ek_nand_partition);
127 return ek_nand_partition;
128}
129
130static struct at91_nand_data __initdata ek_nand_data = {
131 .ale = 21,
132 .cle = 22,
133// .det_pin = ... not connected
134 .rdy_pin = AT91_PIN_PA22,
135 .enable_pin = AT91_PIN_PD15,
136 .partition_info = nand_partitions,
137#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
138 .bus_width_16 = 1,
139#else
140 .bus_width_16 = 0,
141#endif
142};
143
144/*
145 * GPIO Buttons
146 */
147#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
148static struct gpio_keys_button ek_buttons[] = {
149 { /* USER PUSH BUTTON */
150 .code = KEY_ENTER,
151 .gpio = AT91_PIN_PB10,
152 .active_low = 1,
153 .desc = "user_pb",
154 .wakeup = 1,
155 }
156};
157
158static struct gpio_keys_platform_data ek_button_data = {
159 .buttons = ek_buttons,
160 .nbuttons = ARRAY_SIZE(ek_buttons),
161};
162
163static struct platform_device ek_button_device = {
164 .name = "gpio-keys",
165 .id = -1,
166 .num_resources = 0,
167 .dev = {
168 .platform_data = &ek_button_data,
169 }
170};
171
172static void __init ek_add_device_buttons(void)
173{
174 at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
175 at91_set_deglitch(AT91_PIN_PB10, 1);
176
177 platform_device_register(&ek_button_device);
178}
179#else
180static void __init ek_add_device_buttons(void) {}
181#endif
182
183/*
184 * LEDs
185 */
186static struct gpio_led ek_leds[] = {
187 { /* user_led (green) */
188 .name = "user_led",
189 .gpio = AT91_PIN_PB21,
190 .active_low = 1,
191 .default_trigger = "heartbeat",
192 }
193};
194
195
196static void __init ek_board_init(void)
197{
198 /* Serial */
199 at91_add_device_serial();
200 /* USB Host */
201 at91_add_device_usbh(&ek_usbh_data);
202 /* USB Device */
203 at91_add_device_udc(&ek_udc_data);
204 /* SPI */
205 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
206 /* Ethernet */
207 at91_add_device_eth(&ek_macb_data);
208 /* NAND */
209 at91_add_device_nand(&ek_nand_data);
210 /* I2C */
211 at91_add_device_i2c(NULL, 0);
212 /* Push Buttons */
213 ek_add_device_buttons();
214 /* LEDs */
215 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
216 /* shutdown controller, wakeup button (5 msec low) */
217 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
218 | AT91_SHDW_RTTWKEN);
219}
220
221MACHINE_START(USB_A9263, "CALAO USB_A9263")
222 /* Maintainer: calao-systems */
223 .phys_io = AT91_BASE_SYS,
224 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
225 .boot_params = AT91_SDRAM_BASE + 0x100,
226 .timer = &at91sam926x_timer,
227 .map_io = ek_map_io,
228 .init_irq = ek_init_irq,
229 .init_machine = ek_board_init,
230MACHINE_END
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index b5717108991d..7079050ab88d 100755
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * linux/arch/arm/mach-at91/board-yl-9200.c 2 * linux/arch/arm/mach-at91/board-yl-9200.c
3 * 3 *
4 * Adapted from: 4 * Adapted from various board files in arch/arm/mach-at91
5 *various board files in 5 *
6 * /arch/arm/mach-at91 6 * Modifications for YL-9200 platform:
7 * modifications to convert to YL-9200 platform 7 * Copyright (C) 2007 S. Birtles
8 * Copyright (C) 2007 S.Birtles
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -26,13 +25,14 @@
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/mm.h> 26#include <linux/mm.h>
28#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/dma-mapping.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/spi/spi.h> 30#include <linux/spi/spi.h>
31/*#include <linux/can_bus/candata.h>*/
32#include <linux/spi/ads7846.h> 31#include <linux/spi/ads7846.h>
33#include <linux/mtd/physmap.h> 32#include <linux/mtd/physmap.h>
33#include <linux/gpio_keys.h>
34#include <linux/input.h>
34 35
35/*#include <sound/gpio_sounder.h>*/
36#include <asm/hardware.h> 36#include <asm/hardware.h>
37#include <asm/setup.h> 37#include <asm/setup.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
@@ -45,179 +45,108 @@
45#include <asm/arch/board.h> 45#include <asm/arch/board.h>
46#include <asm/arch/gpio.h> 46#include <asm/arch/gpio.h>
47#include <asm/arch/at91rm9200_mc.h> 47#include <asm/arch/at91rm9200_mc.h>
48#include <linux/gpio_keys.h>
49#include <linux/input.h>
50 48
51#include "generic.h" 49#include "generic.h"
52#include <asm/arch/at91_pio.h>
53 50
54#define YL_9200_FLASH_BASE AT91_CHIPSELECT_0
55#define YL_9200_FLASH_SIZE 0x800000
56 51
57/* 52static void __init yl9200_map_io(void)
58 * Serial port configuration. 53{
59 * 0 .. 3 = USART0 .. USART3 54 /* Initialize processor: 18.432 MHz crystal */
60 * 4 = DBGU 55 at91rm9200_initialize(18432000, AT91RM9200_PQFP);
61 *atmel_usart.0: ttyS0 at MMIO 0xfefff200 (irq = 1) is a ATMEL_SERIAL
62 *atmel_usart.1: ttyS1 at MMIO 0xfffc0000 (irq = 6) is a ATMEL_SERIAL
63 *atmel_usart.2: ttyS2 at MMIO 0xfffc4000 (irq = 7) is a ATMEL_SERIAL
64 *atmel_usart.3: ttyS3 at MMIO 0xfffc8000 (irq = 8) is a ATMEL_SERIAL
65 *atmel_usart.4: ttyS4 at MMIO 0xfffcc000 (irq = 9) is a ATMEL_SERIAL
66 * on the YL-9200 we are sitting at the following
67 *ttyS0 at MMIO 0xfefff200 (irq = 1) is a AT91_SERIAL
68 *ttyS1 at MMIO 0xfefc4000 (irq = 7) is a AT91_SERIAL
69 */
70 56
71/* extern void __init yl_9200_add_device_sounder(struct gpio_sounder *sounders, int nr);*/ 57 /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
58 at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
72 59
73static struct at91_uart_config __initdata yl_9200_uart_config = { 60 /* DBGU on ttyS0. (Rx & Tx only) */
74 .console_tty = 0, /* ttyS0 */ 61 at91_register_uart(0, 0, 0);
75 .nr_tty = 3,
76 .tty_map = { 4, 1, 0, -1, -1 } /* ttyS0, ..., ttyS4 */
77};
78 62
79static void __init yl_9200_map_io(void) 63 /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
80{ 64 at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
81 /* Initialize processor: 18.432 MHz crystal */ 65 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
82 /*Also initialises register clocks & gpio*/ 66 | ATMEL_UART_RI);
83 at91rm9200_initialize(18432000, AT91RM9200_PQFP); /*we have a 3 bank system*/
84 67
85 /* Setup the serial ports and console */ 68 /* USART0 on ttyS2. (Rx & Tx only to JP3) */
86 at91_init_serial(&yl_9200_uart_config); 69 at91_register_uart(AT91RM9200_ID_US0, 2, 0);
87 70
88 /* Setup the LEDs D2=PB17,D3=PB16 */ 71 /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
89 at91_init_leds(AT91_PIN_PB16,AT91_PIN_PB17); /*cpu-led,timer-led*/ 72 at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
73
74 /* set serial console to ttyS0 (ie, DBGU) */
75 at91_set_serial_console(0);
90} 76}
91 77
92static void __init yl_9200_init_irq(void) 78static void __init yl9200_init_irq(void)
93{ 79{
94 at91rm9200_init_interrupts(NULL); 80 at91rm9200_init_interrupts(NULL);
95} 81}
96 82
97static struct at91_eth_data __initdata yl_9200_eth_data = {
98 .phy_irq_pin = AT91_PIN_PB28,
99 .is_rmii = 1,
100};
101 83
102static struct at91_usbh_data __initdata yl_9200_usbh_data = { 84/*
103 .ports = 1, /* this should be 1 not 2 for the Yl9200*/ 85 * LEDs
86 */
87static struct gpio_led yl9200_leds[] = {
88 { /* D2 */
89 .name = "led2",
90 .gpio = AT91_PIN_PB17,
91 .active_low = 1,
92 .default_trigger = "timer",
93 },
94 { /* D3 */
95 .name = "led3",
96 .gpio = AT91_PIN_PB16,
97 .active_low = 1,
98 .default_trigger = "heartbeat",
99 },
100 { /* D4 */
101 .name = "led4",
102 .gpio = AT91_PIN_PB15,
103 .active_low = 1,
104 },
105 { /* D5 */
106 .name = "led5",
107 .gpio = AT91_PIN_PB8,
108 .active_low = 1,
109 }
104}; 110};
105 111
106static struct at91_udc_data __initdata yl_9200_udc_data = {
107/*on sheet 7 Schemitic rev 1.0*/
108 .pullup_pin = AT91_PIN_PC4,
109 .vbus_pin= AT91_PIN_PC5,
110 .pullup_active_low = 1, /*ACTIVE LOW!! due to PNP transistor on page 7*/
111
112};
113/* 112/*
114static struct at91_cf_data __initdata yl_9200_cf_data = { 113 * Ethernet
115TODO S.BIRTLES 114 */
116 .det_pin = AT91_PIN_xxx, 115static struct at91_eth_data __initdata yl9200_eth_data = {
117 .rst_pin = AT91_PIN_xxx, 116 .phy_irq_pin = AT91_PIN_PB28,
118 .irq_pin = ... not connected 117 .is_rmii = 1,
119 .vcc_pin = ... always powered
120
121}; 118};
122*/
123static struct at91_mmc_data __initdata yl_9200_mmc_data = {
124 .det_pin = AT91_PIN_PB9, /*THIS LOOKS CORRECT SHEET7*/
125/* .wp_pin = ... not connected SHEET7*/
126 .slot_b = 0,
127 .wire4 = 1,
128 119
120/*
121 * USB Host
122 */
123static struct at91_usbh_data __initdata yl9200_usbh_data = {
124 .ports = 1, /* PQFP version of AT91RM9200 */
129}; 125};
130 126
131/* -------------------------------------------------------------------- 127/*
132 * Touch screen 128 * USB Device
133 * -------------------------------------------------------------------- */ 129 */
134#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 130static struct at91_udc_data __initdata yl9200_udc_data = {
135static int ads7843_pendown_state(void) 131 .pullup_pin = AT91_PIN_PC4,
136{ 132 .vbus_pin = AT91_PIN_PC5,
137 return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */ 133 .pullup_active_low = 1, /* Active Low due to PNP transistor (pg 7) */
138}
139
140static void __init at91_init_device_ts(void)
141{
142/*IMPORTANT NOTE THE SPI INTERFACE IS ALREADY CONFIGURED BY XXX_DEVICES.C
143THAT IS TO SAY THAT MISO,MOSI,SPCK AND CS are already configured
144we only need to enable the other datapins which are:
145PB10/RK1 BUSY
146*/
147/* Touchscreen BUSY signal , pin,use pullup ( TODO not currently used in the ADS7843/6.c driver)*/
148at91_set_gpio_input(AT91_PIN_PB10, 1);
149}
150
151#else
152static void __init at91_init_device_ts(void) {}
153#endif
154
155static struct ads7846_platform_data ads_info = {
156 .model = 7843,
157 .x_min = 150,
158 .x_max = 3830,
159 .y_min = 190,
160 .y_max = 3830,
161 .vref_delay_usecs = 100,
162/* for a 8" touch screen*/
163 //.x_plate_ohms = 603, //= 450, S.Birtles TODO
164 //.y_plate_ohms = 332, //= 250, S.Birtles TODO
165/*for a 10.4" touch screen*/
166 //.x_plate_ohms =611,
167 //.y_plate_ohms =325,
168
169 .x_plate_ohms = 576,
170 .y_plate_ohms = 366,
171 //
172 .pressure_max = 15000, /*generally nonsense on the 7843*/
173 /*number of times to send query to chip in a given run 0 equals one time (do not set to 0!! ,there is a bug in ADS 7846 code)*/
174 .debounce_max = 1,
175 .debounce_rep = 0,
176 .debounce_tol = (~0),
177 .get_pendown_state = ads7843_pendown_state,
178};
179 134
180/*static struct canbus_platform_data can_info = {
181 .model = 2510,
182}; 135};
183*/
184
185static struct spi_board_info yl_9200_spi_devices[] = {
186/*this sticks it at:
187 /sys/devices/platform/atmel_spi.0/spi0.0
188 /sys/bus/platform/devices/
189Documentation/spi IIRC*/
190 136
191#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 137/*
192 /*(this IS correct 04-NOV-2007)*/ 138 * MMC
193 { 139 */
194 .modalias = "ads7846", /* because the driver is called ads7846*/ 140static struct at91_mmc_data __initdata yl9200_mmc_data = {
195 .chip_select = 0, /*THIS MUST BE AN INDEX INTO AN ARRAY OF pins */ 141 .det_pin = AT91_PIN_PB9,
196/*this is ONLY TO BE USED if chipselect above is not used, it passes a pin directly for the chip select*/ 142 // .wp_pin = ... not connected
197 /*.controller_data =AT91_PIN_PA3 ,*/ 143 .wire4 = 1,
198 .max_speed_hz = 5000*26, /*(4700 * 26)-125000 * 26, (max sample rate @ 3V) * (cmd + data + overhead) */
199 .bus_num = 0,
200 .platform_data = &ads_info,
201 .irq = AT91_PIN_PB11,
202 },
203#endif
204/*we need to put our CAN driver data here!!*/
205/*THIS IS ALL DUMMY DATA*/
206/* {
207 .modalias = "mcp2510", //DUMMY for MCP2510 chip
208 .chip_select = 1,*/ /*THIS MUST BE AN INDEX INTO AN ARRAY OF pins */
209 /*this is ONLY TO BE USED if chipselect above is not used, it passes a pin directly for the chip select */
210 /* .controller_data =AT91_PIN_PA4 ,
211 .max_speed_hz = 25000 * 26,
212 .bus_num = 0,
213 .platform_data = &can_info,
214 .irq = AT91_PIN_PC0,
215 },
216 */
217 //max SPI chip needs to go here
218}; 144};
219 145
220static struct mtd_partition __initdata yl_9200_nand_partition[] = { 146/*
147 * NAND Flash
148 */
149static struct mtd_partition __initdata yl9200_nand_partition[] = {
221 { 150 {
222 .name = "AT91 NAND partition 1, boot", 151 .name = "AT91 NAND partition 1, boot",
223 .offset = 0, 152 .offset = 0,
@@ -242,442 +171,434 @@ static struct mtd_partition __initdata yl_9200_nand_partition[] = {
242 .name = "AT91 NAND partition 5, ext-fs", 171 .name = "AT91 NAND partition 5, ext-fs",
243 .offset = 32 * SZ_1M, 172 .offset = 32 * SZ_1M,
244 .size = 32 * SZ_1M 173 .size = 32 * SZ_1M
245 }, 174 }
246}; 175};
247 176
248static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) 177static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
249{ 178{
250 *num_partitions = ARRAY_SIZE(yl_9200_nand_partition); 179 *num_partitions = ARRAY_SIZE(yl9200_nand_partition);
251 return yl_9200_nand_partition; 180 return yl9200_nand_partition;
252} 181}
253 182
254static struct at91_nand_data __initdata yl_9200_nand_data = { 183static struct at91_nand_data __initdata yl9200_nand_data = {
255 .ale= 6, 184 .ale = 6,
256 .cle= 7, 185 .cle = 7,
257 /*.det_pin = AT91_PIN_PCxx,*/ /*we don't have a det pin because NandFlash is fixed to board*/ 186 // .det_pin = ... not connected
258 .rdy_pin = AT91_PIN_PC14, /*R/!B Sheet10*/ 187 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
259 .enable_pin = AT91_PIN_PC15, /*!CE Sheet10 */ 188 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
260 .partition_info = nand_partitions, 189 .partition_info = nand_partitions,
261}; 190};
262 191
263
264
265/* 192/*
266TODO S.Birtles 193 * NOR Flash
267potentially a problem with the size above 194 */
268physmap platform flash device: 00800000 at 10000000 195#define YL9200_FLASH_BASE AT91_CHIPSELECT_0
269physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank 196#define YL9200_FLASH_SIZE 0x1000000
270NOR chip too large to fit in mapping. Attempting to cope...
271 Intel/Sharp Extended Query Table at 0x0031
272Using buffer write method
273cfi_cmdset_0001: Erase suspend on write enabled
274Reducing visibility of 16384KiB chip to 8192KiB
275*/
276 197
277static struct mtd_partition yl_9200_flash_partitions[] = { 198static struct mtd_partition yl9200_flash_partitions[] = {
199 {
200 .name = "Bootloader",
201 .size = 0x00040000,
202 .offset = 0,
203 .mask_flags = MTD_WRITEABLE, /* force read-only */
204 },
278 { 205 {
279 .name = "Bootloader", 206 .name = "Kernel",
280 .size = 0x00040000, 207 .size = 0x001C0000,
281 .offset = 0, 208 .offset = 0x00040000,
282 .mask_flags = MTD_WRITEABLE /* force read-only */ 209 },
283 },{ 210 {
284 .name = "Kernel", 211 .name = "Filesystem",
285 .size = 0x001C0000, 212 .size = MTDPART_SIZ_FULL,
286 .offset = 0x00040000, 213 .offset = 0x00200000
287 },{
288 .name = "Filesystem",
289 .size = MTDPART_SIZ_FULL,
290 .offset = 0x00200000
291 } 214 }
292
293}; 215};
294 216
295static struct physmap_flash_data yl_9200_flash_data = { 217static struct physmap_flash_data yl9200_flash_data = {
296 .width = 2, 218 .width = 2,
297 .parts = yl_9200_flash_partitions, 219 .parts = yl9200_flash_partitions,
298 .nr_parts = ARRAY_SIZE(yl_9200_flash_partitions), 220 .nr_parts = ARRAY_SIZE(yl9200_flash_partitions),
299}; 221};
300 222
301static struct resource yl_9200_flash_resources[] = { 223static struct resource yl9200_flash_resources[] = {
302{ 224 {
303 .start = YL_9200_FLASH_BASE, 225 .start = YL9200_FLASH_BASE,
304 .end = YL_9200_FLASH_BASE + YL_9200_FLASH_SIZE - 1, 226 .end = YL9200_FLASH_BASE + YL9200_FLASH_SIZE - 1,
305 .flags = IORESOURCE_MEM, 227 .flags = IORESOURCE_MEM,
306 } 228 }
307}; 229};
308 230
309static struct platform_device yl_9200_flash = { 231static struct platform_device yl9200_flash = {
310 .name = "physmap-flash", 232 .name = "physmap-flash",
311 .id = 0, 233 .id = 0,
312 .dev = { 234 .dev = {
313 .platform_data = &yl_9200_flash_data, 235 .platform_data = &yl9200_flash_data,
314 }, 236 },
315 .resource = yl_9200_flash_resources, 237 .resource = yl9200_flash_resources,
316 .num_resources = ARRAY_SIZE(yl_9200_flash_resources), 238 .num_resources = ARRAY_SIZE(yl9200_flash_resources),
317}; 239};
318 240
319 241/*
320static struct gpio_led yl_9200_leds[] = { 242 * I2C (TWI)
321/*D2 &D3 are passed directly in via at91_init_leds*/ 243 */
322 { 244static struct i2c_board_info __initdata yl9200_i2c_devices[] = {
323 .name = "led4", /*D4*/ 245 { /* EEPROM */
324 .gpio = AT91_PIN_PB15, 246 I2C_BOARD_INFO("24c128", 0x50),
325 .active_low = 1,
326 .default_trigger = "heartbeat",
327 /*.default_trigger = "timer",*/
328 },
329 {
330 .name = "led5", /*D5*/
331 .gpio = AT91_PIN_PB8,
332 .active_low = 1,
333 .default_trigger = "heartbeat",
334 }
335};
336
337//static struct gpio_sounder yl_9200_sounder[] = {*/
338/*This is a simple speaker attached to a gpo line*/
339
340// {
341// .name = "Speaker", /*LS1*/
342// .gpio = AT91_PIN_PA22,
343// .active_low = 0,
344// .default_trigger = "heartbeat",
345 /*.default_trigger = "timer",*/
346// },
347//};
348
349
350
351static struct i2c_board_info __initdata yl_9200_i2c_devices[] = {
352 {
353 /*TODO*/
354 I2C_BOARD_INFO("CS4334", 0x00),
355 } 247 }
356}; 248};
357 249
358 250/*
359 /*
360 * GPIO Buttons 251 * GPIO Buttons
361 */ 252*/
362#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 253#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
363static struct gpio_keys_button yl_9200_buttons[] = { 254static struct gpio_keys_button yl9200_buttons[] = {
364 { 255 {
365 .gpio = AT91_PIN_PA24, 256 .gpio = AT91_PIN_PA24,
366 .code = BTN_2, 257 .code = BTN_2,
367 .desc = "SW2", 258 .desc = "SW2",
368 .active_low = 1, 259 .active_low = 1,
369 .wakeup = 1, 260 .wakeup = 1,
370 }, 261 },
371 { 262 {
372 .gpio = AT91_PIN_PB1, 263 .gpio = AT91_PIN_PB1,
373 .code = BTN_3, 264 .code = BTN_3,
374 .desc = "SW3", 265 .desc = "SW3",
375 .active_low = 1, 266 .active_low = 1,
376 .wakeup = 1, 267 .wakeup = 1,
377 }, 268 },
378 { 269 {
379 .gpio = AT91_PIN_PB2, 270 .gpio = AT91_PIN_PB2,
380 .code = BTN_4, 271 .code = BTN_4,
381 .desc = "SW4", 272 .desc = "SW4",
382 .active_low = 1, 273 .active_low = 1,
383 .wakeup = 1, 274 .wakeup = 1,
384 }, 275 },
385 { 276 {
386 .gpio = AT91_PIN_PB6, 277 .gpio = AT91_PIN_PB6,
387 .code = BTN_5, 278 .code = BTN_5,
388 .desc = "SW5", 279 .desc = "SW5",
389 .active_low = 1, 280 .active_low = 1,
390 .wakeup = 1, 281 .wakeup = 1,
391 }, 282 }
392
393}; 283};
394 284
395static struct gpio_keys_platform_data yl_9200_button_data = { 285static struct gpio_keys_platform_data yl9200_button_data = {
396 .buttons = yl_9200_buttons, 286 .buttons = yl9200_buttons,
397 .nbuttons = ARRAY_SIZE(yl_9200_buttons), 287 .nbuttons = ARRAY_SIZE(yl9200_buttons),
398}; 288};
399 289
400static struct platform_device yl_9200_button_device = { 290static struct platform_device yl9200_button_device = {
401 .name = "gpio-keys", 291 .name = "gpio-keys",
402 .id = -1, 292 .id = -1,
403 .num_resources = 0, 293 .num_resources = 0,
404 .dev = { 294 .dev = {
405 .platform_data = &yl_9200_button_data, 295 .platform_data = &yl9200_button_data,
406 } 296 }
407}; 297};
408 298
409static void __init yl_9200_add_device_buttons(void) 299static void __init yl9200_add_device_buttons(void)
410{ 300{
411 //SW2 301 at91_set_gpio_input(AT91_PIN_PA24, 1); /* SW2 */
412 at91_set_gpio_input(AT91_PIN_PA24, 0);
413 at91_set_deglitch(AT91_PIN_PA24, 1); 302 at91_set_deglitch(AT91_PIN_PA24, 1);
414 303 at91_set_gpio_input(AT91_PIN_PB1, 1); /* SW3 */
415 //SW3
416 at91_set_gpio_input(AT91_PIN_PB1, 0);
417 at91_set_deglitch(AT91_PIN_PB1, 1); 304 at91_set_deglitch(AT91_PIN_PB1, 1);
418 //SW4 305 at91_set_gpio_input(AT91_PIN_PB2, 1); /* SW4 */
419 at91_set_gpio_input(AT91_PIN_PB2, 0);
420 at91_set_deglitch(AT91_PIN_PB2, 1); 306 at91_set_deglitch(AT91_PIN_PB2, 1);
421 307 at91_set_gpio_input(AT91_PIN_PB6, 1); /* SW5 */
422 //SW5
423 at91_set_gpio_input(AT91_PIN_PB6, 0);
424 at91_set_deglitch(AT91_PIN_PB6, 1); 308 at91_set_deglitch(AT91_PIN_PB6, 1);
425 309
310 /* Enable buttons (Sheet 5) */
311 at91_set_gpio_output(AT91_PIN_PB7, 1);
312
313 platform_device_register(&yl9200_button_device);
314}
315#else
316static void __init yl9200_add_device_buttons(void) {}
317#endif
318
319/*
320 * Touchscreen
321 */
322#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
323static int ads7843_pendown_state(void)
324{
325 return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */
326}
327
328static struct ads7846_platform_data ads_info = {
329 .model = 7843,
330 .x_min = 150,
331 .x_max = 3830,
332 .y_min = 190,
333 .y_max = 3830,
334 .vref_delay_usecs = 100,
335
336 /* For a 8" touch-screen */
337 // .x_plate_ohms = 603,
338 // .y_plate_ohms = 332,
339
340 /* For a 10.4" touch-screen */
341 // .x_plate_ohms = 611,
342 // .y_plate_ohms = 325,
343
344 .x_plate_ohms = 576,
345 .y_plate_ohms = 366,
346
347 .pressure_max = 15000, /* generally nonsense on the 7843 */
348 .debounce_max = 1,
349 .debounce_rep = 0,
350 .debounce_tol = (~0),
351 .get_pendown_state = ads7843_pendown_state,
352};
426 353
427 at91_set_gpio_output(AT91_PIN_PB7, 1); /* #TURN BUTTONS ON, SHEET 5 of schematics */ 354static void __init yl9200_add_device_ts(void)
428 platform_device_register(&yl_9200_button_device); 355{
356 at91_set_gpio_input(AT91_PIN_PB11, 1); /* Touchscreen interrupt pin */
357 at91_set_gpio_input(AT91_PIN_PB10, 1); /* Touchscreen BUSY signal - not used! */
429} 358}
430#else 359#else
431static void __init yl_9200_add_device_buttons(void) {} 360static void __init yl9200_add_device_ts(void) {}
361#endif
362
363/*
364 * SPI devices
365 */
366static struct spi_board_info yl9200_spi_devices[] = {
367#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
368 { /* Touchscreen */
369 .modalias = "ads7846",
370 .chip_select = 0,
371 .max_speed_hz = 5000 * 26,
372 .platform_data = &ads_info,
373 .irq = AT91_PIN_PB11,
374 },
432#endif 375#endif
376 { /* CAN */
377 .modalias = "mcp2510",
378 .chip_select = 1,
379 .max_speed_hz = 25000 * 26,
380 .irq = AT91_PIN_PC0,
381 }
382};
433 383
384/*
385 * LCD / VGA
386 *
387 * EPSON S1D13806 FB (discontinued chip)
388 * EPSON S1D13506 FB
389 */
434#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) 390#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE)
435#include <video/s1d13xxxfb.h> 391#include <video/s1d13xxxfb.h>
436 392
437/* EPSON S1D13806 FB (discontinued chip)*/
438/* EPSON S1D13506 FB */
439
440#define AT91_FB_REG_BASE 0x80000000L 393#define AT91_FB_REG_BASE 0x80000000L
441#define AT91_FB_REG_SIZE 0x200 394#define AT91_FB_REG_SIZE 0x200
442#define AT91_FB_VMEM_BASE 0x80200000L 395#define AT91_FB_VMEM_BASE 0x80200000L
443#define AT91_FB_VMEM_SIZE 0x200000L 396#define AT91_FB_VMEM_SIZE 0x200000L
444 397
445/*#define S1D_DISPLAY_WIDTH 640*/ 398static void __init yl9200_init_video(void)
446/*#define S1D_DISPLAY_HEIGHT 480*/
447
448
449static void __init yl_9200_init_video(void)
450{ 399{
451 at91_sys_write(AT91_PIOC + PIO_ASR,AT91_PIN_PC6); 400 /* NWAIT Signal */
452 at91_sys_write(AT91_PIOC + PIO_BSR,0); 401 at91_set_A_periph(AT91_PIN_PC6, 0);
453 at91_sys_write(AT91_PIOC + PIO_ASR,AT91_PIN_PC6);
454
455 at91_sys_write( AT91_SMC_CSR(2),
456 AT91_SMC_NWS_(0x4) |
457 AT91_SMC_WSEN |
458 AT91_SMC_TDF_(0x100) |
459 AT91_SMC_DBW
460 );
461
462
463 402
403 /* Initialization of the Static Memory Controller for Chip Select 2 */
404 at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
405 | AT91_SMC_WSEN | AT91_SMC_NWS_(0x4) /* wait states */
406 | AT91_SMC_TDF_(0x100) /* float time */
407 );
464} 408}
465 409
466 410static struct s1d13xxxfb_regval yl9200_s1dfb_initregs[] =
467static struct s1d13xxxfb_regval yl_9200_s1dfb_initregs[] =
468{ 411{
469 {S1DREG_MISC, 0x00}, /* Miscellaneous Register*/ 412 {S1DREG_MISC, 0x00}, /* Miscellaneous Register*/
470 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ 413 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
471 {S1DREG_GPIO_CNF0, 0x00}, /* General IO Pins Configuration Register*/ 414 {S1DREG_GPIO_CNF0, 0x00}, /* General IO Pins Configuration Register*/
472 {S1DREG_GPIO_CTL0, 0x00}, /* General IO Pins Control Register*/ 415 {S1DREG_GPIO_CTL0, 0x00}, /* General IO Pins Control Register*/
473 {S1DREG_CLK_CNF, 0x11}, /* Memory Clock Configuration Register*/ 416 {S1DREG_CLK_CNF, 0x11}, /* Memory Clock Configuration Register*/
474 {S1DREG_LCD_CLK_CNF, 0x10}, /* LCD Pixel Clock Configuration Register*/ 417 {S1DREG_LCD_CLK_CNF, 0x10}, /* LCD Pixel Clock Configuration Register*/
475 {S1DREG_CRT_CLK_CNF, 0x12}, /* CRT/TV Pixel Clock Configuration Register*/ 418 {S1DREG_CRT_CLK_CNF, 0x12}, /* CRT/TV Pixel Clock Configuration Register*/
476 {S1DREG_MPLUG_CLK_CNF, 0x01}, /* MediaPlug Clock Configuration Register*/ 419 {S1DREG_MPLUG_CLK_CNF, 0x01}, /* MediaPlug Clock Configuration Register*/
477 {S1DREG_CPU2MEM_WST_SEL, 0x02}, /* CPU To Memory Wait State Select Register*/ 420 {S1DREG_CPU2MEM_WST_SEL, 0x02}, /* CPU To Memory Wait State Select Register*/
478 {S1DREG_MEM_CNF, 0x00}, /* Memory Configuration Register*/ 421 {S1DREG_MEM_CNF, 0x00}, /* Memory Configuration Register*/
479 {S1DREG_SDRAM_REF_RATE, 0x04}, /* DRAM Refresh Rate Register, MCLK source*/ 422 {S1DREG_SDRAM_REF_RATE, 0x04}, /* DRAM Refresh Rate Register, MCLK source*/
480 {S1DREG_SDRAM_TC0, 0x12}, /* DRAM Timings Control Register 0*/ 423 {S1DREG_SDRAM_TC0, 0x12}, /* DRAM Timings Control Register 0*/
481 {S1DREG_SDRAM_TC1, 0x02}, /* DRAM Timings Control Register 1*/ 424 {S1DREG_SDRAM_TC1, 0x02}, /* DRAM Timings Control Register 1*/
482 {S1DREG_PANEL_TYPE, 0x25}, /* Panel Type Register*/ 425 {S1DREG_PANEL_TYPE, 0x25}, /* Panel Type Register*/
483 {S1DREG_MOD_RATE, 0x00}, /* MOD Rate Register*/ 426 {S1DREG_MOD_RATE, 0x00}, /* MOD Rate Register*/
484 {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* LCD Horizontal Display Width Register*/ 427 {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* LCD Horizontal Display Width Register*/
485 {S1DREG_LCD_NDISP_HPER, 0x13}, /* LCD Horizontal Non-Display Period Register*/ 428 {S1DREG_LCD_NDISP_HPER, 0x13}, /* LCD Horizontal Non-Display Period Register*/
486 {S1DREG_TFT_FPLINE_START, 0x01}, /* TFT FPLINE Start Position Register*/ 429 {S1DREG_TFT_FPLINE_START, 0x01}, /* TFT FPLINE Start Position Register*/
487 {S1DREG_TFT_FPLINE_PWIDTH, 0x0c}, /* TFT FPLINE Pulse Width Register*/ 430 {S1DREG_TFT_FPLINE_PWIDTH, 0x0c}, /* TFT FPLINE Pulse Width Register*/
488 {S1DREG_LCD_DISP_VHEIGHT0, 0xDF}, /* LCD Vertical Display Height Register 0*/ 431 {S1DREG_LCD_DISP_VHEIGHT0, 0xDF}, /* LCD Vertical Display Height Register 0*/
489 {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* LCD Vertical Display Height Register 1*/ 432 {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* LCD Vertical Display Height Register 1*/
490 {S1DREG_LCD_NDISP_VPER, 0x2c}, /* LCD Vertical Non-Display Period Register*/ 433 {S1DREG_LCD_NDISP_VPER, 0x2c}, /* LCD Vertical Non-Display Period Register*/
491 {S1DREG_TFT_FPFRAME_START, 0x0a}, /* TFT FPFRAME Start Position Register*/ 434 {S1DREG_TFT_FPFRAME_START, 0x0a}, /* TFT FPFRAME Start Position Register*/
492 {S1DREG_TFT_FPFRAME_PWIDTH, 0x02}, /* TFT FPFRAME Pulse Width Register*/ 435 {S1DREG_TFT_FPFRAME_PWIDTH, 0x02}, /* TFT FPFRAME Pulse Width Register*/
493 {S1DREG_LCD_DISP_MODE, 0x05}, /* LCD Display Mode Register*/ 436 {S1DREG_LCD_DISP_MODE, 0x05}, /* LCD Display Mode Register*/
494 {S1DREG_LCD_MISC, 0x01}, /* LCD Miscellaneous Register*/ 437 {S1DREG_LCD_MISC, 0x01}, /* LCD Miscellaneous Register*/
495 {S1DREG_LCD_DISP_START0, 0x00}, /* LCD Display Start Address Register 0*/ 438 {S1DREG_LCD_DISP_START0, 0x00}, /* LCD Display Start Address Register 0*/
496 {S1DREG_LCD_DISP_START1, 0x00}, /* LCD Display Start Address Register 1*/ 439 {S1DREG_LCD_DISP_START1, 0x00}, /* LCD Display Start Address Register 1*/
497 {S1DREG_LCD_DISP_START2, 0x00}, /* LCD Display Start Address Register 2*/ 440 {S1DREG_LCD_DISP_START2, 0x00}, /* LCD Display Start Address Register 2*/
498 {S1DREG_LCD_MEM_OFF0, 0x80}, /* LCD Memory Address Offset Register 0*/ 441 {S1DREG_LCD_MEM_OFF0, 0x80}, /* LCD Memory Address Offset Register 0*/
499 {S1DREG_LCD_MEM_OFF1, 0x02}, /* LCD Memory Address Offset Register 1*/ 442 {S1DREG_LCD_MEM_OFF1, 0x02}, /* LCD Memory Address Offset Register 1*/
500 {S1DREG_LCD_PIX_PAN, 0x03}, /* LCD Pixel Panning Register*/ 443 {S1DREG_LCD_PIX_PAN, 0x03}, /* LCD Pixel Panning Register*/
501 {S1DREG_LCD_DISP_FIFO_HTC, 0x00}, /* LCD Display FIFO High Threshold Control Register*/ 444 {S1DREG_LCD_DISP_FIFO_HTC, 0x00}, /* LCD Display FIFO High Threshold Control Register*/
502 {S1DREG_LCD_DISP_FIFO_LTC, 0x00}, /* LCD Display FIFO Low Threshold Control Register*/ 445 {S1DREG_LCD_DISP_FIFO_LTC, 0x00}, /* LCD Display FIFO Low Threshold Control Register*/
503 {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* CRT/TV Horizontal Display Width Register*/ 446 {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* CRT/TV Horizontal Display Width Register*/
504 {S1DREG_CRT_NDISP_HPER, 0x13}, /* CRT/TV Horizontal Non-Display Period Register*/ 447 {S1DREG_CRT_NDISP_HPER, 0x13}, /* CRT/TV Horizontal Non-Display Period Register*/
505 {S1DREG_CRT_HRTC_START, 0x01}, /* CRT/TV HRTC Start Position Register*/ 448 {S1DREG_CRT_HRTC_START, 0x01}, /* CRT/TV HRTC Start Position Register*/
506 {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* CRT/TV HRTC Pulse Width Register*/ 449 {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* CRT/TV HRTC Pulse Width Register*/
507 {S1DREG_CRT_DISP_VHEIGHT0, 0xDF}, /* CRT/TV Vertical Display Height Register 0*/ 450 {S1DREG_CRT_DISP_VHEIGHT0, 0xDF}, /* CRT/TV Vertical Display Height Register 0*/
508 {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* CRT/TV Vertical Display Height Register 1*/ 451 {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* CRT/TV Vertical Display Height Register 1*/
509 {S1DREG_CRT_NDISP_VPER, 0x2B}, /* CRT/TV Vertical Non-Display Period Register*/ 452 {S1DREG_CRT_NDISP_VPER, 0x2B}, /* CRT/TV Vertical Non-Display Period Register*/
510 {S1DREG_CRT_VRTC_START, 0x09}, /* CRT/TV VRTC Start Position Register*/ 453 {S1DREG_CRT_VRTC_START, 0x09}, /* CRT/TV VRTC Start Position Register*/
511 {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* CRT/TV VRTC Pulse Width Register*/ 454 {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* CRT/TV VRTC Pulse Width Register*/
512 {S1DREG_TV_OUT_CTL, 0x18}, /* TV Output Control Register */ 455 {S1DREG_TV_OUT_CTL, 0x18}, /* TV Output Control Register */
513 {S1DREG_CRT_DISP_MODE, 0x05}, /* CRT/TV Display Mode Register, 16BPP*/ 456 {S1DREG_CRT_DISP_MODE, 0x05}, /* CRT/TV Display Mode Register, 16BPP*/
514 {S1DREG_CRT_DISP_START0, 0x00}, /* CRT/TV Display Start Address Register 0*/ 457 {S1DREG_CRT_DISP_START0, 0x00}, /* CRT/TV Display Start Address Register 0*/
515 {S1DREG_CRT_DISP_START1, 0x00}, /* CRT/TV Display Start Address Register 1*/ 458 {S1DREG_CRT_DISP_START1, 0x00}, /* CRT/TV Display Start Address Register 1*/
516 {S1DREG_CRT_DISP_START2, 0x00}, /* CRT/TV Display Start Address Register 2*/ 459 {S1DREG_CRT_DISP_START2, 0x00}, /* CRT/TV Display Start Address Register 2*/
517 {S1DREG_CRT_MEM_OFF0, 0x80}, /* CRT/TV Memory Address Offset Register 0*/ 460 {S1DREG_CRT_MEM_OFF0, 0x80}, /* CRT/TV Memory Address Offset Register 0*/
518 {S1DREG_CRT_MEM_OFF1, 0x02}, /* CRT/TV Memory Address Offset Register 1*/ 461 {S1DREG_CRT_MEM_OFF1, 0x02}, /* CRT/TV Memory Address Offset Register 1*/
519 {S1DREG_CRT_PIX_PAN, 0x00}, /* CRT/TV Pixel Panning Register*/ 462 {S1DREG_CRT_PIX_PAN, 0x00}, /* CRT/TV Pixel Panning Register*/
520 {S1DREG_CRT_DISP_FIFO_HTC, 0x00}, /* CRT/TV Display FIFO High Threshold Control Register*/ 463 {S1DREG_CRT_DISP_FIFO_HTC, 0x00}, /* CRT/TV Display FIFO High Threshold Control Register*/
521 {S1DREG_CRT_DISP_FIFO_LTC, 0x00}, /* CRT/TV Display FIFO Low Threshold Control Register*/ 464 {S1DREG_CRT_DISP_FIFO_LTC, 0x00}, /* CRT/TV Display FIFO Low Threshold Control Register*/
522 {S1DREG_LCD_CUR_CTL, 0x00}, /* LCD Ink/Cursor Control Register*/ 465 {S1DREG_LCD_CUR_CTL, 0x00}, /* LCD Ink/Cursor Control Register*/
523 {S1DREG_LCD_CUR_START, 0x01}, /* LCD Ink/Cursor Start Address Register*/ 466 {S1DREG_LCD_CUR_START, 0x01}, /* LCD Ink/Cursor Start Address Register*/
524 {S1DREG_LCD_CUR_XPOS0, 0x00}, /* LCD Cursor X Position Register 0*/ 467 {S1DREG_LCD_CUR_XPOS0, 0x00}, /* LCD Cursor X Position Register 0*/
525 {S1DREG_LCD_CUR_XPOS1, 0x00}, /* LCD Cursor X Position Register 1*/ 468 {S1DREG_LCD_CUR_XPOS1, 0x00}, /* LCD Cursor X Position Register 1*/
526 {S1DREG_LCD_CUR_YPOS0, 0x00}, /* LCD Cursor Y Position Register 0*/ 469 {S1DREG_LCD_CUR_YPOS0, 0x00}, /* LCD Cursor Y Position Register 0*/
527 {S1DREG_LCD_CUR_YPOS1, 0x00}, /* LCD Cursor Y Position Register 1*/ 470 {S1DREG_LCD_CUR_YPOS1, 0x00}, /* LCD Cursor Y Position Register 1*/
528 {S1DREG_LCD_CUR_BCTL0, 0x00}, /* LCD Ink/Cursor Blue Color 0 Register*/ 471 {S1DREG_LCD_CUR_BCTL0, 0x00}, /* LCD Ink/Cursor Blue Color 0 Register*/
529 {S1DREG_LCD_CUR_GCTL0, 0x00}, /* LCD Ink/Cursor Green Color 0 Register*/ 472 {S1DREG_LCD_CUR_GCTL0, 0x00}, /* LCD Ink/Cursor Green Color 0 Register*/
530 {S1DREG_LCD_CUR_RCTL0, 0x00}, /* LCD Ink/Cursor Red Color 0 Register*/ 473 {S1DREG_LCD_CUR_RCTL0, 0x00}, /* LCD Ink/Cursor Red Color 0 Register*/
531 {S1DREG_LCD_CUR_BCTL1, 0x1F}, /* LCD Ink/Cursor Blue Color 1 Register*/ 474 {S1DREG_LCD_CUR_BCTL1, 0x1F}, /* LCD Ink/Cursor Blue Color 1 Register*/
532 {S1DREG_LCD_CUR_GCTL1, 0x3F}, /* LCD Ink/Cursor Green Color 1 Register*/ 475 {S1DREG_LCD_CUR_GCTL1, 0x3F}, /* LCD Ink/Cursor Green Color 1 Register*/
533 {S1DREG_LCD_CUR_RCTL1, 0x1F}, /* LCD Ink/Cursor Red Color 1 Register*/ 476 {S1DREG_LCD_CUR_RCTL1, 0x1F}, /* LCD Ink/Cursor Red Color 1 Register*/
534 {S1DREG_LCD_CUR_FIFO_HTC, 0x00}, /* LCD Ink/Cursor FIFO Threshold Register*/ 477 {S1DREG_LCD_CUR_FIFO_HTC, 0x00}, /* LCD Ink/Cursor FIFO Threshold Register*/
535 {S1DREG_CRT_CUR_CTL, 0x00}, /* CRT/TV Ink/Cursor Control Register*/ 478 {S1DREG_CRT_CUR_CTL, 0x00}, /* CRT/TV Ink/Cursor Control Register*/
536 {S1DREG_CRT_CUR_START, 0x01}, /* CRT/TV Ink/Cursor Start Address Register*/ 479 {S1DREG_CRT_CUR_START, 0x01}, /* CRT/TV Ink/Cursor Start Address Register*/
537 {S1DREG_CRT_CUR_XPOS0, 0x00}, /* CRT/TV Cursor X Position Register 0*/ 480 {S1DREG_CRT_CUR_XPOS0, 0x00}, /* CRT/TV Cursor X Position Register 0*/
538 {S1DREG_CRT_CUR_XPOS1, 0x00}, /* CRT/TV Cursor X Position Register 1*/ 481 {S1DREG_CRT_CUR_XPOS1, 0x00}, /* CRT/TV Cursor X Position Register 1*/
539 {S1DREG_CRT_CUR_YPOS0, 0x00}, /* CRT/TV Cursor Y Position Register 0*/ 482 {S1DREG_CRT_CUR_YPOS0, 0x00}, /* CRT/TV Cursor Y Position Register 0*/
540 {S1DREG_CRT_CUR_YPOS1, 0x00}, /* CRT/TV Cursor Y Position Register 1*/ 483 {S1DREG_CRT_CUR_YPOS1, 0x00}, /* CRT/TV Cursor Y Position Register 1*/
541 {S1DREG_CRT_CUR_BCTL0, 0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register*/ 484 {S1DREG_CRT_CUR_BCTL0, 0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register*/
542 {S1DREG_CRT_CUR_GCTL0, 0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register*/ 485 {S1DREG_CRT_CUR_GCTL0, 0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register*/
543 {S1DREG_CRT_CUR_RCTL0, 0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register*/ 486 {S1DREG_CRT_CUR_RCTL0, 0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register*/
544 {S1DREG_CRT_CUR_BCTL1, 0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register*/ 487 {S1DREG_CRT_CUR_BCTL1, 0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register*/
545 {S1DREG_CRT_CUR_GCTL1, 0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register*/ 488 {S1DREG_CRT_CUR_GCTL1, 0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register*/
546 {S1DREG_CRT_CUR_RCTL1, 0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register*/ 489 {S1DREG_CRT_CUR_RCTL1, 0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register*/
547 {S1DREG_CRT_CUR_FIFO_HTC, 0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register*/ 490 {S1DREG_CRT_CUR_FIFO_HTC, 0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register*/
548 {S1DREG_BBLT_CTL0, 0x00}, /* BitBlt Control Register 0*/ 491 {S1DREG_BBLT_CTL0, 0x00}, /* BitBlt Control Register 0*/
549 {S1DREG_BBLT_CTL1, 0x01}, /* BitBlt Control Register 1*/ 492 {S1DREG_BBLT_CTL1, 0x01}, /* BitBlt Control Register 1*/
550 {S1DREG_BBLT_CC_EXP, 0x00}, /* BitBlt ROP Code/Color Expansion Register*/ 493 {S1DREG_BBLT_CC_EXP, 0x00}, /* BitBlt ROP Code/Color Expansion Register*/
551 {S1DREG_BBLT_OP, 0x00}, /* BitBlt Operation Register*/ 494 {S1DREG_BBLT_OP, 0x00}, /* BitBlt Operation Register*/
552 {S1DREG_BBLT_SRC_START0, 0x00}, /* BitBlt Source Start Address Register 0*/ 495 {S1DREG_BBLT_SRC_START0, 0x00}, /* BitBlt Source Start Address Register 0*/
553 {S1DREG_BBLT_SRC_START1, 0x00}, /* BitBlt Source Start Address Register 1*/ 496 {S1DREG_BBLT_SRC_START1, 0x00}, /* BitBlt Source Start Address Register 1*/
554 {S1DREG_BBLT_SRC_START2, 0x00}, /* BitBlt Source Start Address Register 2*/ 497 {S1DREG_BBLT_SRC_START2, 0x00}, /* BitBlt Source Start Address Register 2*/
555 {S1DREG_BBLT_DST_START0, 0x00}, /* BitBlt Destination Start Address Register 0*/ 498 {S1DREG_BBLT_DST_START0, 0x00}, /* BitBlt Destination Start Address Register 0*/
556 {S1DREG_BBLT_DST_START1, 0x00}, /* BitBlt Destination Start Address Register 1*/ 499 {S1DREG_BBLT_DST_START1, 0x00}, /* BitBlt Destination Start Address Register 1*/
557 {S1DREG_BBLT_DST_START2, 0x00}, /* BitBlt Destination Start Address Register 2*/ 500 {S1DREG_BBLT_DST_START2, 0x00}, /* BitBlt Destination Start Address Register 2*/
558 {S1DREG_BBLT_MEM_OFF0, 0x00}, /* BitBlt Memory Address Offset Register 0*/ 501 {S1DREG_BBLT_MEM_OFF0, 0x00}, /* BitBlt Memory Address Offset Register 0*/
559 {S1DREG_BBLT_MEM_OFF1, 0x00}, /* BitBlt Memory Address Offset Register 1*/ 502 {S1DREG_BBLT_MEM_OFF1, 0x00}, /* BitBlt Memory Address Offset Register 1*/
560 {S1DREG_BBLT_WIDTH0, 0x00}, /* BitBlt Width Register 0*/ 503 {S1DREG_BBLT_WIDTH0, 0x00}, /* BitBlt Width Register 0*/
561 {S1DREG_BBLT_WIDTH1, 0x00}, /* BitBlt Width Register 1*/ 504 {S1DREG_BBLT_WIDTH1, 0x00}, /* BitBlt Width Register 1*/
562 {S1DREG_BBLT_HEIGHT0, 0x00}, /* BitBlt Height Register 0*/ 505 {S1DREG_BBLT_HEIGHT0, 0x00}, /* BitBlt Height Register 0*/
563 {S1DREG_BBLT_HEIGHT1, 0x00}, /* BitBlt Height Register 1*/ 506 {S1DREG_BBLT_HEIGHT1, 0x00}, /* BitBlt Height Register 1*/
564 {S1DREG_BBLT_BGC0, 0x00}, /* BitBlt Background Color Register 0*/ 507 {S1DREG_BBLT_BGC0, 0x00}, /* BitBlt Background Color Register 0*/
565 {S1DREG_BBLT_BGC1, 0x00}, /* BitBlt Background Color Register 1*/ 508 {S1DREG_BBLT_BGC1, 0x00}, /* BitBlt Background Color Register 1*/
566 {S1DREG_BBLT_FGC0, 0x00}, /* BitBlt Foreground Color Register 0*/ 509 {S1DREG_BBLT_FGC0, 0x00}, /* BitBlt Foreground Color Register 0*/
567 {S1DREG_BBLT_FGC1, 0x00}, /* BitBlt Foreground Color Register 1*/ 510 {S1DREG_BBLT_FGC1, 0x00}, /* BitBlt Foreground Color Register 1*/
568 {S1DREG_LKUP_MODE, 0x00}, /* Look-Up Table Mode Register*/ 511 {S1DREG_LKUP_MODE, 0x00}, /* Look-Up Table Mode Register*/
569 {S1DREG_LKUP_ADDR, 0x00}, /* Look-Up Table Address Register*/ 512 {S1DREG_LKUP_ADDR, 0x00}, /* Look-Up Table Address Register*/
570 {S1DREG_PS_CNF, 0x00}, /* Power Save Configuration Register*/ 513 {S1DREG_PS_CNF, 0x00}, /* Power Save Configuration Register*/
571 {S1DREG_PS_STATUS, 0x00}, /* Power Save Status Register*/ 514 {S1DREG_PS_STATUS, 0x00}, /* Power Save Status Register*/
572 {S1DREG_CPU2MEM_WDOGT, 0x00}, /* CPU-to-Memory Access Watchdog Timer Register*/ 515 {S1DREG_CPU2MEM_WDOGT, 0x00}, /* CPU-to-Memory Access Watchdog Timer Register*/
573 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ 516 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
574}; 517};
575 518
576static u64 s1dfb_dmamask = 0xffffffffUL; 519static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
577 520
578static struct s1d13xxxfb_pdata yl_9200_s1dfb_pdata = { 521static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = {
579 .initregs = yl_9200_s1dfb_initregs, 522 .initregs = yl9200_s1dfb_initregs,
580 .initregssize = ARRAY_SIZE(yl_9200_s1dfb_initregs), 523 .initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs),
581 .platform_init_video = yl_9200_init_video, 524 .platform_init_video = yl9200_init_video,
582}; 525};
583 526
584static struct resource yl_9200_s1dfb_resource[] = { 527static struct resource yl9200_s1dfb_resource[] = {
585 [0] = { /* video mem */ 528 [0] = { /* video mem */
586 .name = "s1d13xxxfb memory", 529 .name = "s1d13xxxfb memory",
587 /* .name = "s1d13806 memory",*/ 530 .start = AT91_FB_VMEM_BASE,
588 .start = AT91_FB_VMEM_BASE, 531 .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
589 .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1, 532 .flags = IORESOURCE_MEM,
590 .flags = IORESOURCE_MEM,
591 }, 533 },
592 [1] = { /* video registers */ 534 [1] = { /* video registers */
593 .name = "s1d13xxxfb registers", 535 .name = "s1d13xxxfb registers",
594 /* .name = "s1d13806 registers",*/ 536 .start = AT91_FB_REG_BASE,
595 .start = AT91_FB_REG_BASE, 537 .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
596 .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1, 538 .flags = IORESOURCE_MEM,
597 .flags = IORESOURCE_MEM,
598 }, 539 },
599}; 540};
600 541
601static struct platform_device yl_9200_s1dfb_device = { 542static struct platform_device yl9200_s1dfb_device = {
602 /*TODO S.Birtles , really we need the chip revision in here as well*/ 543 .name = "s1d13806fb",
603 .name = "s1d13806fb", 544 .id = -1,
604 /* .name = "s1d13506fb",*/ 545 .dev = {
605 .id = -1,
606 .dev = {
607 /*TODO theres a waring here!!*/
608 /*WARNING: vmlinux.o(.data+0x2dbc): Section mismatch: reference to .init.text: (between 'yl_9200_s1dfb_pdata' and 's1dfb_dmamask')*/
609 .dma_mask = &s1dfb_dmamask, 546 .dma_mask = &s1dfb_dmamask,
610 .coherent_dma_mask = 0xffffffff, 547 .coherent_dma_mask = DMA_BIT_MASK(32),
611 .platform_data = &yl_9200_s1dfb_pdata, 548 .platform_data = &yl9200_s1dfb_pdata,
612 }, 549 },
613 .resource = yl_9200_s1dfb_resource, 550 .resource = yl9200_s1dfb_resource,
614 .num_resources = ARRAY_SIZE(yl_9200_s1dfb_resource), 551 .num_resources = ARRAY_SIZE(yl9200_s1dfb_resource),
615}; 552};
616 553
617void __init yl_9200_add_device_video(void) 554void __init yl9200_add_device_video(void)
618{ 555{
619 platform_device_register(&yl_9200_s1dfb_device); 556 platform_device_register(&yl9200_s1dfb_device);
620} 557}
621#else 558#else
622 void __init yl_9200_add_device_video(void) {} 559void __init yl9200_add_device_video(void) {}
623#endif 560#endif
624 561
625/*this is not called first , yl_9200_map_io is called first*/ 562
626static void __init yl_9200_board_init(void) 563static void __init yl9200_board_init(void)
627{ 564{
628 /* Serial */ 565 /* Serial */
629 at91_add_device_serial(); 566 at91_add_device_serial();
630 /* Ethernet */ 567 /* Ethernet */
631 at91_add_device_eth(&yl_9200_eth_data); 568 at91_add_device_eth(&yl9200_eth_data);
632 /* USB Host */ 569 /* USB Host */
633 at91_add_device_usbh(&yl_9200_usbh_data); 570 at91_add_device_usbh(&yl9200_usbh_data);
634 /* USB Device */ 571 /* USB Device */
635 at91_add_device_udc(&yl_9200_udc_data); 572 at91_add_device_udc(&yl9200_udc_data);
636 /* pullup_pin it is actually active low, but this is not needed, driver sets it up */
637 /*at91_set_multi_drive(yl_9200_udc_data.pullup_pin, 0);*/
638
639 /* Compact Flash */
640 /*at91_add_device_cf(&yl_9200_cf_data);*/
641
642 /* I2C */ 573 /* I2C */
643 at91_add_device_i2c(yl_9200_i2c_devices, ARRAY_SIZE(yl_9200_i2c_devices)); 574 at91_add_device_i2c(yl9200_i2c_devices, ARRAY_SIZE(yl9200_i2c_devices));
644 /* SPI */ 575 /* MMC */
645 /*TODO YL9200 we have 2 spi interfaces touch screen & CAN*/ 576 at91_add_device_mmc(0, &yl9200_mmc_data);
646 /* AT91_PIN_PA5, AT91_PIN_PA6 , are used on the max 485 NOT SPI*/
647
648 /*touch screen and CAN*/
649 at91_add_device_spi(yl_9200_spi_devices, ARRAY_SIZE(yl_9200_spi_devices));
650
651 /*Basically the TS uses PB11 & PB10 , PB11 is configured by the SPI system BP10 IS NOT USED!!*/
652 /* we need this incase the board is running without a touch screen*/
653 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
654 at91_init_device_ts(); /*init the touch screen device*/
655 #endif
656 /* DataFlash card */
657 at91_add_device_mmc(0, &yl_9200_mmc_data);
658 /* NAND */ 577 /* NAND */
659 at91_add_device_nand(&yl_9200_nand_data); 578 at91_add_device_nand(&yl9200_nand_data);
660 /* NOR Flash */ 579 /* NOR Flash */
661 platform_device_register(&yl_9200_flash); 580 platform_device_register(&yl9200_flash);
662 /* LEDs. Note!! this does not include the led's we passed for the processor status */ 581#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
663 at91_gpio_leds(yl_9200_leds, ARRAY_SIZE(yl_9200_leds)); 582 /* SPI */
664 /* VGA */ 583 at91_add_device_spi(yl9200_spi_devices, ARRAY_SIZE(yl9200_spi_devices));
665 /*this is self registered by including the s1d13xxx chip in the kernel build*/ 584 /* Touchscreen */
666 yl_9200_add_device_video(); 585 yl9200_add_device_ts();
586#endif
587 /* LEDs. */
588 at91_gpio_leds(yl9200_leds, ARRAY_SIZE(yl9200_leds));
667 /* Push Buttons */ 589 /* Push Buttons */
668 yl_9200_add_device_buttons(); 590 yl9200_add_device_buttons();
669 /*TODO fixup the Sounder */ 591 /* VGA */
670// yl_9200_add_device_sounder(yl_9200_sounder,ARRAY_SIZE(yl_9200_sounder)); 592 yl9200_add_device_video();
671
672} 593}
673 594
674MACHINE_START(YL9200, "uCdragon YL-9200") 595MACHINE_START(YL9200, "uCdragon YL-9200")
675 /* Maintainer: S.Birtles*/ 596 /* Maintainer: S.Birtles */
676 .phys_io = AT91_BASE_SYS, 597 .phys_io = AT91_BASE_SYS,
677 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, 598 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
678 .boot_params = AT91_SDRAM_BASE + 0x100, 599 .boot_params = AT91_SDRAM_BASE + 0x100,
679 .timer = &at91rm9200_timer, 600 .timer = &at91rm9200_timer,
680 .map_io = yl_9200_map_io, 601 .map_io = yl9200_map_io,
681 .init_irq = yl_9200_init_irq, 602 .init_irq = yl9200_init_irq,
682 .init_machine = yl_9200_board_init, 603 .init_machine = yl9200_board_init,
683MACHINE_END 604MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a33dfe450726..464bdbbf74df 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -112,12 +112,34 @@ static void pmc_sys_mode(struct clk *clk, int is_on)
112 at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask); 112 at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
113} 113}
114 114
115static void pmc_uckr_mode(struct clk *clk, int is_on)
116{
117 unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
118
119 if (is_on) {
120 is_on = AT91_PMC_LOCKU;
121 at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
122 } else
123 at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
124
125 do {
126 cpu_relax();
127 } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
128}
129
115/* USB function clocks (PLLB must be 48 MHz) */ 130/* USB function clocks (PLLB must be 48 MHz) */
116static struct clk udpck = { 131static struct clk udpck = {
117 .name = "udpck", 132 .name = "udpck",
118 .parent = &pllb, 133 .parent = &pllb,
119 .mode = pmc_sys_mode, 134 .mode = pmc_sys_mode,
120}; 135};
136static struct clk utmi_clk = {
137 .name = "utmi_clk",
138 .parent = &main_clk,
139 .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
140 .mode = pmc_uckr_mode,
141 .type = CLK_TYPE_PLL,
142};
121static struct clk uhpck = { 143static struct clk uhpck = {
122 .name = "uhpck", 144 .name = "uhpck",
123 .parent = &pllb, 145 .parent = &pllb,
@@ -361,7 +383,7 @@ static void __init init_programmable_clock(struct clk *clk)
361 383
362static int at91_clk_show(struct seq_file *s, void *unused) 384static int at91_clk_show(struct seq_file *s, void *unused)
363{ 385{
364 u32 scsr, pcsr, sr; 386 u32 scsr, pcsr, uckr = 0, sr;
365 struct clk *clk; 387 struct clk *clk;
366 388
367 seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR)); 389 seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
@@ -369,7 +391,10 @@ static int at91_clk_show(struct seq_file *s, void *unused)
369 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR)); 391 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
370 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR)); 392 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
371 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR)); 393 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
372 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); 394 if (!cpu_is_at91sam9rl())
395 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
396 if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
397 seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
373 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); 398 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
374 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); 399 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
375 400
@@ -382,6 +407,8 @@ static int at91_clk_show(struct seq_file *s, void *unused)
382 state = (scsr & clk->pmc_mask) ? "on" : "off"; 407 state = (scsr & clk->pmc_mask) ? "on" : "off";
383 else if (clk->mode == pmc_periph_mode) 408 else if (clk->mode == pmc_periph_mode)
384 state = (pcsr & clk->pmc_mask) ? "on" : "off"; 409 state = (pcsr & clk->pmc_mask) ? "on" : "off";
410 else if (clk->mode == pmc_uckr_mode)
411 state = (uckr & clk->pmc_mask) ? "on" : "off";
385 else if (clk->pmc_mask) 412 else if (clk->pmc_mask)
386 state = (sr & clk->pmc_mask) ? "on" : "off"; 413 state = (sr & clk->pmc_mask) ? "on" : "off";
387 else if (clk == &clk32k || clk == &main_clk) 414 else if (clk == &clk32k || clk == &main_clk)
@@ -488,14 +515,19 @@ static unsigned __init at91_pll_calc(unsigned main_freq, unsigned out_freq)
488 /* 515 /*
489 * PLL input between 1MHz and 32MHz per spec, but lower 516 * PLL input between 1MHz and 32MHz per spec, but lower
490 * frequences seem necessary in some cases so allow 100K. 517 * frequences seem necessary in some cases so allow 100K.
518 * Warning: some newer products need 2MHz min.
491 */ 519 */
492 input = main_freq / i; 520 input = main_freq / i;
521 if (cpu_is_at91sam9g20() && input < 2000000)
522 continue;
493 if (input < 100000) 523 if (input < 100000)
494 continue; 524 continue;
495 if (input > 32000000) 525 if (input > 32000000)
496 continue; 526 continue;
497 527
498 mul1 = out_freq / input; 528 mul1 = out_freq / input;
529 if (cpu_is_at91sam9g20() && mul > 63)
530 continue;
499 if (mul1 > 2048) 531 if (mul1 > 2048)
500 continue; 532 continue;
501 if (mul1 < 2) 533 if (mul1 < 2)
@@ -555,7 +587,8 @@ int __init at91_clock_init(unsigned long main_clock)
555 587
556 /* report if PLLA is more than mildly overclocked */ 588 /* report if PLLA is more than mildly overclocked */
557 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR)); 589 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
558 if (plla.rate_hz > 209000000) 590 if ((!cpu_is_at91sam9g20() && plla.rate_hz > 209000000)
591 || (cpu_is_at91sam9g20() && plla.rate_hz > 800000000))
559 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000); 592 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
560 593
561 /* 594 /*
@@ -570,7 +603,7 @@ int __init at91_clock_init(unsigned long main_clock)
570 uhpck.pmc_mask = AT91RM9200_PMC_UHP; 603 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
571 udpck.pmc_mask = AT91RM9200_PMC_UDP; 604 udpck.pmc_mask = AT91RM9200_PMC_UDP;
572 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); 605 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
573 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { 606 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
574 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 607 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
575 udpck.pmc_mask = AT91SAM926x_PMC_UDP; 608 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
576 } else if (cpu_is_at91cap9()) { 609 } else if (cpu_is_at91cap9()) {
@@ -582,6 +615,17 @@ int __init at91_clock_init(unsigned long main_clock)
582 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); 615 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
583 616
584 /* 617 /*
618 * USB HS clock init
619 */
620 if (cpu_is_at91cap9() || cpu_is_at91sam9rl()) {
621 /*
622 * multiplier is hard-wired to 40
623 * (obtain the USB High Speed 480 MHz when input is 12 MHz)
624 */
625 utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
626 }
627
628 /*
585 * MCK and CPU derive from one of those primary clocks. 629 * MCK and CPU derive from one of those primary clocks.
586 * For now, assume this parentage won't change. 630 * For now, assume this parentage won't change.
587 */ 631 */
@@ -591,13 +635,21 @@ int __init at91_clock_init(unsigned long main_clock)
591 freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */ 635 freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */
592 if (cpu_is_at91rm9200()) 636 if (cpu_is_at91rm9200())
593 mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ 637 mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
594 else 638 else if (cpu_is_at91sam9g20()) {
595 mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ 639 mck.rate_hz = (mckr & AT91_PMC_MDIV) ?
640 freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
641 if (mckr & AT91_PMC_PDIV)
642 freq /= 2; /* processor clock division */
643 } else
644 mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
596 645
597 /* Register the PMC's standard clocks */ 646 /* Register the PMC's standard clocks */
598 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) 647 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
599 list_add_tail(&standard_pmc_clocks[i]->node, &clocks); 648 list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
600 649
650 if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
651 list_add_tail(&utmi_clk.node, &clocks);
652
601 /* MCK and CPU clock are "always on" */ 653 /* MCK and CPU clock are "always on" */
602 clk_enable(&mck); 654 clk_enable(&mck);
603 655
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index aa863c157708..8ab4feb1ec5b 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -202,7 +202,7 @@ static int at91_pm_verify_clocks(void)
202 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 202 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
203 return 0; 203 return 0;
204 } 204 }
205 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { 205 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
206 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { 206 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
207 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 207 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
208 return 0; 208 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 07:37:49 -0500