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-rw-r--r--arch/arm/mach-at91/Kconfig15
-rw-r--r--arch/arm/mach-at91/Makefile13
-rw-r--r--arch/arm/mach-at91/at91cap9.c8
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c36
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c9
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c38
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c17
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c17
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c11
-rw-r--r--arch/arm/mach-at91/board-cam60.c30
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c77
-rw-r--r--arch/arm/mach-at91/board-neocore926.c397
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c35
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c35
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c37
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c80
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c36
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c36
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c32
-rw-r--r--arch/arm/mach-at91/board-usb-a9260.c35
-rw-r--r--arch/arm/mach-at91/board-usb-a9263.c36
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h7
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h4
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h15
-rw-r--r--arch/arm/mach-at91/include/mach/dma.h19
-rw-r--r--arch/arm/mach-at91/include/mach/io.h4
-rw-r--r--arch/arm/mach-at91/include/mach/memory.h11
-rw-r--r--arch/arm/mach-at91/sam9_smc.c47
-rw-r--r--arch/arm/mach-at91/sam9_smc.h33
29 files changed, 967 insertions, 203 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5aafb2e2ca7a..323b47f2b52f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -7,36 +7,43 @@ choice
7 7
8config ARCH_AT91RM9200 8config ARCH_AT91RM9200
9 bool "AT91RM9200" 9 bool "AT91RM9200"
10 select CPU_ARM920T
10 select GENERIC_TIME 11 select GENERIC_TIME
11 select GENERIC_CLOCKEVENTS 12 select GENERIC_CLOCKEVENTS
12 13
13config ARCH_AT91SAM9260 14config ARCH_AT91SAM9260
14 bool "AT91SAM9260 or AT91SAM9XE" 15 bool "AT91SAM9260 or AT91SAM9XE"
16 select CPU_ARM926T
15 select GENERIC_TIME 17 select GENERIC_TIME
16 select GENERIC_CLOCKEVENTS 18 select GENERIC_CLOCKEVENTS
17 19
18config ARCH_AT91SAM9261 20config ARCH_AT91SAM9261
19 bool "AT91SAM9261" 21 bool "AT91SAM9261"
22 select CPU_ARM926T
20 select GENERIC_TIME 23 select GENERIC_TIME
21 select GENERIC_CLOCKEVENTS 24 select GENERIC_CLOCKEVENTS
22 25
23config ARCH_AT91SAM9263 26config ARCH_AT91SAM9263
24 bool "AT91SAM9263" 27 bool "AT91SAM9263"
28 select CPU_ARM926T
25 select GENERIC_TIME 29 select GENERIC_TIME
26 select GENERIC_CLOCKEVENTS 30 select GENERIC_CLOCKEVENTS
27 31
28config ARCH_AT91SAM9RL 32config ARCH_AT91SAM9RL
29 bool "AT91SAM9RL" 33 bool "AT91SAM9RL"
34 select CPU_ARM926T
30 select GENERIC_TIME 35 select GENERIC_TIME
31 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
32 37
33config ARCH_AT91SAM9G20 38config ARCH_AT91SAM9G20
34 bool "AT91SAM9G20" 39 bool "AT91SAM9G20"
40 select CPU_ARM926T
35 select GENERIC_TIME 41 select GENERIC_TIME
36 select GENERIC_CLOCKEVENTS 42 select GENERIC_CLOCKEVENTS
37 43
38config ARCH_AT91CAP9 44config ARCH_AT91CAP9
39 bool "AT91CAP9" 45 bool "AT91CAP9"
46 select CPU_ARM926T
40 select GENERIC_TIME 47 select GENERIC_TIME
41 select GENERIC_CLOCKEVENTS 48 select GENERIC_CLOCKEVENTS
42 49
@@ -235,6 +242,12 @@ config MACH_USB_A9263
235 Select this if you are using a Calao Systems USB-A9263. 242 Select this if you are using a Calao Systems USB-A9263.
236 <http://www.calao-systems.com> 243 <http://www.calao-systems.com>
237 244
245config MACH_NEOCORE926
246 bool "Adeneo NEOCORE926"
247 depends on ARCH_AT91SAM9263
248 help
249 Select this if you are using the Adeneo Neocore 926 board.
250
238endif 251endif
239 252
240# ---------------------------------------------------------- 253# ----------------------------------------------------------
@@ -302,7 +315,7 @@ comment "AT91 Board Options"
302 315
303config MTD_AT91_DATAFLASH_CARD 316config MTD_AT91_DATAFLASH_CARD
304 bool "Enable DataFlash Card support" 317 bool "Enable DataFlash Card support"
305 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK) 318 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_NEOCORE926)
306 help 319 help
307 Enable support for the DataFlash card. 320 Enable support for the DataFlash card.
308 321
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index cca612d97ca2..c69ff237fd14 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o 16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o 17obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
18obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 18obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
19obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o 19obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
20obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 20obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
21 21
22# AT91RM9200 board-specific support 22# AT91RM9200 board-specific support
@@ -47,6 +47,7 @@ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
47# AT91SAM9263 board-specific support 47# AT91SAM9263 board-specific support
48obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o 48obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
49obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o 49obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
50obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o
50 51
51# AT91SAM9RL board-specific support 52# AT91SAM9RL board-specific support
52obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o 53obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 0fc0adaebd58..0a38c69fdbc4 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -17,6 +17,8 @@
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20
21#include <mach/cpu.h>
20#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
21#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
@@ -317,6 +319,12 @@ void __init at91cap9_initialize(unsigned long main_clock)
317 319
318 /* Register GPIO subsystem */ 320 /* Register GPIO subsystem */
319 at91_gpio_init(at91cap9_gpio, 4); 321 at91_gpio_init(at91cap9_gpio, 4);
322
323 /* Remember the silicon revision */
324 if (cpu_is_at91cap9_revB())
325 system_rev = 0xB;
326 else if (cpu_is_at91cap9_revC())
327 system_rev = 0xC;
320} 328}
321 329
322/* -------------------------------------------------------------------- 330/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 5ebd4273d353..9eca2209cde6 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -13,6 +13,7 @@
13 */ 13 */
14#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
15#include <asm/mach/map.h> 15#include <asm/mach/map.h>
16#include <asm/mach/irq.h>
16 17
17#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
@@ -21,6 +22,7 @@
21#include <video/atmel_lcdc.h> 22#include <video/atmel_lcdc.h>
22 23
23#include <mach/board.h> 24#include <mach/board.h>
25#include <mach/cpu.h>
24#include <mach/gpio.h> 26#include <mach/gpio.h>
25#include <mach/at91cap9.h> 27#include <mach/at91cap9.h>
26#include <mach/at91cap9_matrix.h> 28#include <mach/at91cap9_matrix.h>
@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
69 if (!data) 71 if (!data)
70 return; 72 return;
71 73
74 if (cpu_is_at91cap9_revB())
75 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
76
72 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
74 if (data->vbus_pin[i]) 79 if (data->vbus_pin[i])
@@ -151,8 +156,13 @@ static struct platform_device at91_usba_udc_device = {
151 156
152void __init at91_add_device_usba(struct usba_platform_data *data) 157void __init at91_add_device_usba(struct usba_platform_data *data)
153{ 158{
154 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | 159 if (cpu_is_at91cap9_revB()) {
155 AT91_MATRIX_UDPHS_BYPASS_LOCK); 160 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
161 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
162 AT91_MATRIX_UDPHS_BYPASS_LOCK);
163 }
164 else
165 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
156 166
157 /* 167 /*
158 * Invalid pins are 0 on AT91, but the usba driver is shared 168 * Invalid pins are 0 on AT91, but the usba driver is shared
@@ -406,28 +416,13 @@ static struct platform_device at91cap9_nand_device = {
406 416
407void __init at91_add_device_nand(struct atmel_nand_data *data) 417void __init at91_add_device_nand(struct atmel_nand_data *data)
408{ 418{
409 unsigned long csa, mode; 419 unsigned long csa;
410 420
411 if (!data) 421 if (!data)
412 return; 422 return;
413 423
414 csa = at91_sys_read(AT91_MATRIX_EBICSA); 424 csa = at91_sys_read(AT91_MATRIX_EBICSA);
415 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
416
417 /* set the bus interface characteristics */
418 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
419 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
420
421 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
422 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
423
424 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
425
426 if (data->bus_width_16)
427 mode = AT91_SMC_DBW_16;
428 else
429 mode = AT91_SMC_DBW_8;
430 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
431 426
432 /* enable pin */ 427 /* enable pin */
433 if (data->enable_pin) 428 if (data->enable_pin)
@@ -865,6 +860,9 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
865 if (!data) 860 if (!data)
866 return; 861 return;
867 862
863 if (cpu_is_at91cap9_revB())
864 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
865
868 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ 866 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
869 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ 867 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
870 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ 868 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index a72e798a2a40..d140eae53ded 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -141,6 +141,15 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
141 /* Use "raw" primitives so we behave correctly on RT kernels. */ 141 /* Use "raw" primitives so we behave correctly on RT kernels. */
142 raw_local_irq_save(flags); 142 raw_local_irq_save(flags);
143 143
144 /*
145 * According to Thomas Gleixner irqs are already disabled here. Simply
146 * removing raw_local_irq_save above (and the matching
147 * raw_local_irq_restore) was not accepted. See
148 * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
149 * So for now (2008-11-20) just warn once if irqs were not disabled ...
150 */
151 WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
152
144 /* The alarm IRQ uses absolute time (now+delta), not the relative 153 /* The alarm IRQ uses absolute time (now+delta), not the relative
145 * time (delta) in our calling convention. Like all clockevents 154 * time (delta) in our calling convention. Like all clockevents
146 * using such "match" hardware, we have a race to defend against. 155 * using such "match" hardware, we have a race to defend against.
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7774d17dde74..fdde1ea21b07 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -313,7 +313,7 @@ static struct platform_device at91sam9260_nand_device = {
313 313
314void __init at91_add_device_nand(struct atmel_nand_data *data) 314void __init at91_add_device_nand(struct atmel_nand_data *data)
315{ 315{
316 unsigned long csa, mode; 316 unsigned long csa;
317 317
318 if (!data) 318 if (!data)
319 return; 319 return;
@@ -321,42 +321,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
321 csa = at91_sys_read(AT91_MATRIX_EBICSA); 321 csa = at91_sys_read(AT91_MATRIX_EBICSA);
322 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 322 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
323 323
324 if (cpu_is_at91sam9260()) {
325 /* Timing for sam9260 */
326 /* set the bus interface characteristics */
327 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
328 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
329
330 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
331 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
332
333 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
334
335 if (data->bus_width_16)
336 mode = AT91_SMC_DBW_16;
337 else
338 mode = AT91_SMC_DBW_8;
339 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
340 }
341
342 if (cpu_is_at91sam9g20()) {
343 /* Timing for sam9g20 */
344 /* set the bus interface characteristics */
345 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
346 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
347
348 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
349 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
350
351 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
352
353 if (data->bus_width_16)
354 mode = AT91_SMC_DBW_16;
355 else
356 mode = AT91_SMC_DBW_8;
357 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
358 }
359
360 /* enable pin */ 324 /* enable pin */
361 if (data->enable_pin) 325 if (data->enable_pin)
362 at91_set_gpio_output(data->enable_pin, 1); 326 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 6b89172310c7..17289756f80f 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -223,7 +223,7 @@ static struct platform_device atmel_nand_device = {
223 223
224void __init at91_add_device_nand(struct atmel_nand_data *data) 224void __init at91_add_device_nand(struct atmel_nand_data *data)
225{ 225{
226 unsigned long csa, mode; 226 unsigned long csa;
227 227
228 if (!data) 228 if (!data)
229 return; 229 return;
@@ -231,21 +231,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
231 csa = at91_sys_read(AT91_MATRIX_EBICSA); 231 csa = at91_sys_read(AT91_MATRIX_EBICSA);
232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 232 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
233 233
234 /* set the bus interface characteristics */
235 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
236 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
237
238 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
239 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
240
241 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
242
243 if (data->bus_width_16)
244 mode = AT91_SMC_DBW_16;
245 else
246 mode = AT91_SMC_DBW_8;
247 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
248
249 /* enable pin */ 234 /* enable pin */
250 if (data->enable_pin) 235 if (data->enable_pin)
251 at91_set_gpio_output(data->enable_pin, 1); 236 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8b884083f76d..b753cb879d8e 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -382,7 +382,7 @@ static struct platform_device at91sam9263_nand_device = {
382 382
383void __init at91_add_device_nand(struct atmel_nand_data *data) 383void __init at91_add_device_nand(struct atmel_nand_data *data)
384{ 384{
385 unsigned long csa, mode; 385 unsigned long csa;
386 386
387 if (!data) 387 if (!data)
388 return; 388 return;
@@ -390,21 +390,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
390 csa = at91_sys_read(AT91_MATRIX_EBI0CSA); 390 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 391 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
392 392
393 /* set the bus interface characteristics */
394 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
395 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
396
397 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
398 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
399
400 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
401
402 if (data->bus_width_16)
403 mode = AT91_SMC_DBW_16;
404 else
405 mode = AT91_SMC_DBW_8;
406 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
407
408 /* enable pin */ 393 /* enable pin */
409 if (data->enable_pin) 394 if (data->enable_pin)
410 at91_set_gpio_output(data->enable_pin, 1); 395 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 87deb1e1b529..145324f4ec56 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -232,17 +232,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
232 csa = at91_sys_read(AT91_MATRIX_EBICSA); 232 csa = at91_sys_read(AT91_MATRIX_EBICSA);
233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
234 234
235 /* set the bus interface characteristics */
236 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
237 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
238
239 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
240 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
241
242 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
243
244 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
245
246 /* enable pin */ 235 /* enable pin */
247 if (data->enable_pin) 236 if (data->enable_pin)
248 at91_set_gpio_output(data->enable_pin, 1); 237 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index cdddca54b938..d3ba29c5d8c8 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -39,7 +39,9 @@
39 39
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/gpio.h> 41#include <mach/gpio.h>
42#include <mach/at91sam9_smc.h>
42 43
44#include "sam9_smc.h"
43#include "generic.h" 45#include "generic.h"
44 46
45 47
@@ -151,6 +153,32 @@ static struct atmel_nand_data __initdata cam60_nand_data = {
151 .partition_info = nand_partitions, 153 .partition_info = nand_partitions,
152}; 154};
153 155
156static struct sam9_smc_config __initdata cam60_nand_smc_config = {
157 .ncs_read_setup = 0,
158 .nrd_setup = 1,
159 .ncs_write_setup = 0,
160 .nwe_setup = 1,
161
162 .ncs_read_pulse = 3,
163 .nrd_pulse = 3,
164 .ncs_write_pulse = 3,
165 .nwe_pulse = 3,
166
167 .read_cycle = 5,
168 .write_cycle = 5,
169
170 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
171 .tdf_cycles = 2,
172};
173
174static void __init cam60_add_device_nand(void)
175{
176 /* configure chip-select 3 (NAND) */
177 sam9_smc_configure(3, &cam60_nand_smc_config);
178
179 at91_add_device_nand(&cam60_nand_data);
180}
181
154 182
155static void __init cam60_board_init(void) 183static void __init cam60_board_init(void)
156{ 184{
@@ -165,7 +193,7 @@ static void __init cam60_board_init(void)
165 at91_set_gpio_output(AT91_PIN_PB18, 1); 193 at91_set_gpio_output(AT91_PIN_PB18, 1);
166 at91_add_device_usbh(&cam60_usbh_data); 194 at91_add_device_usbh(&cam60_usbh_data);
167 /* NAND */ 195 /* NAND */
168 at91_add_device_nand(&cam60_nand_data); 196 cam60_add_device_nand();
169} 197}
170 198
171MACHINE_START(CAM60, "KwikByte CAM60") 199MACHINE_START(CAM60, "KwikByte CAM60")
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 201b89392dcc..83a1a0fef47b 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -36,17 +36,16 @@
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/setup.h> 37#include <asm/setup.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/irq.h>
40 39
41#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 41#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44 42
45#include <mach/board.h> 43#include <mach/board.h>
46#include <mach/gpio.h> 44#include <mach/gpio.h>
47#include <mach/at91cap9_matrix.h> 45#include <mach/at91cap9_matrix.h>
48#include <mach/at91sam9_smc.h> 46#include <mach/at91sam9_smc.h>
49 47
48#include "sam9_smc.h"
50#include "generic.h" 49#include "generic.h"
51 50
52 51
@@ -195,6 +194,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
195#endif 194#endif
196}; 195};
197 196
197static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
198 .ncs_read_setup = 1,
199 .nrd_setup = 2,
200 .ncs_write_setup = 1,
201 .nwe_setup = 2,
202
203 .ncs_read_pulse = 6,
204 .nrd_pulse = 4,
205 .ncs_write_pulse = 6,
206 .nwe_pulse = 4,
207
208 .read_cycle = 8,
209 .write_cycle = 8,
210
211 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
212 .tdf_cycles = 1,
213};
214
215static void __init cap9adk_add_device_nand(void)
216{
217 unsigned long csa;
218
219 csa = at91_sys_read(AT91_MATRIX_EBICSA);
220 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
221
222 /* setup bus-width (8 or 16) */
223 if (cap9adk_nand_data.bus_width_16)
224 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
225 else
226 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
227
228 /* configure chip-select 3 (NAND) */
229 sam9_smc_configure(3, &cap9adk_nand_smc_config);
230
231 at91_add_device_nand(&cap9adk_nand_data);
232}
233
198 234
199/* 235/*
200 * NOR flash 236 * NOR flash
@@ -234,6 +270,24 @@ static struct platform_device cap9adk_nor_flash = {
234 .num_resources = ARRAY_SIZE(nor_flash_resources), 270 .num_resources = ARRAY_SIZE(nor_flash_resources),
235}; 271};
236 272
273static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
274 .ncs_read_setup = 2,
275 .nrd_setup = 4,
276 .ncs_write_setup = 2,
277 .nwe_setup = 4,
278
279 .ncs_read_pulse = 10,
280 .nrd_pulse = 8,
281 .ncs_write_pulse = 10,
282 .nwe_pulse = 8,
283
284 .read_cycle = 16,
285 .write_cycle = 16,
286
287 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
288 .tdf_cycles = 1,
289};
290
237static __init void cap9adk_add_device_nor(void) 291static __init void cap9adk_add_device_nor(void)
238{ 292{
239 unsigned long csa; 293 unsigned long csa;
@@ -241,18 +295,8 @@ static __init void cap9adk_add_device_nor(void)
241 csa = at91_sys_read(AT91_MATRIX_EBICSA); 295 csa = at91_sys_read(AT91_MATRIX_EBICSA);
242 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 296 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
243 297
244 /* set the bus interface characteristics */ 298 /* configure chip-select 0 (NOR) */
245 at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) 299 sam9_smc_configure(0, &cap9adk_nor_smc_config);
246 | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
247
248 at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
249 | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
250
251 at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
252
253 at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
254 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
255 | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
256 300
257 platform_device_register(&cap9adk_nor_flash); 301 platform_device_register(&cap9adk_nor_flash);
258} 302}
@@ -330,10 +374,8 @@ static void __init cap9adk_board_init(void)
330 /* Serial */ 374 /* Serial */
331 at91_add_device_serial(); 375 at91_add_device_serial();
332 /* USB Host */ 376 /* USB Host */
333 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
334 at91_add_device_usbh(&cap9adk_usbh_data); 377 at91_add_device_usbh(&cap9adk_usbh_data);
335 /* USB HS */ 378 /* USB HS */
336 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
337 at91_add_device_usba(&cap9adk_usba_udc_data); 379 at91_add_device_usba(&cap9adk_usba_udc_data);
338 /* SPI */ 380 /* SPI */
339 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); 381 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -344,13 +386,12 @@ static void __init cap9adk_board_init(void)
344 /* Ethernet */ 386 /* Ethernet */
345 at91_add_device_eth(&cap9adk_macb_data); 387 at91_add_device_eth(&cap9adk_macb_data);
346 /* NAND */ 388 /* NAND */
347 at91_add_device_nand(&cap9adk_nand_data); 389 cap9adk_add_device_nand();
348 /* NOR Flash */ 390 /* NOR Flash */
349 cap9adk_add_device_nor(); 391 cap9adk_add_device_nor();
350 /* I2C */ 392 /* I2C */
351 at91_add_device_i2c(NULL, 0); 393 at91_add_device_i2c(NULL, 0);
352 /* LCD Controller */ 394 /* LCD Controller */
353 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
354 at91_add_device_lcdc(&cap9adk_lcdc_data); 395 at91_add_device_lcdc(&cap9adk_lcdc_data);
355 /* AC97 */ 396 /* AC97 */
356 at91_add_device_ac97(&cap9adk_ac97_data); 397 at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
new file mode 100644
index 000000000000..9ba7ba2cc3b1
--- /dev/null
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -0,0 +1,397 @@
1/*
2 * linux/arch/arm/mach-at91/board-neocore926.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation
6 * Copyright (C) 2008 ADENEO.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h>
30#include <linux/fb.h>
31#include <linux/gpio_keys.h>
32#include <linux/input.h>
33
34#include <video/atmel_lcdc.h>
35
36#include <asm/setup.h>
37#include <asm/mach-types.h>
38#include <asm/irq.h>
39#include <asm/sizes.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44
45#include <mach/hardware.h>
46#include <mach/board.h>
47#include <mach/gpio.h>
48#include <mach/at91sam9_smc.h>
49
50#include "sam9_smc.h"
51#include "generic.h"
52
53
54static void __init neocore926_map_io(void)
55{
56 /* Initialize processor: 20 MHz crystal */
57 at91sam9263_initialize(20000000);
58
59 /* DGBU on ttyS0. (Rx & Tx only) */
60 at91_register_uart(0, 0, 0);
61
62 /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
63 at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
64
65 /* set serial console to ttyS0 (ie, DBGU) */
66 at91_set_serial_console(0);
67}
68
69static void __init neocore926_init_irq(void)
70{
71 at91sam9263_init_interrupts(NULL);
72}
73
74
75/*
76 * USB Host port
77 */
78static struct at91_usbh_data __initdata neocore926_usbh_data = {
79 .ports = 2,
80 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
81};
82
83/*
84 * USB Device port
85 */
86static struct at91_udc_data __initdata neocore926_udc_data = {
87 .vbus_pin = AT91_PIN_PA25,
88 .pullup_pin = 0, /* pull-up driven by UDC */
89};
90
91
92/*
93 * ADS7846 Touchscreen
94 */
95#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
96static int ads7843_pendown_state(void)
97{
98 return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
99}
100
101static struct ads7846_platform_data ads_info = {
102 .model = 7843,
103 .x_min = 150,
104 .x_max = 3830,
105 .y_min = 190,
106 .y_max = 3830,
107 .vref_delay_usecs = 100,
108 .x_plate_ohms = 450,
109 .y_plate_ohms = 250,
110 .pressure_max = 15000,
111 .debounce_max = 1,
112 .debounce_rep = 0,
113 .debounce_tol = (~0),
114 .get_pendown_state = ads7843_pendown_state,
115};
116
117static void __init neocore926_add_device_ts(void)
118{
119 at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
120 at91_set_gpio_input(AT91_PIN_PC13, 1); /* Touchscreen BUSY signal */
121}
122#else
123static void __init neocore926_add_device_ts(void) {}
124#endif
125
126/*
127 * SPI devices.
128 */
129static struct spi_board_info neocore926_spi_devices[] = {
130#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
131 { /* DataFlash card */
132 .modalias = "mtd_dataflash",
133 .chip_select = 0,
134 .max_speed_hz = 15 * 1000 * 1000,
135 .bus_num = 0,
136 },
137#endif
138#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
139 {
140 .modalias = "ads7846",
141 .chip_select = 1,
142 .max_speed_hz = 125000 * 16,
143 .bus_num = 0,
144 .platform_data = &ads_info,
145 .irq = AT91SAM9263_ID_IRQ1,
146 },
147#endif
148};
149
150
151/*
152 * MCI (SD/MMC)
153 */
154static struct at91_mmc_data __initdata neocore926_mmc_data = {
155 .wire4 = 1,
156 .det_pin = AT91_PIN_PE18,
157 .wp_pin = AT91_PIN_PE19,
158};
159
160
161/*
162 * MACB Ethernet device
163 */
164static struct at91_eth_data __initdata neocore926_macb_data = {
165 .phy_irq_pin = AT91_PIN_PE31,
166 .is_rmii = 1,
167};
168
169
170/*
171 * NAND flash
172 */
173static struct mtd_partition __initdata neocore926_nand_partition[] = {
174 {
175 .name = "Linux Kernel", /* "Partition 1", */
176 .offset = 0,
177 .size = SZ_8M,
178 },
179 {
180 .name = "Filesystem", /* "Partition 2", */
181 .offset = MTDPART_OFS_NXTBLK,
182 .size = SZ_32M,
183 },
184 {
185 .name = "Free", /* "Partition 3", */
186 .offset = MTDPART_OFS_NXTBLK,
187 .size = MTDPART_SIZ_FULL,
188 },
189};
190
191static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
192{
193 *num_partitions = ARRAY_SIZE(neocore926_nand_partition);
194 return neocore926_nand_partition;
195}
196
197static struct atmel_nand_data __initdata neocore926_nand_data = {
198 .ale = 21,
199 .cle = 22,
200 .rdy_pin = AT91_PIN_PB19,
201 .rdy_pin_active_low = 1,
202 .enable_pin = AT91_PIN_PD15,
203 .partition_info = nand_partitions,
204};
205
206static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
207 .ncs_read_setup = 0,
208 .nrd_setup = 1,
209 .ncs_write_setup = 0,
210 .nwe_setup = 1,
211
212 .ncs_read_pulse = 4,
213 .nrd_pulse = 4,
214 .ncs_write_pulse = 4,
215 .nwe_pulse = 4,
216
217 .read_cycle = 6,
218 .write_cycle = 6,
219
220 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
221 .tdf_cycles = 2,
222};
223
224static void __init neocore926_add_device_nand(void)
225{
226 /* configure chip-select 3 (NAND) */
227 sam9_smc_configure(3, &neocore926_nand_smc_config);
228
229 at91_add_device_nand(&neocore926_nand_data);
230}
231
232
233/*
234 * LCD Controller
235 */
236#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
237static struct fb_videomode at91_tft_vga_modes[] = {
238 {
239 .name = "TX09D50VM1CCA @ 60",
240 .refresh = 60,
241 .xres = 240, .yres = 320,
242 .pixclock = KHZ2PICOS(5000),
243
244 .left_margin = 1, .right_margin = 33,
245 .upper_margin = 1, .lower_margin = 0,
246 .hsync_len = 5, .vsync_len = 1,
247
248 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
249 .vmode = FB_VMODE_NONINTERLACED,
250 },
251};
252
253static struct fb_monspecs at91fb_default_monspecs = {
254 .manufacturer = "HIT",
255 .monitor = "TX09D70VM1CCA",
256
257 .modedb = at91_tft_vga_modes,
258 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
259 .hfmin = 15000,
260 .hfmax = 64000,
261 .vfmin = 50,
262 .vfmax = 150,
263};
264
265#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
266 | ATMEL_LCDC_DISTYPE_TFT \
267 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
268
269static void at91_lcdc_power_control(int on)
270{
271 at91_set_gpio_value(AT91_PIN_PA30, on);
272}
273
274/* Driver datas */
275static struct atmel_lcdfb_info __initdata neocore926_lcdc_data = {
276 .lcdcon_is_backlight = true,
277 .default_bpp = 16,
278 .default_dmacon = ATMEL_LCDC_DMAEN,
279 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
280 .default_monspecs = &at91fb_default_monspecs,
281 .atmel_lcdfb_power_control = at91_lcdc_power_control,
282 .guard_time = 1,
283 .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB555,
284};
285
286#else
287static struct atmel_lcdfb_info __initdata neocore926_lcdc_data;
288#endif
289
290
291/*
292 * GPIO Buttons
293 */
294#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
295static struct gpio_keys_button neocore926_buttons[] = {
296 { /* BP1, "leftclic" */
297 .code = BTN_LEFT,
298 .gpio = AT91_PIN_PC5,
299 .active_low = 1,
300 .desc = "left_click",
301 .wakeup = 1,
302 },
303 { /* BP2, "rightclic" */
304 .code = BTN_RIGHT,
305 .gpio = AT91_PIN_PC4,
306 .active_low = 1,
307 .desc = "right_click",
308 .wakeup = 1,
309 },
310};
311
312static struct gpio_keys_platform_data neocore926_button_data = {
313 .buttons = neocore926_buttons,
314 .nbuttons = ARRAY_SIZE(neocore926_buttons),
315};
316
317static struct platform_device neocore926_button_device = {
318 .name = "gpio-keys",
319 .id = -1,
320 .num_resources = 0,
321 .dev = {
322 .platform_data = &neocore926_button_data,
323 }
324};
325
326static void __init neocore926_add_device_buttons(void)
327{
328 at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */
329 at91_set_deglitch(AT91_PIN_PC5, 1);
330 at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */
331 at91_set_deglitch(AT91_PIN_PC4, 1);
332
333 platform_device_register(&neocore926_button_device);
334}
335#else
336static void __init neocore926_add_device_buttons(void) {}
337#endif
338
339
340/*
341 * AC97
342 */
343static struct atmel_ac97_data neocore926_ac97_data = {
344 .reset_pin = AT91_PIN_PA13,
345};
346
347
348static void __init neocore926_board_init(void)
349{
350 /* Serial */
351 at91_add_device_serial();
352
353 /* USB Host */
354 at91_add_device_usbh(&neocore926_usbh_data);
355
356 /* USB Device */
357 at91_add_device_udc(&neocore926_udc_data);
358
359 /* SPI */
360 at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
361 at91_add_device_spi(neocore926_spi_devices, ARRAY_SIZE(neocore926_spi_devices));
362
363 /* Touchscreen */
364 neocore926_add_device_ts();
365
366 /* MMC */
367 at91_add_device_mmc(1, &neocore926_mmc_data);
368
369 /* Ethernet */
370 at91_add_device_eth(&neocore926_macb_data);
371
372 /* NAND */
373 neocore926_add_device_nand();
374
375 /* I2C */
376 at91_add_device_i2c(NULL, 0);
377
378 /* LCD Controller */
379 at91_add_device_lcdc(&neocore926_lcdc_data);
380
381 /* Push Buttons */
382 neocore926_add_device_buttons();
383
384 /* AC97 */
385 at91_add_device_ac97(&neocore926_ac97_data);
386}
387
388MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
389 /* Maintainer: ADENEO */
390 .phys_io = AT91_BASE_SYS,
391 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
392 .boot_params = AT91_SDRAM_BASE + 0x100,
393 .timer = &at91sam926x_timer,
394 .map_io = neocore926_map_io,
395 .init_irq = neocore926_init_irq,
396 .init_machine = neocore926_board_init,
397MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index cfb4571a2e27..4cff9a7e61d2 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -41,8 +41,10 @@
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91sam9_smc.h>
44#include <mach/at91_shdwc.h> 45#include <mach/at91_shdwc.h>
45 46
47#include "sam9_smc.h"
46#include "generic.h" 48#include "generic.h"
47 49
48 50
@@ -147,13 +149,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
147 .rdy_pin = AT91_PIN_PC13, 149 .rdy_pin = AT91_PIN_PC13,
148 .enable_pin = AT91_PIN_PC14, 150 .enable_pin = AT91_PIN_PC14,
149 .partition_info = nand_partitions, 151 .partition_info = nand_partitions,
150#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
151 .bus_width_16 = 1,
152#else
153 .bus_width_16 = 0,
154#endif
155}; 152};
156 153
154static struct sam9_smc_config __initdata ek_nand_smc_config = {
155 .ncs_read_setup = 0,
156 .nrd_setup = 1,
157 .ncs_write_setup = 0,
158 .nwe_setup = 1,
159
160 .ncs_read_pulse = 3,
161 .nrd_pulse = 3,
162 .ncs_write_pulse = 3,
163 .nwe_pulse = 3,
164
165 .read_cycle = 5,
166 .write_cycle = 5,
167
168 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
169 .tdf_cycles = 2,
170};
171
172static void __init ek_add_device_nand(void)
173{
174 /* configure chip-select 3 (NAND) */
175 sam9_smc_configure(3, &ek_nand_smc_config);
176
177 at91_add_device_nand(&ek_nand_data);
178}
179
157/* 180/*
158 * MCI (SD/MMC) 181 * MCI (SD/MMC)
159 */ 182 */
@@ -227,7 +250,7 @@ static void __init ek_board_init(void)
227 /* SPI */ 250 /* SPI */
228 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 251 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
229 /* NAND */ 252 /* NAND */
230 at91_add_device_nand(&ek_nand_data); 253 ek_add_device_nand();
231 /* I2C */ 254 /* I2C */
232 at91_add_device_i2c(NULL, 0); 255 at91_add_device_i2c(NULL, 0);
233 /* Ethernet */ 256 /* Ethernet */
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 99bb4cc23a09..b48346977534 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -38,7 +38,9 @@
38 38
39#include <mach/board.h> 39#include <mach/board.h>
40#include <mach/gpio.h> 40#include <mach/gpio.h>
41#include <mach/at91sam9_smc.h>
41 42
43#include "sam9_smc.h"
42#include "generic.h" 44#include "generic.h"
43 45
44 46
@@ -148,13 +150,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
148 .rdy_pin = AT91_PIN_PC13, 150 .rdy_pin = AT91_PIN_PC13,
149 .enable_pin = AT91_PIN_PC14, 151 .enable_pin = AT91_PIN_PC14,
150 .partition_info = nand_partitions, 152 .partition_info = nand_partitions,
151#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
152 .bus_width_16 = 1,
153#else
154 .bus_width_16 = 0,
155#endif
156}; 153};
157 154
155static struct sam9_smc_config __initdata ek_nand_smc_config = {
156 .ncs_read_setup = 0,
157 .nrd_setup = 1,
158 .ncs_write_setup = 0,
159 .nwe_setup = 1,
160
161 .ncs_read_pulse = 3,
162 .nrd_pulse = 3,
163 .ncs_write_pulse = 3,
164 .nwe_pulse = 3,
165
166 .read_cycle = 5,
167 .write_cycle = 5,
168
169 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
170 .tdf_cycles = 2,
171};
172
173static void __init ek_add_device_nand(void)
174{
175 /* configure chip-select 3 (NAND) */
176 sam9_smc_configure(3, &ek_nand_smc_config);
177
178 at91_add_device_nand(&ek_nand_data);
179}
180
158 181
159/* 182/*
160 * MCI (SD/MMC) 183 * MCI (SD/MMC)
@@ -178,7 +201,7 @@ static void __init ek_board_init(void)
178 /* SPI */ 201 /* SPI */
179 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 202 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
180 /* NAND */ 203 /* NAND */
181 at91_add_device_nand(&ek_nand_data); 204 ek_add_device_nand();
182 /* Ethernet */ 205 /* Ethernet */
183 at91_add_device_eth(&ek_macb_data); 206 at91_add_device_eth(&ek_macb_data);
184 /* MMC */ 207 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index b49eb6e4918a..93a0f8b100eb 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -42,7 +42,10 @@
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <mach/board.h> 43#include <mach/board.h>
44#include <mach/gpio.h> 44#include <mach/gpio.h>
45#include <mach/at91sam9_smc.h>
46#include <mach/at91_shdwc.h>
45 47
48#include "sam9_smc.h"
46#include "generic.h" 49#include "generic.h"
47 50
48 51
@@ -195,6 +198,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
195#endif 198#endif
196}; 199};
197 200
201static struct sam9_smc_config __initdata ek_nand_smc_config = {
202 .ncs_read_setup = 0,
203 .nrd_setup = 1,
204 .ncs_write_setup = 0,
205 .nwe_setup = 1,
206
207 .ncs_read_pulse = 3,
208 .nrd_pulse = 3,
209 .ncs_write_pulse = 3,
210 .nwe_pulse = 3,
211
212 .read_cycle = 5,
213 .write_cycle = 5,
214
215 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
216 .tdf_cycles = 2,
217};
218
219static void __init ek_add_device_nand(void)
220{
221 /* setup bus-width (8 or 16) */
222 if (ek_nand_data.bus_width_16)
223 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
224 else
225 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
226
227 /* configure chip-select 3 (NAND) */
228 sam9_smc_configure(3, &ek_nand_smc_config);
229
230 at91_add_device_nand(&ek_nand_data);
231}
232
198 233
199/* 234/*
200 * MCI (SD/MMC) 235 * MCI (SD/MMC)
@@ -303,7 +338,7 @@ static void __init ek_board_init(void)
303 /* SPI */ 338 /* SPI */
304 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 339 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
305 /* NAND */ 340 /* NAND */
306 at91_add_device_nand(&ek_nand_data); 341 ek_add_device_nand();
307 /* Ethernet */ 342 /* Ethernet */
308 at91_add_device_eth(&ek_macb_data); 343 at91_add_device_eth(&ek_macb_data);
309 /* MMC */ 344 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4977409d4fc6..d5266da55311 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -47,7 +47,9 @@
47#include <mach/board.h> 47#include <mach/board.h>
48#include <mach/gpio.h> 48#include <mach/gpio.h>
49#include <mach/at91sam9_smc.h> 49#include <mach/at91sam9_smc.h>
50#include <mach/at91_shdwc.h>
50 51
52#include "sam9_smc.h"
51#include "generic.h" 53#include "generic.h"
52 54
53 55
@@ -76,7 +78,7 @@ static void __init ek_init_irq(void)
76 * DM9000 ethernet device 78 * DM9000 ethernet device
77 */ 79 */
78#if defined(CONFIG_DM9000) 80#if defined(CONFIG_DM9000)
79static struct resource at91sam9261_dm9000_resource[] = { 81static struct resource dm9000_resource[] = {
80 [0] = { 82 [0] = {
81 .start = AT91_CHIPSELECT_2, 83 .start = AT91_CHIPSELECT_2,
82 .end = AT91_CHIPSELECT_2 + 3, 84 .end = AT91_CHIPSELECT_2 + 3,
@@ -98,27 +100,42 @@ static struct dm9000_plat_data dm9000_platdata = {
98 .flags = DM9000_PLATF_16BITONLY, 100 .flags = DM9000_PLATF_16BITONLY,
99}; 101};
100 102
101static struct platform_device at91sam9261_dm9000_device = { 103static struct platform_device dm9000_device = {
102 .name = "dm9000", 104 .name = "dm9000",
103 .id = 0, 105 .id = 0,
104 .num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource), 106 .num_resources = ARRAY_SIZE(dm9000_resource),
105 .resource = at91sam9261_dm9000_resource, 107 .resource = dm9000_resource,
106 .dev = { 108 .dev = {
107 .platform_data = &dm9000_platdata, 109 .platform_data = &dm9000_platdata,
108 } 110 }
109}; 111};
110 112
113/*
114 * SMC timings for the DM9000.
115 * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
116 */
117static struct sam9_smc_config __initdata dm9000_smc_config = {
118 .ncs_read_setup = 0,
119 .nrd_setup = 2,
120 .ncs_write_setup = 0,
121 .nwe_setup = 2,
122
123 .ncs_read_pulse = 8,
124 .nrd_pulse = 4,
125 .ncs_write_pulse = 8,
126 .nwe_pulse = 4,
127
128 .read_cycle = 16,
129 .write_cycle = 16,
130
131 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
132 .tdf_cycles = 1,
133};
134
111static void __init ek_add_device_dm9000(void) 135static void __init ek_add_device_dm9000(void)
112{ 136{
113 /* 137 /* Configure chip-select 2 (DM9000) */
114 * Configure Chip-Select 2 on SMC for the DM9000. 138 sam9_smc_configure(2, &dm9000_smc_config);
115 * Note: These timings were calculated for MASTER_CLOCK = 100000000
116 * according to the DM9000 timings.
117 */
118 at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
119 at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
120 at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
121 at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
122 139
123 /* Configure Reset signal as output */ 140 /* Configure Reset signal as output */
124 at91_set_gpio_output(AT91_PIN_PC10, 0); 141 at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -126,7 +143,7 @@ static void __init ek_add_device_dm9000(void)
126 /* Configure Interrupt pin as input, no pull-up */ 143 /* Configure Interrupt pin as input, no pull-up */
127 at91_set_gpio_input(AT91_PIN_PC11, 0); 144 at91_set_gpio_input(AT91_PIN_PC11, 0);
128 145
129 platform_device_register(&at91sam9261_dm9000_device); 146 platform_device_register(&dm9000_device);
130} 147}
131#else 148#else
132static void __init ek_add_device_dm9000(void) {} 149static void __init ek_add_device_dm9000(void) {}
@@ -197,6 +214,39 @@ static struct atmel_nand_data __initdata ek_nand_data = {
197#endif 214#endif
198}; 215};
199 216
217static struct sam9_smc_config __initdata ek_nand_smc_config = {
218 .ncs_read_setup = 0,
219 .nrd_setup = 1,
220 .ncs_write_setup = 0,
221 .nwe_setup = 1,
222
223 .ncs_read_pulse = 3,
224 .nrd_pulse = 3,
225 .ncs_write_pulse = 3,
226 .nwe_pulse = 3,
227
228 .read_cycle = 5,
229 .write_cycle = 5,
230
231 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
232 .tdf_cycles = 2,
233};
234
235static void __init ek_add_device_nand(void)
236{
237 /* setup bus-width (8 or 16) */
238 if (ek_nand_data.bus_width_16)
239 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
240 else
241 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
242
243 /* configure chip-select 3 (NAND) */
244 sam9_smc_configure(3, &ek_nand_smc_config);
245
246 at91_add_device_nand(&ek_nand_data);
247}
248
249
200/* 250/*
201 * ADS7846 Touchscreen 251 * ADS7846 Touchscreen
202 */ 252 */
@@ -525,7 +575,7 @@ static void __init ek_board_init(void)
525 /* I2C */ 575 /* I2C */
526 at91_add_device_i2c(NULL, 0); 576 at91_add_device_i2c(NULL, 0);
527 /* NAND */ 577 /* NAND */
528 at91_add_device_nand(&ek_nand_data); 578 ek_add_device_nand();
529 /* DM9000 ethernet */ 579 /* DM9000 ethernet */
530 ek_add_device_dm9000(); 580 ek_add_device_dm9000();
531 581
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 8354015c6a23..57d52528f224 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -46,7 +46,9 @@
46#include <mach/board.h> 46#include <mach/board.h>
47#include <mach/gpio.h> 47#include <mach/gpio.h>
48#include <mach/at91sam9_smc.h> 48#include <mach/at91sam9_smc.h>
49#include <mach/at91_shdwc.h>
49 50
51#include "sam9_smc.h"
50#include "generic.h" 52#include "generic.h"
51 53
52 54
@@ -203,6 +205,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
203#endif 205#endif
204}; 206};
205 207
208static struct sam9_smc_config __initdata ek_nand_smc_config = {
209 .ncs_read_setup = 0,
210 .nrd_setup = 1,
211 .ncs_write_setup = 0,
212 .nwe_setup = 1,
213
214 .ncs_read_pulse = 3,
215 .nrd_pulse = 3,
216 .ncs_write_pulse = 3,
217 .nwe_pulse = 3,
218
219 .read_cycle = 5,
220 .write_cycle = 5,
221
222 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
223 .tdf_cycles = 2,
224};
225
226static void __init ek_add_device_nand(void)
227{
228 /* setup bus-width (8 or 16) */
229 if (ek_nand_data.bus_width_16)
230 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
231 else
232 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
233
234 /* configure chip-select 3 (NAND) */
235 sam9_smc_configure(3, &ek_nand_smc_config);
236
237 at91_add_device_nand(&ek_nand_data);
238}
239
206 240
207/* 241/*
208 * I2C devices 242 * I2C devices
@@ -385,7 +419,7 @@ static void __init ek_board_init(void)
385 /* Ethernet */ 419 /* Ethernet */
386 at91_add_device_eth(&ek_macb_data); 420 at91_add_device_eth(&ek_macb_data);
387 /* NAND */ 421 /* NAND */
388 at91_add_device_nand(&ek_nand_data); 422 ek_add_device_nand();
389 /* I2C */ 423 /* I2C */
390 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); 424 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
391 /* LCD Controller */ 425 /* LCD Controller */
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index b588ead14d68..81439fe6fb3d 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -37,7 +37,9 @@
37 37
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/gpio.h> 39#include <mach/gpio.h>
40#include <mach/at91sam9_smc.h>
40 41
42#include "sam9_smc.h"
41#include "generic.h" 43#include "generic.h"
42 44
43 45
@@ -156,6 +158,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
156#endif 158#endif
157}; 159};
158 160
161static struct sam9_smc_config __initdata ek_nand_smc_config = {
162 .ncs_read_setup = 0,
163 .nrd_setup = 2,
164 .ncs_write_setup = 0,
165 .nwe_setup = 2,
166
167 .ncs_read_pulse = 4,
168 .nrd_pulse = 4,
169 .ncs_write_pulse = 4,
170 .nwe_pulse = 4,
171
172 .read_cycle = 7,
173 .write_cycle = 7,
174
175 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
176 .tdf_cycles = 3,
177};
178
179static void __init ek_add_device_nand(void)
180{
181 /* setup bus-width (8 or 16) */
182 if (ek_nand_data.bus_width_16)
183 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
184 else
185 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
186
187 /* configure chip-select 3 (NAND) */
188 sam9_smc_configure(3, &ek_nand_smc_config);
189
190 at91_add_device_nand(&ek_nand_data);
191}
192
159 193
160/* 194/*
161 * MCI (SD/MMC) 195 * MCI (SD/MMC)
@@ -195,7 +229,7 @@ static void __init ek_board_init(void)
195 /* SPI */ 229 /* SPI */
196 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 230 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
197 /* NAND */ 231 /* NAND */
198 at91_add_device_nand(&ek_nand_data); 232 ek_add_device_nand();
199 /* Ethernet */ 233 /* Ethernet */
200 at91_add_device_eth(&ek_macb_data); 234 at91_add_device_eth(&ek_macb_data);
201 /* MMC */ 235 /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 270851864308..9b937ee4815a 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -29,8 +29,9 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/board.h> 30#include <mach/board.h>
31#include <mach/gpio.h> 31#include <mach/gpio.h>
32#include <mach/at91sam9_smc.h> 32#include <mach/at91_shdwc.h>
33 33
34#include "sam9_smc.h"
34#include "generic.h" 35#include "generic.h"
35 36
36 37
@@ -103,9 +104,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
103 .rdy_pin = AT91_PIN_PD17, 104 .rdy_pin = AT91_PIN_PD17,
104 .enable_pin = AT91_PIN_PB6, 105 .enable_pin = AT91_PIN_PB6,
105 .partition_info = nand_partitions, 106 .partition_info = nand_partitions,
106 .bus_width_16 = 0,
107}; 107};
108 108
109static struct sam9_smc_config __initdata ek_nand_smc_config = {
110 .ncs_read_setup = 0,
111 .nrd_setup = 1,
112 .ncs_write_setup = 0,
113 .nwe_setup = 1,
114
115 .ncs_read_pulse = 3,
116 .nrd_pulse = 3,
117 .ncs_write_pulse = 3,
118 .nwe_pulse = 3,
119
120 .read_cycle = 5,
121 .write_cycle = 5,
122
123 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
124 .tdf_cycles = 2,
125};
126
127static void __init ek_add_device_nand(void)
128{
129 /* configure chip-select 3 (NAND) */
130 sam9_smc_configure(3, &ek_nand_smc_config);
131
132 at91_add_device_nand(&ek_nand_data);
133}
134
109 135
110/* 136/*
111 * SPI devices 137 * SPI devices
@@ -188,7 +214,7 @@ static void __init ek_board_init(void)
188 /* I2C */ 214 /* I2C */
189 at91_add_device_i2c(NULL, 0); 215 at91_add_device_i2c(NULL, 0);
190 /* NAND */ 216 /* NAND */
191 at91_add_device_nand(&ek_nand_data); 217 ek_add_device_nand();
192 /* SPI */ 218 /* SPI */
193 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 219 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
194 /* MMC */ 220 /* MMC */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 7c350357333a..d13304c0bc45 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -41,8 +41,10 @@
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91sam9_smc.h>
44#include <mach/at91_shdwc.h> 45#include <mach/at91_shdwc.h>
45 46
47#include "sam9_smc.h"
46#include "generic.h" 48#include "generic.h"
47 49
48 50
@@ -121,13 +123,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
121 .rdy_pin = AT91_PIN_PC13, 123 .rdy_pin = AT91_PIN_PC13,
122 .enable_pin = AT91_PIN_PC14, 124 .enable_pin = AT91_PIN_PC14,
123 .partition_info = nand_partitions, 125 .partition_info = nand_partitions,
124#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
125 .bus_width_16 = 1,
126#else
127 .bus_width_16 = 0,
128#endif
129}; 126};
130 127
128static struct sam9_smc_config __initdata ek_nand_smc_config = {
129 .ncs_read_setup = 0,
130 .nrd_setup = 1,
131 .ncs_write_setup = 0,
132 .nwe_setup = 1,
133
134 .ncs_read_pulse = 3,
135 .nrd_pulse = 3,
136 .ncs_write_pulse = 3,
137 .nwe_pulse = 3,
138
139 .read_cycle = 5,
140 .write_cycle = 5,
141
142 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
143 .tdf_cycles = 2,
144};
145
146static void __init ek_add_device_nand(void)
147{
148 /* configure chip-select 3 (NAND) */
149 sam9_smc_configure(3, &ek_nand_smc_config);
150
151 at91_add_device_nand(&ek_nand_data);
152}
153
131/* 154/*
132 * GPIO Buttons 155 * GPIO Buttons
133 */ 156 */
@@ -189,7 +212,7 @@ static void __init ek_board_init(void)
189 /* USB Device */ 212 /* USB Device */
190 at91_add_device_udc(&ek_udc_data); 213 at91_add_device_udc(&ek_udc_data);
191 /* NAND */ 214 /* NAND */
192 at91_add_device_nand(&ek_nand_data); 215 ek_add_device_nand();
193 /* I2C */ 216 /* I2C */
194 at91_add_device_i2c(NULL, 0); 217 at91_add_device_i2c(NULL, 0);
195 /* Ethernet */ 218 /* Ethernet */
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 391b566c4571..d96405b7d578 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -40,8 +40,10 @@
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/gpio.h> 42#include <mach/gpio.h>
43#include <mach/at91sam9_smc.h>
43#include <mach/at91_shdwc.h> 44#include <mach/at91_shdwc.h>
44 45
46#include "sam9_smc.h"
45#include "generic.h" 47#include "generic.h"
46 48
47 49
@@ -134,13 +136,35 @@ static struct atmel_nand_data __initdata ek_nand_data = {
134 .rdy_pin = AT91_PIN_PA22, 136 .rdy_pin = AT91_PIN_PA22,
135 .enable_pin = AT91_PIN_PD15, 137 .enable_pin = AT91_PIN_PD15,
136 .partition_info = nand_partitions, 138 .partition_info = nand_partitions,
137#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
138 .bus_width_16 = 1,
139#else
140 .bus_width_16 = 0,
141#endif
142}; 139};
143 140
141static struct sam9_smc_config __initdata ek_nand_smc_config = {
142 .ncs_read_setup = 0,
143 .nrd_setup = 1,
144 .ncs_write_setup = 0,
145 .nwe_setup = 1,
146
147 .ncs_read_pulse = 3,
148 .nrd_pulse = 3,
149 .ncs_write_pulse = 3,
150 .nwe_pulse = 3,
151
152 .read_cycle = 5,
153 .write_cycle = 5,
154
155 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
156 .tdf_cycles = 2,
157};
158
159static void __init ek_add_device_nand(void)
160{
161 /* configure chip-select 3 (NAND) */
162 sam9_smc_configure(3, &ek_nand_smc_config);
163
164 at91_add_device_nand(&ek_nand_data);
165}
166
167
144/* 168/*
145 * GPIO Buttons 169 * GPIO Buttons
146 */ 170 */
@@ -206,7 +230,7 @@ static void __init ek_board_init(void)
206 /* Ethernet */ 230 /* Ethernet */
207 at91_add_device_eth(&ek_macb_data); 231 at91_add_device_eth(&ek_macb_data);
208 /* NAND */ 232 /* NAND */
209 at91_add_device_nand(&ek_nand_data); 233 ek_add_device_nand();
210 /* I2C */ 234 /* I2C */
211 at91_add_device_i2c(NULL, 0); 235 at91_add_device_i2c(NULL, 0);
212 /* Push Buttons */ 236 /* Push Buttons */
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2e3f2894b704..9561e33b8a9a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,6 +23,7 @@
23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ 23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ 24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ 25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
26#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */
26#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ 27#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
27#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ 28#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
28#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ 29#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
@@ -102,10 +103,16 @@
102#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ 103#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
103#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ 104#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
104#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ 105#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */
106#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */
105#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ 107#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
106#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ 108#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
107#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ 109#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
108#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ 110#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
109#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ 111#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
110 112
113#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
114#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
115
116#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
117
111#endif 118#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4a4b64135a92..d8c1ededaa75 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -101,7 +101,9 @@
101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) 101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) 102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
104#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 104#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
105 (0xfffffd50 - AT91_BASE_SYS) : \
106 (0xfffffd60 - AT91_BASE_SYS))
105 107
106#define AT91_USART0 AT91CAP9_BASE_US0 108#define AT91_USART0 AT91CAP9_BASE_US0
107#define AT91_USART1 AT91CAP9_BASE_US1 109#define AT91_USART1 AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index dbfd9f73f80b..c554c3e4d553 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -49,6 +49,17 @@ static inline unsigned long at91_arch_identify(void)
49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH); 49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
50} 50}
51 51
52#ifdef CONFIG_ARCH_AT91CAP9
53#include <mach/at91_pmc.h>
54
55#define ARCH_REVISION_CAP9_B 0x399
56#define ARCH_REVISION_CAP9_C 0x601
57
58static inline unsigned long at91cap9_rev_identify(void)
59{
60 return (at91_sys_read(AT91_PMC_VER));
61}
62#endif
52 63
53#ifdef CONFIG_ARCH_AT91RM9200 64#ifdef CONFIG_ARCH_AT91RM9200
54#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) 65#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
@@ -90,8 +101,12 @@ static inline unsigned long at91_arch_identify(void)
90 101
91#ifdef CONFIG_ARCH_AT91CAP9 102#ifdef CONFIG_ARCH_AT91CAP9
92#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) 103#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
104#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
105#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
93#else 106#else
94#define cpu_is_at91cap9() (0) 107#define cpu_is_at91cap9() (0)
108#define cpu_is_at91cap9_revB() (0)
109#define cpu_is_at91cap9_revC() (0)
95#endif 110#endif
96 111
97/* 112/*
diff --git a/arch/arm/mach-at91/include/mach/dma.h b/arch/arm/mach-at91/include/mach/dma.h
deleted file mode 100644
index e4f90c177616..000000000000
--- a/arch/arm/mach-at91/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/dma.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 1611bd03f528..0b0cccc46e68 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -23,8 +23,8 @@
23 23
24#define IO_SPACE_LIMIT 0xFFFFFFFF 24#define IO_SPACE_LIMIT 0xFFFFFFFF
25 25
26#define __io(a) ((void __iomem *)(a)) 26#define __io(a) __typesafe_io(a)
27#define __mem_pci(a) (a) 27#define __mem_pci(a) (a)
28 28
29 29
30#ifndef __ASSEMBLY__ 30#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
index 9dd1b8c79b08..14f4ef4b6a9e 100644
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ b/arch/arm/mach-at91/include/mach/memory.h
@@ -25,15 +25,4 @@
25 25
26#define PHYS_OFFSET (AT91_SDRAM_BASE) 26#define PHYS_OFFSET (AT91_SDRAM_BASE)
27 27
28
29/*
30 * Virtual view <-> DMA view memory address translations
31 * virt_to_bus: Used to translate the virtual address to an
32 * address suitable to be passed to set_dma_addr
33 * bus_to_virt: Used to convert an address for DMA operations
34 * to an address that the kernel can use.
35 */
36#define __virt_to_bus(x) __virt_to_phys(x)
37#define __bus_to_virt(x) __phys_to_virt(x)
38
39#endif 28#endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
new file mode 100644
index 000000000000..5eab6aa621d0
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/arm/mach-at91/sam9_smc.c
3 *
4 * Copyright (C) 2008 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/io.h>
13
14#include <mach/at91sam9_smc.h>
15
16#include "sam9_smc.h"
17
18void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
19{
20 /* Setup register */
21 at91_sys_write(AT91_SMC_SETUP(cs),
22 AT91_SMC_NWESETUP_(config->nwe_setup)
23 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
24 | AT91_SMC_NRDSETUP_(config->nrd_setup)
25 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
26 );
27
28 /* Pulse register */
29 at91_sys_write(AT91_SMC_PULSE(cs),
30 AT91_SMC_NWEPULSE_(config->nwe_pulse)
31 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
32 | AT91_SMC_NRDPULSE_(config->nrd_pulse)
33 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
34 );
35
36 /* Cycle register */
37 at91_sys_write(AT91_SMC_CYCLE(cs),
38 AT91_SMC_NWECYCLE_(config->write_cycle)
39 | AT91_SMC_NRDCYCLE_(config->read_cycle)
40 );
41
42 /* Mode register */
43 at91_sys_write(AT91_SMC_MODE(cs),
44 config->mode
45 | AT91_SMC_TDF_(config->tdf_cycles)
46 );
47}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
new file mode 100644
index 000000000000..bf72cfb3455b
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -0,0 +1,33 @@
1/*
2 * linux/arch/arm/mach-at91/sam9_smc.
3 *
4 * Copyright (C) 2008 Andrew Victor
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11struct sam9_smc_config {
12 /* Setup register */
13 u8 ncs_read_setup;
14 u8 nrd_setup;
15 u8 ncs_write_setup;
16 u8 nwe_setup;
17
18 /* Pulse register */
19 u8 ncs_read_pulse;
20 u8 nrd_pulse;
21 u8 ncs_write_pulse;
22 u8 nwe_pulse;
23
24 /* Cycle register */
25 u16 read_cycle;
26 u16 write_cycle;
27
28 /* Mode register */
29 u32 mode;
30 u8 tdf_cycles:4;
31};
32
33extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 12:40:50 -0500