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-rw-r--r--arch/arm/mach-at91/Kconfig5
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c56
-rw-r--r--arch/arm/mach-at91/board-eco920.c158
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c1
-rw-r--r--arch/arm/mach-at91/cpuidle.c94
-rw-r--r--arch/arm/mach-at91/include/mach/board.h1
-rw-r--r--arch/arm/mach-at91/pm.c62
-rw-r--r--arch/arm/mach-at91/pm.h67
9 files changed, 388 insertions, 58 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 3df124e54267..0b2ee953f164 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -183,6 +183,11 @@ config MACH_CPUAT91
183 Select this if you are using the Eukrea Electromatique's 183 Select this if you are using the Eukrea Electromatique's
184 CPUAT91 board <http://www.eukrea.com/>. 184 CPUAT91 board <http://www.eukrea.com/>.
185 185
186config MACH_ECO920
187 bool "eco920"
188 help
189 Select this if you are using the eco920 board
190
186endif 191endif
187 192
188# ---------------------------------------------------------- 193# ----------------------------------------------------------
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ada440aab0c5..709fbad4a3ee 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
35obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o 35obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
36obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o 36obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
37obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o 37obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
38obj-$(CONFIG_MACH_ECO920) += board-eco920.o
38 39
39# AT91SAM9260 board-specific support 40# AT91SAM9260 board-specific support
40obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o 41obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
@@ -77,6 +78,7 @@ obj-y += leds.o
77# Power Management 78# Power Management
78obj-$(CONFIG_PM) += pm.o 79obj-$(CONFIG_PM) += pm.o
79obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o 80obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
81obj-$(CONFIG_CPU_IDLE) += cpuidle.o
80 82
81ifeq ($(CONFIG_PM_DEBUG),y) 83ifeq ($(CONFIG_PM_DEBUG),y)
82CFLAGS_pm.o += -DDEBUG 84CFLAGS_pm.o += -DDEBUG
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 332b784050b2..a57af3e99c7c 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -131,6 +131,62 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
131 131
132 132
133/* -------------------------------------------------------------------- 133/* --------------------------------------------------------------------
134 * USB Host HS (EHCI)
135 * Needs an OHCI host for low and full speed management
136 * -------------------------------------------------------------------- */
137
138#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
139static u64 ehci_dmamask = DMA_BIT_MASK(32);
140static struct at91_usbh_data usbh_ehci_data;
141
142static struct resource usbh_ehci_resources[] = {
143 [0] = {
144 .start = AT91SAM9G45_EHCI_BASE,
145 .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = AT91SAM9G45_ID_UHPHS,
150 .end = AT91SAM9G45_ID_UHPHS,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static struct platform_device at91_usbh_ehci_device = {
156 .name = "atmel-ehci",
157 .id = -1,
158 .dev = {
159 .dma_mask = &ehci_dmamask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 .platform_data = &usbh_ehci_data,
162 },
163 .resource = usbh_ehci_resources,
164 .num_resources = ARRAY_SIZE(usbh_ehci_resources),
165};
166
167void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
168{
169 int i;
170
171 if (!data)
172 return;
173
174 /* Enable VBus control for UHP ports */
175 for (i = 0; i < data->ports; i++) {
176 if (data->vbus_pin[i])
177 at91_set_gpio_output(data->vbus_pin[i], 0);
178 }
179
180 usbh_ehci_data = *data;
181 at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk");
182 platform_device_register(&at91_usbh_ehci_device);
183}
184#else
185void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
186#endif
187
188
189/* --------------------------------------------------------------------
134 * USB HS Device (Gadget) 190 * USB HS Device (Gadget)
135 * -------------------------------------------------------------------- */ 191 * -------------------------------------------------------------------- */
136 192
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
new file mode 100644
index 000000000000..295a96609e71
--- /dev/null
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -0,0 +1,158 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h>
20#include <linux/gpio.h>
21
22#include <asm/mach-types.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26
27#include <mach/board.h>
28#include <mach/at91rm9200_mc.h>
29#include "generic.h"
30
31static void __init eco920_map_io(void)
32{
33 at91rm9200_initialize(18432000, AT91RM9200_PQFP);
34
35 /* Setup the LEDs */
36 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
37
38 /* DBGU on ttyS0. (Rx & Tx only */
39 at91_register_uart(0, 0, 0);
40
41 /* set serial console to ttyS0 (ie, DBGU) */
42 at91_set_serial_console(0);
43}
44
45static void __init eco920_init_irq(void)
46{
47 at91rm9200_init_interrupts(NULL);
48}
49
50static struct at91_eth_data __initdata eco920_eth_data = {
51 .phy_irq_pin = AT91_PIN_PC2,
52 .is_rmii = 1,
53};
54
55static struct at91_usbh_data __initdata eco920_usbh_data = {
56 .ports = 1,
57};
58
59static struct at91_udc_data __initdata eco920_udc_data = {
60 .vbus_pin = AT91_PIN_PB12,
61 .pullup_pin = AT91_PIN_PB13,
62};
63
64static struct at91_mmc_data __initdata eco920_mmc_data = {
65 .slot_b = 0,
66 .wire4 = 0,
67};
68
69static struct physmap_flash_data eco920_flash_data = {
70 .width = 2,
71};
72
73static struct resource eco920_flash_resource = {
74 .start = 0x11000000,
75 .end = 0x11ffffff,
76 .flags = IORESOURCE_MEM,
77};
78
79static struct platform_device eco920_flash = {
80 .name = "physmap-flash",
81 .id = 0,
82 .dev = {
83 .platform_data = &eco920_flash_data,
84 },
85 .resource = &eco920_flash_resource,
86 .num_resources = 1,
87};
88
89static struct resource at91_beeper_resources[] = {
90 [0] = {
91 .start = AT91RM9200_BASE_TC3,
92 .end = AT91RM9200_BASE_TC3 + 0x39,
93 .flags = IORESOURCE_MEM,
94 },
95};
96
97static struct platform_device at91_beeper = {
98 .name = "at91_beeper",
99 .id = 0,
100 .resource = at91_beeper_resources,
101 .num_resources = ARRAY_SIZE(at91_beeper_resources),
102};
103
104static struct spi_board_info eco920_spi_devices[] = {
105 { /* CAN controller */
106 .modalias = "tlv5638",
107 .chip_select = 3,
108 .max_speed_hz = 20 * 1000 * 1000,
109 .mode = SPI_CPHA,
110 },
111};
112
113static void __init eco920_board_init(void)
114{
115 at91_add_device_serial();
116 at91_add_device_eth(&eco920_eth_data);
117 at91_add_device_usbh(&eco920_usbh_data);
118 at91_add_device_udc(&eco920_udc_data);
119
120 at91_add_device_mmc(0, &eco920_mmc_data);
121 platform_device_register(&eco920_flash);
122
123 at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
124 | AT91_SMC_RWSETUP_(1)
125 | AT91_SMC_DBW_8
126 | AT91_SMC_WSEN
127 | AT91_SMC_NWS_(15));
128
129 at91_set_A_periph(AT91_PIN_PC6, 1);
130
131 at91_set_gpio_input(AT91_PIN_PA23, 0);
132 at91_set_deglitch(AT91_PIN_PA23, 1);
133
134/* Initialization of the Static Memory Controller for Chip Select 3 */
135 at91_sys_write(AT91_SMC_CSR(3),
136 AT91_SMC_DBW_16 | /* 16 bit */
137 AT91_SMC_WSEN |
138 AT91_SMC_NWS_(5) | /* wait states */
139 AT91_SMC_TDF_(1) /* float time */
140 );
141
142 at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper");
143 at91_set_B_periph(AT91_PIN_PB6, 0);
144 platform_device_register(&at91_beeper);
145
146 at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices));
147}
148
149MACHINE_START(ECO920, "eco920")
150 /* Maintainer: Sascha Hauer */
151 .phys_io = AT91_BASE_SYS,
152 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
153 .boot_params = AT91_SDRAM_BASE + 0x100,
154 .timer = &at91rm9200_timer,
155 .map_io = eco920_map_io,
156 .init_irq = eco920_init_irq,
157 .init_machine = eco920_board_init,
158MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 64c3843f323d..1cf4d8681078 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -366,6 +366,7 @@ static void __init ek_board_init(void)
366 at91_add_device_serial(); 366 at91_add_device_serial();
367 /* USB HS Host */ 367 /* USB HS Host */
368 at91_add_device_usbh_ohci(&ek_usbh_hs_data); 368 at91_add_device_usbh_ohci(&ek_usbh_hs_data);
369 at91_add_device_usbh_ehci(&ek_usbh_hs_data);
369 /* USB HS Device */ 370 /* USB HS Device */
370 at91_add_device_usba(&ek_usba_udc_data); 371 at91_add_device_usba(&ek_usba_udc_data);
371 /* SPI */ 372 /* SPI */
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
new file mode 100644
index 000000000000..1cfeac1483d6
--- /dev/null
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -0,0 +1,94 @@
1/*
2 * based on arch/arm/mach-kirkwood/cpuidle.c
3 *
4 * CPU idle support for AT91 SoC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
11 * to implement two idle states -
12 * #1 wait-for-interrupt
13 * #2 wait-for-interrupt and RAM self refresh
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/cpuidle.h>
20#include <asm/proc-fns.h>
21#include <linux/io.h>
22
23#include "pm.h"
24
25#define AT91_MAX_STATES 2
26
27static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
28
29static struct cpuidle_driver at91_idle_driver = {
30 .name = "at91_idle",
31 .owner = THIS_MODULE,
32};
33
34/* Actual code that puts the SoC in different idle states */
35static int at91_enter_idle(struct cpuidle_device *dev,
36 struct cpuidle_state *state)
37{
38 struct timeval before, after;
39 int idle_time;
40 u32 saved_lpr;
41
42 local_irq_disable();
43 do_gettimeofday(&before);
44 if (state == &dev->states[0])
45 /* Wait for interrupt state */
46 cpu_do_idle();
47 else if (state == &dev->states[1]) {
48 asm("b 1f; .align 5; 1:");
49 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
50 saved_lpr = sdram_selfrefresh_enable();
51 cpu_do_idle();
52 sdram_selfrefresh_disable(saved_lpr);
53 }
54 do_gettimeofday(&after);
55 local_irq_enable();
56 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
57 (after.tv_usec - before.tv_usec);
58 return idle_time;
59}
60
61/* Initialize CPU idle by registering the idle states */
62static int at91_init_cpuidle(void)
63{
64 struct cpuidle_device *device;
65
66 cpuidle_register_driver(&at91_idle_driver);
67
68 device = &per_cpu(at91_cpuidle_device, smp_processor_id());
69 device->state_count = AT91_MAX_STATES;
70
71 /* Wait for interrupt state */
72 device->states[0].enter = at91_enter_idle;
73 device->states[0].exit_latency = 1;
74 device->states[0].target_residency = 10000;
75 device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
76 strcpy(device->states[0].name, "WFI");
77 strcpy(device->states[0].desc, "Wait for interrupt");
78
79 /* Wait for interrupt and RAM self refresh state */
80 device->states[1].enter = at91_enter_idle;
81 device->states[1].exit_latency = 10;
82 device->states[1].target_residency = 10000;
83 device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
84 strcpy(device->states[1].name, "RAM_SR");
85 strcpy(device->states[1].desc, "WFI and RAM Self Refresh");
86
87 if (cpuidle_register_device(device)) {
88 printk(KERN_ERR "at91_init_cpuidle: Failed registering\n");
89 return -EIO;
90 }
91 return 0;
92}
93
94device_initcall(at91_init_cpuidle);
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 2f4fcedc02ba..2295d80dd893 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -98,6 +98,7 @@ struct at91_usbh_data {
98}; 98};
99extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 99extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); 100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
101extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
101 102
102 /* NAND / SmartMedia */ 103 /* NAND / SmartMedia */
103struct atmel_nand_data { 104struct atmel_nand_data {
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 4028724d490d..615668986480 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -29,62 +29,7 @@
29#include <mach/cpu.h> 29#include <mach/cpu.h>
30 30
31#include "generic.h" 31#include "generic.h"
32 32#include "pm.h"
33#ifdef CONFIG_ARCH_AT91RM9200
34#include <mach/at91rm9200_mc.h>
35
36/*
37 * The AT91RM9200 goes into self-refresh mode with this command, and will
38 * terminate self-refresh automatically on the next SDRAM access.
39 */
40#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1)
41#define sdram_selfrefresh_disable() do {} while (0)
42
43#elif defined(CONFIG_ARCH_AT91CAP9)
44#include <mach/at91cap9_ddrsdr.h>
45
46static u32 saved_lpr;
47
48static inline void sdram_selfrefresh_enable(void)
49{
50 u32 lpr;
51
52 saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
53
54 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
55 at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
56}
57
58#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
59
60#else
61#include <mach/at91sam9_sdramc.h>
62
63#ifdef CONFIG_ARCH_AT91SAM9263
64/*
65 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
66 * handle those cases both here and in the Suspend-To-RAM support.
67 */
68#define AT91_SDRAMC AT91_SDRAMC0
69#warning Assuming EB1 SDRAM controller is *NOT* used
70#endif
71
72static u32 saved_lpr;
73
74static inline void sdram_selfrefresh_enable(void)
75{
76 u32 lpr;
77
78 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
79
80 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
81 at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
82}
83
84#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
85
86#endif
87
88 33
89/* 34/*
90 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
@@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz;
260 205
261static int at91_pm_enter(suspend_state_t state) 206static int at91_pm_enter(suspend_state_t state)
262{ 207{
208 u32 saved_lpr;
263 at91_gpio_suspend(); 209 at91_gpio_suspend();
264 at91_irq_suspend(); 210 at91_irq_suspend();
265 211
@@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state)
315 */ 261 */
316 asm("b 1f; .align 5; 1:"); 262 asm("b 1f; .align 5; 1:");
317 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ 263 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
318 sdram_selfrefresh_enable(); 264 saved_lpr = sdram_selfrefresh_enable();
319 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ 265 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
320 sdram_selfrefresh_disable(); 266 sdram_selfrefresh_disable(saved_lpr);
321 break; 267 break;
322 268
323 case PM_SUSPEND_ON: 269 case PM_SUSPEND_ON:
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
new file mode 100644
index 000000000000..08322c44df1a
--- /dev/null
+++ b/arch/arm/mach-at91/pm.h
@@ -0,0 +1,67 @@
1#ifdef CONFIG_ARCH_AT91RM9200
2#include <mach/at91rm9200_mc.h>
3
4/*
5 * The AT91RM9200 goes into self-refresh mode with this command, and will
6 * terminate self-refresh automatically on the next SDRAM access.
7 *
8 * Self-refresh mode is exited as soon as a memory access is made, but we don't
9 * know for sure when that happens. However, we need to restore the low-power
10 * mode if it was enabled before going idle. Restoring low-power mode while
11 * still in self-refresh is "not recommended", but seems to work.
12 */
13
14static inline u32 sdram_selfrefresh_enable(void)
15{
16 u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
17
18 at91_sys_write(AT91_SDRAMC_LPR, 0);
19 at91_sys_write(AT91_SDRAMC_SRR, 1);
20 return saved_lpr;
21}
22
23#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
24
25#elif defined(CONFIG_ARCH_AT91CAP9)
26#include <mach/at91cap9_ddrsdr.h>
27
28
29static inline u32 sdram_selfrefresh_enable(void)
30{
31 u32 saved_lpr, lpr;
32
33 saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
34
35 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
36 at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
37 return saved_lpr;
38}
39
40#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
41
42#else
43#include <mach/at91sam9_sdramc.h>
44
45#ifdef CONFIG_ARCH_AT91SAM9263
46/*
47 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
48 * handle those cases both here and in the Suspend-To-RAM support.
49 */
50#define AT91_SDRAMC AT91_SDRAMC0
51#warning Assuming EB1 SDRAM controller is *NOT* used
52#endif
53
54static inline u32 sdram_selfrefresh_enable(void)
55{
56 u32 saved_lpr, lpr;
57
58 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
59
60 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
61 at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
62 return saved_lpr;
63}
64
65#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
66
67#endif