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-rw-r--r--arch/arm/mach-at91/include/mach/at_hdmac.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h
index 810a13e86245..cab0997be3de 100644
--- a/arch/arm/mach-at91/include/mach/at_hdmac.h
+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h
@@ -27,12 +27,10 @@ struct at_dma_platform_data {
27 * struct at_dma_slave - Controller-specific information about a slave 27 * struct at_dma_slave - Controller-specific information about a slave
28 * @dma_dev: required DMA master device 28 * @dma_dev: required DMA master device
29 * @cfg: Platform-specific initializer for the CFG register 29 * @cfg: Platform-specific initializer for the CFG register
30 * @ctrla: Platform-specific initializer for the CTRLA register
31 */ 30 */
32struct at_dma_slave { 31struct at_dma_slave {
33 struct device *dma_dev; 32 struct device *dma_dev;
34 u32 cfg; 33 u32 cfg;
35 u32 ctrla;
36}; 34};
37 35
38 36
@@ -59,24 +57,5 @@ struct at_dma_slave {
59#define ATC_FIFOCFG_HALFFIFO (0x1 << 28) 57#define ATC_FIFOCFG_HALFFIFO (0x1 << 28)
60#define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28) 58#define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28)
61 59
62/* Platform-configurable bits in CTRLA */
63#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */
64#define ATC_SCSIZE_1 (0x0 << 16)
65#define ATC_SCSIZE_4 (0x1 << 16)
66#define ATC_SCSIZE_8 (0x2 << 16)
67#define ATC_SCSIZE_16 (0x3 << 16)
68#define ATC_SCSIZE_32 (0x4 << 16)
69#define ATC_SCSIZE_64 (0x5 << 16)
70#define ATC_SCSIZE_128 (0x6 << 16)
71#define ATC_SCSIZE_256 (0x7 << 16)
72#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */
73#define ATC_DCSIZE_1 (0x0 << 20)
74#define ATC_DCSIZE_4 (0x1 << 20)
75#define ATC_DCSIZE_8 (0x2 << 20)
76#define ATC_DCSIZE_16 (0x3 << 20)
77#define ATC_DCSIZE_32 (0x4 << 20)
78#define ATC_DCSIZE_64 (0x5 << 20)
79#define ATC_DCSIZE_128 (0x6 << 20)
80#define ATC_DCSIZE_256 (0x7 << 20)
81 60
82#endif /* AT_HDMAC_H */ 61#endif /* AT_HDMAC_H */