diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
-rw-r--r-- | arch/arm/mach-at91/include/mach/cpu.h | 159 |
1 files changed, 89 insertions, 70 deletions
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 3cf69198f8a4..f6ce936dba2b 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-at91/include/mach/cpu.h | 2 | * arch/arm/mach-at91/include/mach/cpu.h |
3 | * | 3 | * |
4 | * Copyright (C) 2006 SAN People | 4 | * Copyright (C) 2006 SAN People |
5 | * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
@@ -10,12 +11,8 @@ | |||
10 | * | 11 | * |
11 | */ | 12 | */ |
12 | 13 | ||
13 | #ifndef __ASM_ARCH_CPU_H | 14 | #ifndef __MACH_CPU_H__ |
14 | #define __ASM_ARCH_CPU_H | 15 | #define __MACH_CPU_H__ |
15 | |||
16 | #include <mach/hardware.h> | ||
17 | #include <mach/at91_dbgu.h> | ||
18 | |||
19 | 16 | ||
20 | #define ARCH_ID_AT91RM9200 0x09290780 | 17 | #define ARCH_ID_AT91RM9200 0x09290780 |
21 | #define ARCH_ID_AT91SAM9260 0x019803a0 | 18 | #define ARCH_ID_AT91SAM9260 0x019803a0 |
@@ -39,16 +36,6 @@ | |||
39 | #define ARCH_ID_AT91M40807 0x14080745 | 36 | #define ARCH_ID_AT91M40807 0x14080745 |
40 | #define ARCH_ID_AT91R40008 0x44000840 | 37 | #define ARCH_ID_AT91R40008 0x44000840 |
41 | 38 | ||
42 | static inline unsigned long at91_cpu_identify(void) | ||
43 | { | ||
44 | return (dbgu_readl(AT91_DBGU, CIDR) & ~AT91_CIDR_VERSION); | ||
45 | } | ||
46 | |||
47 | static inline unsigned long at91_cpu_fully_identify(void) | ||
48 | { | ||
49 | return dbgu_readl(AT91_DBGU, CIDR); | ||
50 | } | ||
51 | |||
52 | #define ARCH_EXID_AT91SAM9M11 0x00000001 | 39 | #define ARCH_EXID_AT91SAM9M11 0x00000001 |
53 | #define ARCH_EXID_AT91SAM9M10 0x00000002 | 40 | #define ARCH_EXID_AT91SAM9M10 0x00000002 |
54 | #define ARCH_EXID_AT91SAM9G46 0x00000003 | 41 | #define ARCH_EXID_AT91SAM9G46 0x00000003 |
@@ -60,40 +47,80 @@ static inline unsigned long at91_cpu_fully_identify(void) | |||
60 | #define ARCH_EXID_AT91SAM9G25 0x00000003 | 47 | #define ARCH_EXID_AT91SAM9G25 0x00000003 |
61 | #define ARCH_EXID_AT91SAM9X25 0x00000004 | 48 | #define ARCH_EXID_AT91SAM9X25 0x00000004 |
62 | 49 | ||
63 | static inline unsigned long at91_exid_identify(void) | ||
64 | { | ||
65 | return dbgu_readl(AT91_DBGU, EXID); | ||
66 | } | ||
67 | |||
68 | |||
69 | #define ARCH_FAMILY_AT91X92 0x09200000 | 50 | #define ARCH_FAMILY_AT91X92 0x09200000 |
70 | #define ARCH_FAMILY_AT91SAM9 0x01900000 | 51 | #define ARCH_FAMILY_AT91SAM9 0x01900000 |
71 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 | 52 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 |
72 | 53 | ||
73 | static inline unsigned long at91_arch_identify(void) | 54 | /* PMC revision */ |
74 | { | ||
75 | return (dbgu_readl(AT91_DBGU, CIDR) & AT91_CIDR_ARCH); | ||
76 | } | ||
77 | |||
78 | #ifdef CONFIG_ARCH_AT91CAP9 | ||
79 | #include <mach/at91_pmc.h> | ||
80 | |||
81 | #define ARCH_REVISION_CAP9_B 0x399 | 55 | #define ARCH_REVISION_CAP9_B 0x399 |
82 | #define ARCH_REVISION_CAP9_C 0x601 | 56 | #define ARCH_REVISION_CAP9_C 0x601 |
83 | 57 | ||
84 | static inline unsigned long at91cap9_rev_identify(void) | 58 | /* RM9200 type */ |
59 | #define ARCH_REVISON_9200_BGA (0 << 0) | ||
60 | #define ARCH_REVISON_9200_PQFP (1 << 0) | ||
61 | |||
62 | enum at91_soc_type { | ||
63 | /* 920T */ | ||
64 | AT91_SOC_RM9200, | ||
65 | |||
66 | /* CAP */ | ||
67 | AT91_SOC_CAP9, | ||
68 | |||
69 | /* SAM92xx */ | ||
70 | AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, | ||
71 | |||
72 | /* SAM9Gxx */ | ||
73 | AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45, | ||
74 | |||
75 | /* SAM9RL */ | ||
76 | AT91_SOC_SAM9RL, | ||
77 | |||
78 | /* SAM9X5 */ | ||
79 | AT91_SOC_SAM9X5, | ||
80 | |||
81 | /* Unknown type */ | ||
82 | AT91_SOC_NONE | ||
83 | }; | ||
84 | |||
85 | enum at91_soc_subtype { | ||
86 | /* RM9200 */ | ||
87 | AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, | ||
88 | |||
89 | /* CAP9 */ | ||
90 | AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C, | ||
91 | |||
92 | /* SAM9260 */ | ||
93 | AT91_SOC_SAM9XE, | ||
94 | |||
95 | /* SAM9G45 */ | ||
96 | AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11, | ||
97 | |||
98 | /* SAM9X5 */ | ||
99 | AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35, | ||
100 | AT91_SOC_SAM9G25, AT91_SOC_SAM9X25, | ||
101 | |||
102 | /* Unknown subtype */ | ||
103 | AT91_SOC_SUBTYPE_NONE | ||
104 | }; | ||
105 | |||
106 | struct at91_socinfo { | ||
107 | unsigned int type, subtype; | ||
108 | unsigned int cidr, exid; | ||
109 | }; | ||
110 | |||
111 | extern struct at91_socinfo at91_soc_initdata; | ||
112 | const char *at91_get_soc_type(struct at91_socinfo *c); | ||
113 | const char *at91_get_soc_subtype(struct at91_socinfo *c); | ||
114 | |||
115 | static inline int at91_soc_is_detected(void) | ||
85 | { | 116 | { |
86 | return (at91_sys_read(AT91_PMC_VER)); | 117 | return at91_soc_initdata.type != AT91_SOC_NONE; |
87 | } | 118 | } |
88 | #endif | ||
89 | 119 | ||
90 | #ifdef CONFIG_ARCH_AT91RM9200 | 120 | #ifdef CONFIG_ARCH_AT91RM9200 |
91 | extern int rm9200_type; | 121 | #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200) |
92 | #define ARCH_REVISON_9200_BGA (0 << 0) | 122 | #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA) |
93 | #define ARCH_REVISON_9200_PQFP (1 << 0) | 123 | #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP) |
94 | #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) | ||
95 | #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp()) | ||
96 | #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP) | ||
97 | #else | 124 | #else |
98 | #define cpu_is_at91rm9200() (0) | 125 | #define cpu_is_at91rm9200() (0) |
99 | #define cpu_is_at91rm9200_bga() (0) | 126 | #define cpu_is_at91rm9200_bga() (0) |
@@ -101,52 +128,49 @@ extern int rm9200_type; | |||
101 | #endif | 128 | #endif |
102 | 129 | ||
103 | #ifdef CONFIG_ARCH_AT91SAM9260 | 130 | #ifdef CONFIG_ARCH_AT91SAM9260 |
104 | #define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE) | 131 | #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) |
105 | #define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe()) | 132 | #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) |
106 | #else | 133 | #else |
107 | #define cpu_is_at91sam9xe() (0) | 134 | #define cpu_is_at91sam9xe() (0) |
108 | #define cpu_is_at91sam9260() (0) | 135 | #define cpu_is_at91sam9260() (0) |
109 | #endif | 136 | #endif |
110 | 137 | ||
111 | #ifdef CONFIG_ARCH_AT91SAM9G20 | 138 | #ifdef CONFIG_ARCH_AT91SAM9G20 |
112 | #define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20) | 139 | #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20) |
113 | #else | 140 | #else |
114 | #define cpu_is_at91sam9g20() (0) | 141 | #define cpu_is_at91sam9g20() (0) |
115 | #endif | 142 | #endif |
116 | 143 | ||
117 | #ifdef CONFIG_ARCH_AT91SAM9261 | 144 | #ifdef CONFIG_ARCH_AT91SAM9261 |
118 | #define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) | 145 | #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) |
119 | #else | 146 | #else |
120 | #define cpu_is_at91sam9261() (0) | 147 | #define cpu_is_at91sam9261() (0) |
121 | #endif | 148 | #endif |
122 | 149 | ||
123 | #ifdef CONFIG_ARCH_AT91SAM9G10 | 150 | #ifdef CONFIG_ARCH_AT91SAM9G10 |
124 | #define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) | 151 | #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) |
125 | #else | 152 | #else |
126 | #define cpu_is_at91sam9g10() (0) | 153 | #define cpu_is_at91sam9g10() (0) |
127 | #endif | 154 | #endif |
128 | 155 | ||
129 | #ifdef CONFIG_ARCH_AT91SAM9263 | 156 | #ifdef CONFIG_ARCH_AT91SAM9263 |
130 | #define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263) | 157 | #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) |
131 | #else | 158 | #else |
132 | #define cpu_is_at91sam9263() (0) | 159 | #define cpu_is_at91sam9263() (0) |
133 | #endif | 160 | #endif |
134 | 161 | ||
135 | #ifdef CONFIG_ARCH_AT91SAM9RL | 162 | #ifdef CONFIG_ARCH_AT91SAM9RL |
136 | #define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64) | 163 | #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) |
137 | #else | 164 | #else |
138 | #define cpu_is_at91sam9rl() (0) | 165 | #define cpu_is_at91sam9rl() (0) |
139 | #endif | 166 | #endif |
140 | 167 | ||
141 | #ifdef CONFIG_ARCH_AT91SAM9G45 | 168 | #ifdef CONFIG_ARCH_AT91SAM9G45 |
142 | #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) | 169 | #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) |
143 | #define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES) | 170 | #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) |
144 | #define cpu_is_at91sam9m10() (cpu_is_at91sam9g45() && \ | 171 | #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) |
145 | (at91_exid_identify() == ARCH_EXID_AT91SAM9M10)) | 172 | #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46) |
146 | #define cpu_is_at91sam9m46() (cpu_is_at91sam9g45() && \ | 173 | #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11) |
147 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G46)) | ||
148 | #define cpu_is_at91sam9m11() (cpu_is_at91sam9g45() && \ | ||
149 | (at91_exid_identify() == ARCH_EXID_AT91SAM9M11)) | ||
150 | #else | 174 | #else |
151 | #define cpu_is_at91sam9g45() (0) | 175 | #define cpu_is_at91sam9g45() (0) |
152 | #define cpu_is_at91sam9g45es() (0) | 176 | #define cpu_is_at91sam9g45es() (0) |
@@ -156,17 +180,12 @@ extern int rm9200_type; | |||
156 | #endif | 180 | #endif |
157 | 181 | ||
158 | #ifdef CONFIG_ARCH_AT91SAM9X5 | 182 | #ifdef CONFIG_ARCH_AT91SAM9X5 |
159 | #define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5) | 183 | #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) |
160 | #define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ | 184 | #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) |
161 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)) | 185 | #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) |
162 | #define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ | 186 | #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35) |
163 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)) | 187 | #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25) |
164 | #define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ | 188 | #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25) |
165 | (at91_exid_identify() == ARCH_EXID_AT91SAM9X35)) | ||
166 | #define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \ | ||
167 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G25)) | ||
168 | #define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \ | ||
169 | (at91_exid_identify() == ARCH_EXID_AT91SAM9X25)) | ||
170 | #else | 189 | #else |
171 | #define cpu_is_at91sam9x5() (0) | 190 | #define cpu_is_at91sam9x5() (0) |
172 | #define cpu_is_at91sam9g15() (0) | 191 | #define cpu_is_at91sam9g15() (0) |
@@ -177,9 +196,9 @@ extern int rm9200_type; | |||
177 | #endif | 196 | #endif |
178 | 197 | ||
179 | #ifdef CONFIG_ARCH_AT91CAP9 | 198 | #ifdef CONFIG_ARCH_AT91CAP9 |
180 | #define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) | 199 | #define cpu_is_at91cap9() (at91_soc_initdata.type == AT91_SOC_CAP9) |
181 | #define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B) | 200 | #define cpu_is_at91cap9_revB() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B) |
182 | #define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C) | 201 | #define cpu_is_at91cap9_revC() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C) |
183 | #else | 202 | #else |
184 | #define cpu_is_at91cap9() (0) | 203 | #define cpu_is_at91cap9() (0) |
185 | #define cpu_is_at91cap9_revB() (0) | 204 | #define cpu_is_at91cap9_revB() (0) |
@@ -192,4 +211,4 @@ extern int rm9200_type; | |||
192 | */ | 211 | */ |
193 | #define cpu_is_at32ap7000() (0) | 212 | #define cpu_is_at32ap7000() (0) |
194 | 213 | ||
195 | #endif | 214 | #endif /* __MACH_CPU_H__ */ |