diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9rl.h')
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9rl.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index d7bead7118da..e0073eb10144 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -69,15 +69,13 @@ | |||
69 | /* | 69 | /* |
70 | * System Peripherals (offset from AT91_BASE_SYS) | 70 | * System Peripherals (offset from AT91_BASE_SYS) |
71 | */ | 71 | */ |
72 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | ||
73 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | ||
74 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | ||
75 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 72 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
76 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | ||
77 | 73 | ||
78 | #define AT91SAM9RL_BASE_DMA 0xffffe600 | 74 | #define AT91SAM9RL_BASE_DMA 0xffffe600 |
79 | #define AT91SAM9RL_BASE_ECC 0xffffe800 | 75 | #define AT91SAM9RL_BASE_ECC 0xffffe800 |
76 | #define AT91SAM9RL_BASE_SDRAMC 0xffffea00 | ||
80 | #define AT91SAM9RL_BASE_SMC 0xffffec00 | 77 | #define AT91SAM9RL_BASE_SMC 0xffffec00 |
78 | #define AT91SAM9RL_BASE_MATRIX 0xffffee00 | ||
81 | #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 | 79 | #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 |
82 | #define AT91SAM9RL_BASE_PIOA 0xfffff400 | 80 | #define AT91SAM9RL_BASE_PIOA 0xfffff400 |
83 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 | 81 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 |
@@ -88,6 +86,7 @@ | |||
88 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | 86 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 |
89 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | 87 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 |
90 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 | 88 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 |
89 | #define AT91SAM9RL_BASE_GPBR 0xfffffd60 | ||
91 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 | 90 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 |
92 | 91 | ||
93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 | 92 | #define AT91_USART0 AT91SAM9RL_BASE_US0 |