diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9g45.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9g45.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 406bb6496805..f0c23c960dec 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
| @@ -86,27 +86,27 @@ | |||
| 86 | /* | 86 | /* |
| 87 | * System Peripherals (offset from AT91_BASE_SYS) | 87 | * System Peripherals (offset from AT91_BASE_SYS) |
| 88 | */ | 88 | */ |
| 89 | #define AT91_ECC (0xffffe200 - AT91_BASE_SYS) | ||
| 90 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) | 89 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) |
| 91 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | 90 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) |
| 92 | #define AT91_SMC (0xffffe800 - AT91_BASE_SYS) | ||
| 93 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | 91 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) |
| 94 | #define AT91_DMA (0xffffec00 - AT91_BASE_SYS) | ||
| 95 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
| 96 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
| 97 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
| 98 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
| 99 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
| 100 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
| 101 | #define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) | ||
| 102 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
| 103 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
| 104 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
| 105 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
| 106 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
| 107 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
| 108 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 94 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
| 109 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) | 95 | |
| 96 | #define AT91SAM9G45_BASE_ECC 0xffffe200 | ||
| 97 | #define AT91SAM9G45_BASE_DMA 0xffffec00 | ||
| 98 | #define AT91SAM9G45_BASE_SMC 0xffffe800 | ||
| 99 | #define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1 | ||
| 100 | #define AT91SAM9G45_BASE_PIOA 0xfffff200 | ||
| 101 | #define AT91SAM9G45_BASE_PIOB 0xfffff400 | ||
| 102 | #define AT91SAM9G45_BASE_PIOC 0xfffff600 | ||
| 103 | #define AT91SAM9G45_BASE_PIOD 0xfffff800 | ||
| 104 | #define AT91SAM9G45_BASE_PIOE 0xfffffa00 | ||
| 105 | #define AT91SAM9G45_BASE_SHDWC 0xfffffd10 | ||
| 106 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 | ||
| 107 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 | ||
| 108 | #define AT91SAM9G45_BASE_WDT 0xfffffd40 | ||
| 109 | #define AT91SAM9G45_BASE_RTC 0xfffffdb0 | ||
| 110 | 110 | ||
| 111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 | 111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 |
| 112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 | 112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 |