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-rw-r--r--arch/arm/mach-at91/clock.c69
1 files changed, 19 insertions, 50 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 9113da6845f1..61873f3aa92d 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -163,7 +163,7 @@ static struct clk udpck = {
163 .parent = &pllb, 163 .parent = &pllb,
164 .mode = pmc_sys_mode, 164 .mode = pmc_sys_mode,
165}; 165};
166static struct clk utmi_clk = { 166struct clk utmi_clk = {
167 .name = "utmi_clk", 167 .name = "utmi_clk",
168 .parent = &main_clk, 168 .parent = &main_clk,
169 .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */ 169 .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
@@ -182,7 +182,7 @@ static struct clk uhpck = {
182 * memory, interfaces to on-chip peripherals, the AIC, and sometimes more 182 * memory, interfaces to on-chip peripherals, the AIC, and sometimes more
183 * (e.g baud rate generation). It's sourced from one of the primary clocks. 183 * (e.g baud rate generation). It's sourced from one of the primary clocks.
184 */ 184 */
185static struct clk mck = { 185struct clk mck = {
186 .name = "mck", 186 .name = "mck",
187 .pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */ 187 .pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
188}; 188};
@@ -215,43 +215,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
215 return NULL; 215 return NULL;
216} 216}
217 217
218/*
219 * Associate a particular clock with a function (eg, "uart") and device.
220 * The drivers can then request the same 'function' with several different
221 * devices and not care about which clock name to use.
222 */
223void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
224{
225 struct clk *clk = clk_get(NULL, id);
226
227 if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
228 return;
229
230 clk->function = func;
231 clk->dev = dev;
232}
233
234/* clocks cannot be de-registered no refcounting necessary */
235struct clk *clk_get(struct device *dev, const char *id)
236{
237 struct clk *clk;
238
239 list_for_each_entry(clk, &clocks, node) {
240 if (strcmp(id, clk->name) == 0)
241 return clk;
242 if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
243 return clk;
244 }
245
246 return ERR_PTR(-ENOENT);
247}
248EXPORT_SYMBOL(clk_get);
249
250void clk_put(struct clk *clk)
251{
252}
253EXPORT_SYMBOL(clk_put);
254
255static void __clk_enable(struct clk *clk) 218static void __clk_enable(struct clk *clk)
256{ 219{
257 if (clk->parent) 220 if (clk->parent)
@@ -498,32 +461,38 @@ postcore_initcall(at91_clk_debugfs_init);
498/*------------------------------------------------------------------------*/ 461/*------------------------------------------------------------------------*/
499 462
500/* Register a new clock */ 463/* Register a new clock */
464static void __init at91_clk_add(struct clk *clk)
465{
466 list_add_tail(&clk->node, &clocks);
467
468 clk->cl.con_id = clk->name;
469 clk->cl.clk = clk;
470 clkdev_add(&clk->cl);
471}
472
501int __init clk_register(struct clk *clk) 473int __init clk_register(struct clk *clk)
502{ 474{
503 if (clk_is_peripheral(clk)) { 475 if (clk_is_peripheral(clk)) {
504 if (!clk->parent) 476 if (!clk->parent)
505 clk->parent = &mck; 477 clk->parent = &mck;
506 clk->mode = pmc_periph_mode; 478 clk->mode = pmc_periph_mode;
507 list_add_tail(&clk->node, &clocks);
508 } 479 }
509 else if (clk_is_sys(clk)) { 480 else if (clk_is_sys(clk)) {
510 clk->parent = &mck; 481 clk->parent = &mck;
511 clk->mode = pmc_sys_mode; 482 clk->mode = pmc_sys_mode;
512
513 list_add_tail(&clk->node, &clocks);
514 } 483 }
515#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 484#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
516 else if (clk_is_programmable(clk)) { 485 else if (clk_is_programmable(clk)) {
517 clk->mode = pmc_sys_mode; 486 clk->mode = pmc_sys_mode;
518 init_programmable_clock(clk); 487 init_programmable_clock(clk);
519 list_add_tail(&clk->node, &clocks);
520 } 488 }
521#endif 489#endif
522 490
491 at91_clk_add(clk);
492
523 return 0; 493 return 0;
524} 494}
525 495
526
527/*------------------------------------------------------------------------*/ 496/*------------------------------------------------------------------------*/
528 497
529static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg) 498static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
@@ -630,7 +599,7 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
630 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); 599 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
631 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || 600 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
632 cpu_is_at91sam9263() || cpu_is_at91sam9g20() || 601 cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
633 cpu_is_at91sam9g10() || cpu_is_at572d940hf()) { 602 cpu_is_at91sam9g10()) {
634 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 603 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
635 udpck.pmc_mask = AT91SAM926x_PMC_UDP; 604 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
636 } else if (cpu_is_at91cap9()) { 605 } else if (cpu_is_at91cap9()) {
@@ -754,19 +723,19 @@ int __init at91_clock_init(unsigned long main_clock)
754 723
755 /* Register the PMC's standard clocks */ 724 /* Register the PMC's standard clocks */
756 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) 725 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
757 list_add_tail(&standard_pmc_clocks[i]->node, &clocks); 726 at91_clk_add(standard_pmc_clocks[i]);
758 727
759 if (cpu_has_pllb()) 728 if (cpu_has_pllb())
760 list_add_tail(&pllb.node, &clocks); 729 at91_clk_add(&pllb);
761 730
762 if (cpu_has_uhp()) 731 if (cpu_has_uhp())
763 list_add_tail(&uhpck.node, &clocks); 732 at91_clk_add(&uhpck);
764 733
765 if (cpu_has_udpfs()) 734 if (cpu_has_udpfs())
766 list_add_tail(&udpck.node, &clocks); 735 at91_clk_add(&udpck);
767 736
768 if (cpu_has_utmi()) 737 if (cpu_has_utmi())
769 list_add_tail(&utmi_clk.node, &clocks); 738 at91_clk_add(&utmi_clk);
770 739
771 /* MCK and CPU clock are "always on" */ 740 /* MCK and CPU clock are "always on" */
772 clk_enable(&mck); 741 clk_enable(&mck);