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-rw-r--r--arch/arm/mach-at91/at91sam9rl.c59
1 files changed, 13 insertions, 46 deletions
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 29dff18ed130..a238105d2c11 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -16,30 +16,16 @@
16#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <mach/cpu.h> 18#include <mach/cpu.h>
19#include <mach/at91_dbgu.h>
19#include <mach/at91sam9rl.h> 20#include <mach/at91sam9rl.h>
20#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h> 23#include <mach/at91_shdwc.h>
23 24
25#include "soc.h"
24#include "generic.h" 26#include "generic.h"
25#include "clock.h" 27#include "clock.h"
26 28
27static struct map_desc at91sam9rl_io_desc[] __initdata = {
28 {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 },
34};
35
36static struct map_desc at91sam9rl_sram_desc[] __initdata = {
37 {
38 .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
39 .type = MT_DEVICE,
40 }
41};
42
43/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
44 * Clocks 30 * Clocks
45 * -------------------------------------------------------------------- */ 31 * -------------------------------------------------------------------- */
@@ -287,16 +273,11 @@ static void at91sam9rl_poweroff(void)
287 * AT91SAM9RL processor initialization 273 * AT91SAM9RL processor initialization
288 * -------------------------------------------------------------------- */ 274 * -------------------------------------------------------------------- */
289 275
290void __init at91sam9rl_map_io(void) 276static void __init at91sam9rl_map_io(void)
291{ 277{
292 unsigned long cidr, sram_size; 278 unsigned long sram_size;
293
294 /* Map peripherals */
295 iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
296
297 cidr = at91_sys_read(AT91_DBGU_CIDR);
298 279
299 switch (cidr & AT91_CIDR_SRAMSIZ) { 280 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
300 case AT91_CIDR_SRAMSIZ_32K: 281 case AT91_CIDR_SRAMSIZ_32K:
301 sram_size = 2 * SZ_16K; 282 sram_size = 2 * SZ_16K;
302 break; 283 break;
@@ -305,25 +286,16 @@ void __init at91sam9rl_map_io(void)
305 sram_size = SZ_16K; 286 sram_size = SZ_16K;
306 } 287 }
307 288
308 at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
309 at91sam9rl_sram_desc->length = sram_size;
310
311 /* Map SRAM */ 289 /* Map SRAM */
312 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); 290 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
313} 291}
314 292
315void __init at91sam9rl_initialize(unsigned long main_clock) 293static void __init at91sam9rl_initialize(void)
316{ 294{
317 at91_arch_reset = at91sam9_alt_reset; 295 at91_arch_reset = at91sam9_alt_reset;
318 pm_power_off = at91sam9rl_poweroff; 296 pm_power_off = at91sam9rl_poweroff;
319 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
320 298
321 /* Init clock subsystem */
322 at91_clock_init(main_clock);
323
324 /* Register the processor-specific clocks */
325 at91sam9rl_register_clocks();
326
327 /* Register GPIO subsystem */ 299 /* Register GPIO subsystem */
328 at91_gpio_init(at91sam9rl_gpio, 4); 300 at91_gpio_init(at91sam9rl_gpio, 4);
329} 301}
@@ -370,14 +342,9 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
370 0, /* Advanced Interrupt Controller */ 342 0, /* Advanced Interrupt Controller */
371}; 343};
372 344
373void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 345struct at91_init_soc __initdata at91sam9rl_soc = {
374{ 346 .map_io = at91sam9rl_map_io,
375 if (!priority) 347 .default_irq_priority = at91sam9rl_default_irq_priority,
376 priority = at91sam9rl_default_irq_priority; 348 .register_clocks = at91sam9rl_register_clocks,
377 349 .init = at91sam9rl_initialize,
378 /* Initialize the AIC interrupt controller */ 350};
379 at91_aic_init(priority);
380
381 /* Enable GPIO interrupts */
382 at91_gpio_irq_setup();
383}