aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-at91/at91sam9g45_devices.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-at91/at91sam9g45_devices.c')
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 809114d5a5a6..1276babf84d5 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -46,7 +46,7 @@ static struct resource hdmac_resources[] = {
46 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 46 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
47 .flags = IORESOURCE_MEM, 47 .flags = IORESOURCE_MEM,
48 }, 48 },
49 [2] = { 49 [1] = {
50 .start = AT91SAM9G45_ID_DMA, 50 .start = AT91SAM9G45_ID_DMA,
51 .end = AT91SAM9G45_ID_DMA, 51 .end = AT91SAM9G45_ID_DMA,
52 .flags = IORESOURCE_IRQ, 52 .flags = IORESOURCE_IRQ,
@@ -426,7 +426,7 @@ static struct i2c_gpio_platform_data pdata_i2c0 = {
426 .sda_is_open_drain = 1, 426 .sda_is_open_drain = 1,
427 .scl_pin = AT91_PIN_PA21, 427 .scl_pin = AT91_PIN_PA21,
428 .scl_is_open_drain = 1, 428 .scl_is_open_drain = 1,
429 .udelay = 2, /* ~100 kHz */ 429 .udelay = 5, /* ~100 kHz */
430}; 430};
431 431
432static struct platform_device at91sam9g45_twi0_device = { 432static struct platform_device at91sam9g45_twi0_device = {
@@ -440,7 +440,7 @@ static struct i2c_gpio_platform_data pdata_i2c1 = {
440 .sda_is_open_drain = 1, 440 .sda_is_open_drain = 1,
441 .scl_pin = AT91_PIN_PB11, 441 .scl_pin = AT91_PIN_PB11,
442 .scl_is_open_drain = 1, 442 .scl_is_open_drain = 1,
443 .udelay = 2, /* ~100 kHz */ 443 .udelay = 5, /* ~100 kHz */
444}; 444};
445 445
446static struct platform_device at91sam9g45_twi1_device = { 446static struct platform_device at91sam9g45_twi1_device = {
@@ -835,9 +835,9 @@ static struct platform_device at91sam9g45_tcb1_device = {
835static void __init at91_add_device_tc(void) 835static void __init at91_add_device_tc(void)
836{ 836{
837 /* this chip has one clock and irq for all six TC channels */ 837 /* this chip has one clock and irq for all six TC channels */
838 at91_clock_associate("tcb_clk", &at91sam9g45_tcb0_device.dev, "t0_clk"); 838 at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk");
839 platform_device_register(&at91sam9g45_tcb0_device); 839 platform_device_register(&at91sam9g45_tcb0_device);
840 at91_clock_associate("tcb_clk", &at91sam9g45_tcb1_device.dev, "t0_clk"); 840 at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk");
841 platform_device_register(&at91sam9g45_tcb1_device); 841 platform_device_register(&at91sam9g45_tcb1_device);
842} 842}
843#else 843#else