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Diffstat (limited to 'arch/arm/mach-at91/at91sam9g45.c')
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 5b12192e52ec..0014573dfe17 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -229,6 +229,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
229 CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk), 229 CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
230 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk), 230 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
231 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), 231 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
232 /* more tc lookup table for DT entries */
233 CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
234 CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
232 /* fake hclk clock */ 235 /* fake hclk clock */
233 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 236 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
234 CLKDEV_CON_ID("pioA", &pioA_clk), 237 CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -317,12 +320,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
317 } 320 }
318}; 321};
319 322
320static void at91sam9g45_idle(void)
321{
322 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
323 cpu_do_idle();
324}
325
326/* -------------------------------------------------------------------- 323/* --------------------------------------------------------------------
327 * AT91SAM9G45 processor initialization 324 * AT91SAM9G45 processor initialization
328 * -------------------------------------------------------------------- */ 325 * -------------------------------------------------------------------- */
@@ -337,13 +334,16 @@ static void __init at91sam9g45_ioremap_registers(void)
337{ 334{
338 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); 335 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
339 at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC); 336 at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
337 at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
338 at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
340 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); 339 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
341 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); 340 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
341 at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
342} 342}
343 343
344static void __init at91sam9g45_initialize(void) 344static void __init at91sam9g45_initialize(void)
345{ 345{
346 arm_pm_idle = at91sam9g45_idle; 346 arm_pm_idle = at91sam9_idle;
347 arm_pm_restart = at91sam9g45_restart; 347 arm_pm_restart = at91sam9g45_restart;
348 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 348 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
349 349