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-rw-r--r--arch/arm/mach-at91/at91sam9261.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 658a5185abfd..a0538c5c2520 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9261.h> 19#include <mach/at91sam9261.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
176 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 175 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
177 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 176 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
178 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), 177 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
178 CLKDEV_CON_ID("pioA", &pioA_clk),
179 CLKDEV_CON_ID("pioB", &pioB_clk),
180 CLKDEV_CON_ID("pioC", &pioC_clk),
179}; 181};
180 182
181static struct clk_lookup usart_clocks_lookups[] = { 183static struct clk_lookup usart_clocks_lookups[] = {
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id)
251 * GPIO 253 * GPIO
252 * -------------------------------------------------------------------- */ 254 * -------------------------------------------------------------------- */
253 255
254static struct at91_gpio_bank at91sam9261_gpio[] = { 256static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
255 { 257 {
256 .id = AT91SAM9261_ID_PIOA, 258 .id = AT91SAM9261_ID_PIOA,
257 .offset = AT91_PIOA, 259 .regbase = AT91SAM9261_BASE_PIOA,
258 .clock = &pioA_clk,
259 }, { 260 }, {
260 .id = AT91SAM9261_ID_PIOB, 261 .id = AT91SAM9261_ID_PIOB,
261 .offset = AT91_PIOB, 262 .regbase = AT91SAM9261_BASE_PIOB,
262 .clock = &pioB_clk,
263 }, { 263 }, {
264 .id = AT91SAM9261_ID_PIOC, 264 .id = AT91SAM9261_ID_PIOC,
265 .offset = AT91_PIOC, 265 .regbase = AT91SAM9261_BASE_PIOC,
266 .clock = &pioC_clk,
267 } 266 }
268}; 267};
269 268
270static void at91sam9261_poweroff(void)
271{
272 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
273}
274
275
276/* -------------------------------------------------------------------- 269/* --------------------------------------------------------------------
277 * AT91SAM9261 processor initialization 270 * AT91SAM9261 processor initialization
278 * -------------------------------------------------------------------- */ 271 * -------------------------------------------------------------------- */
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void)
285 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 278 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
286} 279}
287 280
281static void __init at91sam9261_ioremap_registers(void)
282{
283 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
284 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
285 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
286}
287
288static void __init at91sam9261_initialize(void) 288static void __init at91sam9261_initialize(void)
289{ 289{
290 at91_arch_reset = at91sam9_alt_reset; 290 at91_arch_reset = at91sam9_alt_reset;
291 pm_power_off = at91sam9261_poweroff;
292 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
293 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
294 293
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
341struct at91_init_soc __initdata at91sam9261_soc = { 340struct at91_init_soc __initdata at91sam9261_soc = {
342 .map_io = at91sam9261_map_io, 341 .map_io = at91sam9261_map_io,
343 .default_irq_priority = at91sam9261_default_irq_priority, 342 .default_irq_priority = at91sam9261_default_irq_priority,
343 .ioremap_registers = at91sam9261_ioremap_registers,
344 .register_clocks = at91sam9261_register_clocks, 344 .register_clocks = at91sam9261_register_clocks,
345 .init = at91sam9261_initialize, 345 .init = at91sam9261_initialize,
346}; 346};