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-rw-r--r--arch/arm/mach-at91/at91sam9260.c100
1 files changed, 21 insertions, 79 deletions
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 7d606b04d313..cb397be14448 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -17,58 +17,16 @@
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <mach/cpu.h> 19#include <mach/cpu.h>
20#include <mach/at91_dbgu.h>
20#include <mach/at91sam9260.h> 21#include <mach/at91sam9260.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 23#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h> 24#include <mach/at91_shdwc.h>
24 25
26#include "soc.h"
25#include "generic.h" 27#include "generic.h"
26#include "clock.h" 28#include "clock.h"
27 29
28static struct map_desc at91sam9260_io_desc[] __initdata = {
29 {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
32 .length = SZ_16K,
33 .type = MT_DEVICE,
34 }
35};
36
37static struct map_desc at91sam9260_sram_desc[] __initdata = {
38 {
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
41 .length = AT91SAM9260_SRAM0_SIZE,
42 .type = MT_DEVICE,
43 }, {
44 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
45 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
46 .length = AT91SAM9260_SRAM1_SIZE,
47 .type = MT_DEVICE,
48 }
49};
50
51static struct map_desc at91sam9g20_sram_desc[] __initdata = {
52 {
53 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE,
54 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM0_BASE),
55 .length = AT91SAM9G20_SRAM0_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE - AT91SAM9G20_SRAM1_SIZE,
59 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM1_BASE),
60 .length = AT91SAM9G20_SRAM1_SIZE,
61 .type = MT_DEVICE,
62 }
63};
64
65static struct map_desc at91sam9xe_sram_desc[] __initdata = {
66 {
67 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
68 .type = MT_DEVICE,
69 }
70};
71
72/* -------------------------------------------------------------------- 30/* --------------------------------------------------------------------
73 * Clocks 31 * Clocks
74 * -------------------------------------------------------------------- */ 32 * -------------------------------------------------------------------- */
@@ -330,11 +288,9 @@ static void at91sam9260_poweroff(void)
330 288
331static void __init at91sam9xe_map_io(void) 289static void __init at91sam9xe_map_io(void)
332{ 290{
333 unsigned long cidr, sram_size; 291 unsigned long sram_size;
334
335 cidr = at91_sys_read(AT91_DBGU_CIDR);
336 292
337 switch (cidr & AT91_CIDR_SRAMSIZ) { 293 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
338 case AT91_CIDR_SRAMSIZ_32K: 294 case AT91_CIDR_SRAMSIZ_32K:
339 sram_size = 2 * SZ_16K; 295 sram_size = 2 * SZ_16K;
340 break; 296 break;
@@ -343,38 +299,29 @@ static void __init at91sam9xe_map_io(void)
343 sram_size = SZ_16K; 299 sram_size = SZ_16K;
344 } 300 }
345 301
346 at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size; 302 at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
347 at91sam9xe_sram_desc->length = sram_size;
348
349 iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
350} 303}
351 304
352void __init at91sam9260_map_io(void) 305static void __init at91sam9260_map_io(void)
353{ 306{
354 /* Map peripherals */ 307 if (cpu_is_at91sam9xe()) {
355 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
356
357 if (cpu_is_at91sam9xe())
358 at91sam9xe_map_io(); 308 at91sam9xe_map_io();
359 else if (cpu_is_at91sam9g20()) 309 } else if (cpu_is_at91sam9g20()) {
360 iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc)); 310 at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
361 else 311 at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
362 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); 312 } else {
313 at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
314 at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
315 }
363} 316}
364 317
365void __init at91sam9260_initialize(unsigned long main_clock) 318static void __init at91sam9260_initialize(void)
366{ 319{
367 at91_arch_reset = at91sam9_alt_reset; 320 at91_arch_reset = at91sam9_alt_reset;
368 pm_power_off = at91sam9260_poweroff; 321 pm_power_off = at91sam9260_poweroff;
369 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 322 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
370 | (1 << AT91SAM9260_ID_IRQ2); 323 | (1 << AT91SAM9260_ID_IRQ2);
371 324
372 /* Init clock subsystem */
373 at91_clock_init(main_clock);
374
375 /* Register the processor-specific clocks */
376 at91sam9260_register_clocks();
377
378 /* Register GPIO subsystem */ 325 /* Register GPIO subsystem */
379 at91_gpio_init(at91sam9260_gpio, 3); 326 at91_gpio_init(at91sam9260_gpio, 3);
380} 327}
@@ -421,14 +368,9 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
421 0, /* Advanced Interrupt Controller */ 368 0, /* Advanced Interrupt Controller */
422}; 369};
423 370
424void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 371struct at91_init_soc __initdata at91sam9260_soc = {
425{ 372 .map_io = at91sam9260_map_io,
426 if (!priority) 373 .default_irq_priority = at91sam9260_default_irq_priority,
427 priority = at91sam9260_default_irq_priority; 374 .register_clocks = at91sam9260_register_clocks,
428 375 .init = at91sam9260_initialize,
429 /* Initialize the AIC interrupt controller */ 376};
430 at91_aic_init(priority);
431
432 /* Enable GPIO interrupts */
433 at91_gpio_irq_setup();
434}