diff options
Diffstat (limited to 'arch/arm/lib/io-writesb.S')
| -rw-r--r-- | arch/arm/lib/io-writesb.S | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S index 70b2561bdb09..08209fc640ea 100644 --- a/arch/arm/lib/io-writesb.S +++ b/arch/arm/lib/io-writesb.S | |||
| @@ -30,7 +30,7 @@ | |||
| 30 | #endif | 30 | #endif |
| 31 | .endm | 31 | .endm |
| 32 | 32 | ||
| 33 | .outsb_align: rsb ip, ip, #4 | 33 | .Loutsb_align: rsb ip, ip, #4 |
| 34 | cmp ip, r2 | 34 | cmp ip, r2 |
| 35 | movgt ip, r2 | 35 | movgt ip, r2 |
| 36 | cmp ip, #2 | 36 | cmp ip, #2 |
| @@ -41,44 +41,45 @@ | |||
| 41 | ldrgtb r3, [r1], #1 | 41 | ldrgtb r3, [r1], #1 |
| 42 | strgtb r3, [r0] | 42 | strgtb r3, [r0] |
| 43 | subs r2, r2, ip | 43 | subs r2, r2, ip |
| 44 | bne .outsb_aligned | 44 | bne .Loutsb_aligned |
| 45 | 45 | ||
| 46 | ENTRY(__raw_writesb) | 46 | ENTRY(__raw_writesb) |
| 47 | teq r2, #0 @ do we have to check for the zero len? | 47 | teq r2, #0 @ do we have to check for the zero len? |
| 48 | moveq pc, lr | 48 | moveq pc, lr |
| 49 | ands ip, r1, #3 | 49 | ands ip, r1, #3 |
| 50 | bne .outsb_align | 50 | bne .Loutsb_align |
| 51 | 51 | ||
| 52 | .outsb_aligned: stmfd sp!, {r4, r5, lr} | 52 | .Loutsb_aligned: |
| 53 | stmfd sp!, {r4, r5, lr} | ||
| 53 | 54 | ||
| 54 | subs r2, r2, #16 | 55 | subs r2, r2, #16 |
| 55 | bmi .outsb_no_16 | 56 | bmi .Loutsb_no_16 |
| 56 | 57 | ||
| 57 | .outsb_16_lp: ldmia r1!, {r3, r4, r5, ip} | 58 | .Loutsb_16_lp: ldmia r1!, {r3, r4, r5, ip} |
| 58 | outword r3 | 59 | outword r3 |
| 59 | outword r4 | 60 | outword r4 |
| 60 | outword r5 | 61 | outword r5 |
| 61 | outword ip | 62 | outword ip |
| 62 | subs r2, r2, #16 | 63 | subs r2, r2, #16 |
| 63 | bpl .outsb_16_lp | 64 | bpl .Loutsb_16_lp |
| 64 | 65 | ||
| 65 | tst r2, #15 | 66 | tst r2, #15 |
| 66 | LOADREGS(eqfd, sp!, {r4, r5, pc}) | 67 | LOADREGS(eqfd, sp!, {r4, r5, pc}) |
| 67 | 68 | ||
| 68 | .outsb_no_16: tst r2, #8 | 69 | .Loutsb_no_16: tst r2, #8 |
| 69 | beq .outsb_no_8 | 70 | beq .Loutsb_no_8 |
| 70 | 71 | ||
| 71 | ldmia r1!, {r3, r4} | 72 | ldmia r1!, {r3, r4} |
| 72 | outword r3 | 73 | outword r3 |
| 73 | outword r4 | 74 | outword r4 |
| 74 | 75 | ||
| 75 | .outsb_no_8: tst r2, #4 | 76 | .Loutsb_no_8: tst r2, #4 |
| 76 | beq .outsb_no_4 | 77 | beq .Loutsb_no_4 |
| 77 | 78 | ||
| 78 | ldr r3, [r1], #4 | 79 | ldr r3, [r1], #4 |
| 79 | outword r3 | 80 | outword r3 |
| 80 | 81 | ||
| 81 | .outsb_no_4: ands r2, r2, #3 | 82 | .Loutsb_no_4: ands r2, r2, #3 |
| 82 | LOADREGS(eqfd, sp!, {r4, r5, pc}) | 83 | LOADREGS(eqfd, sp!, {r4, r5, pc}) |
| 83 | 84 | ||
| 84 | cmp r2, #2 | 85 | cmp r2, #2 |