diff options
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r-- | arch/arm/kernel/entry-common.S | 4 | ||||
-rw-r--r-- | arch/arm/kernel/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/kernel/kprobes-test-arm.c | 4 | ||||
-rw-r--r-- | arch/arm/kernel/machine_kexec.c | 7 | ||||
-rw-r--r-- | arch/arm/kernel/perf_event.c | 4 | ||||
-rw-r--r-- | arch/arm/kernel/sched_clock.c | 18 | ||||
-rw-r--r-- | arch/arm/kernel/smp.c | 16 | ||||
-rw-r--r-- | arch/arm/kernel/smp_twd.c | 4 |
8 files changed, 32 insertions, 27 deletions
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index d863bbf0f1f5..804153c0a9cf 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -88,9 +88,9 @@ ENTRY(ret_from_fork) | |||
88 | bl schedule_tail | 88 | bl schedule_tail |
89 | cmp r5, #0 | 89 | cmp r5, #0 |
90 | movne r0, r4 | 90 | movne r0, r4 |
91 | movne lr, pc | 91 | adrne lr, BSYM(1f) |
92 | movne pc, r5 | 92 | movne pc, r5 |
93 | get_thread_info tsk | 93 | 1: get_thread_info tsk |
94 | b ret_slow_syscall | 94 | b ret_slow_syscall |
95 | ENDPROC(ret_from_fork) | 95 | ENDPROC(ret_from_fork) |
96 | 96 | ||
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 16cedb42c0c3..896165096d6a 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/list.h> | 34 | #include <linux/list.h> |
35 | #include <linux/kallsyms.h> | 35 | #include <linux/kallsyms.h> |
36 | #include <linux/proc_fs.h> | 36 | #include <linux/proc_fs.h> |
37 | #include <linux/export.h> | ||
37 | 38 | ||
38 | #include <asm/exception.h> | 39 | #include <asm/exception.h> |
39 | #include <asm/mach/arch.h> | 40 | #include <asm/mach/arch.h> |
@@ -109,6 +110,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags) | |||
109 | /* Order is clear bits in "clr" then set bits in "set" */ | 110 | /* Order is clear bits in "clr" then set bits in "set" */ |
110 | irq_modify_status(irq, clr, set & ~clr); | 111 | irq_modify_status(irq, clr, set & ~clr); |
111 | } | 112 | } |
113 | EXPORT_SYMBOL_GPL(set_irq_flags); | ||
112 | 114 | ||
113 | void __init init_IRQ(void) | 115 | void __init init_IRQ(void) |
114 | { | 116 | { |
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c index 38c1a3b103a0..839312905067 100644 --- a/arch/arm/kernel/kprobes-test-arm.c +++ b/arch/arm/kernel/kprobes-test-arm.c | |||
@@ -366,7 +366,9 @@ void kprobe_arm_test_cases(void) | |||
366 | TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") | 366 | TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") |
367 | TEST_UNSUPPORTED(".word 0xe0500090 @ undef") | 367 | TEST_UNSUPPORTED(".word 0xe0500090 @ undef") |
368 | TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") | 368 | TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") |
369 | #endif | ||
369 | 370 | ||
371 | #if __LINUX_ARM_ARCH__ >= 7 | ||
370 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") | 372 | TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") |
371 | TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") | 373 | TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") |
372 | TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") | 374 | TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") |
@@ -456,6 +458,8 @@ void kprobe_arm_test_cases(void) | |||
456 | TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ | 458 | TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ |
457 | #if __LINUX_ARM_ARCH__ >= 6 | 459 | #if __LINUX_ARM_ARCH__ >= 6 |
458 | TEST_UNSUPPORTED("ldrex r2, [sp]") | 460 | TEST_UNSUPPORTED("ldrex r2, [sp]") |
461 | #endif | ||
462 | #if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K) | ||
459 | TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") | 463 | TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") |
460 | TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") | 464 | TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") |
461 | TEST_UNSUPPORTED("strexb r0, r2, [sp]") | 465 | TEST_UNSUPPORTED("strexb r0, r2, [sp]") |
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e29c3337ca81..8ef8c9337809 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c | |||
@@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image) | |||
45 | for (i = 0; i < image->nr_segments; i++) { | 45 | for (i = 0; i < image->nr_segments; i++) { |
46 | current_segment = &image->segment[i]; | 46 | current_segment = &image->segment[i]; |
47 | 47 | ||
48 | err = memblock_is_region_memory(current_segment->mem, | 48 | if (!memblock_is_region_memory(current_segment->mem, |
49 | current_segment->memsz); | 49 | current_segment->memsz)) |
50 | if (err) | 50 | return -EINVAL; |
51 | return - EINVAL; | ||
52 | 51 | ||
53 | err = get_user(header, (__be32*)current_segment->buf); | 52 | err = get_user(header, (__be32*)current_segment->buf); |
54 | if (err) | 53 | if (err) |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 93971b1a4f0b..53c0304b734a 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event, | |||
96 | s64 period = hwc->sample_period; | 96 | s64 period = hwc->sample_period; |
97 | int ret = 0; | 97 | int ret = 0; |
98 | 98 | ||
99 | /* The period may have been changed by PERF_EVENT_IOC_PERIOD */ | ||
100 | if (unlikely(period != hwc->last_period)) | ||
101 | left = period - (hwc->last_period - left); | ||
102 | |||
99 | if (unlikely(left <= -period)) { | 103 | if (unlikely(left <= -period)) { |
100 | left = period; | 104 | left = period; |
101 | local64_set(&hwc->period_left, left); | 105 | local64_set(&hwc->period_left, left); |
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index e21bac20d90d..fc6692e2b603 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c | |||
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks) | |||
107 | update_sched_clock(); | 107 | update_sched_clock(); |
108 | } | 108 | } |
109 | 109 | ||
110 | void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, | ||
111 | unsigned long rate) | ||
112 | { | ||
113 | setup_sched_clock(read, bits, rate); | ||
114 | cd.needs_suspend = true; | ||
115 | } | ||
116 | |||
117 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | 110 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) |
118 | { | 111 | { |
119 | unsigned long r, w; | 112 | unsigned long r, w; |
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void) | |||
189 | static int sched_clock_suspend(void) | 182 | static int sched_clock_suspend(void) |
190 | { | 183 | { |
191 | sched_clock_poll(sched_clock_timer.data); | 184 | sched_clock_poll(sched_clock_timer.data); |
192 | if (cd.needs_suspend) | 185 | cd.suspended = true; |
193 | cd.suspended = true; | ||
194 | return 0; | 186 | return 0; |
195 | } | 187 | } |
196 | 188 | ||
197 | static void sched_clock_resume(void) | 189 | static void sched_clock_resume(void) |
198 | { | 190 | { |
199 | if (cd.needs_suspend) { | 191 | cd.epoch_cyc = read_sched_clock(); |
200 | cd.epoch_cyc = read_sched_clock(); | 192 | cd.epoch_cyc_copy = cd.epoch_cyc; |
201 | cd.epoch_cyc_copy = cd.epoch_cyc; | 193 | cd.suspended = false; |
202 | cd.suspended = false; | ||
203 | } | ||
204 | } | 194 | } |
205 | 195 | ||
206 | static struct syscore_ops sched_clock_ops = { | 196 | static struct syscore_ops sched_clock_ops = { |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index dd5dd0248b88..57f537731979 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -294,18 +294,24 @@ static void percpu_timer_setup(void); | |||
294 | asmlinkage void __cpuinit secondary_start_kernel(void) | 294 | asmlinkage void __cpuinit secondary_start_kernel(void) |
295 | { | 295 | { |
296 | struct mm_struct *mm = &init_mm; | 296 | struct mm_struct *mm = &init_mm; |
297 | unsigned int cpu = smp_processor_id(); | 297 | unsigned int cpu; |
298 | |||
299 | /* | ||
300 | * The identity mapping is uncached (strongly ordered), so | ||
301 | * switch away from it before attempting any exclusive accesses. | ||
302 | */ | ||
303 | cpu_switch_mm(mm->pgd, mm); | ||
304 | enter_lazy_tlb(mm, current); | ||
305 | local_flush_tlb_all(); | ||
298 | 306 | ||
299 | /* | 307 | /* |
300 | * All kernel threads share the same mm context; grab a | 308 | * All kernel threads share the same mm context; grab a |
301 | * reference and switch to it. | 309 | * reference and switch to it. |
302 | */ | 310 | */ |
311 | cpu = smp_processor_id(); | ||
303 | atomic_inc(&mm->mm_count); | 312 | atomic_inc(&mm->mm_count); |
304 | current->active_mm = mm; | 313 | current->active_mm = mm; |
305 | cpumask_set_cpu(cpu, mm_cpumask(mm)); | 314 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
306 | cpu_switch_mm(mm->pgd, mm); | ||
307 | enter_lazy_tlb(mm, current); | ||
308 | local_flush_tlb_all(); | ||
309 | 315 | ||
310 | printk("CPU%u: Booted secondary processor\n", cpu); | 316 | printk("CPU%u: Booted secondary processor\n", cpu); |
311 | 317 | ||
@@ -442,7 +448,7 @@ void show_ipi_list(struct seq_file *p, int prec) | |||
442 | for (i = 0; i < NR_IPI; i++) { | 448 | for (i = 0; i < NR_IPI; i++) { |
443 | seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); | 449 | seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); |
444 | 450 | ||
445 | for_each_present_cpu(cpu) | 451 | for_each_online_cpu(cpu) |
446 | seq_printf(p, "%10u ", | 452 | seq_printf(p, "%10u ", |
447 | __get_irq_stat(cpu, ipi_irqs[i])); | 453 | __get_irq_stat(cpu, ipi_irqs[i])); |
448 | 454 | ||
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index a2e74375945a..ff07879ad95d 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -44,10 +44,10 @@ static void twd_set_mode(enum clock_event_mode mode, | |||
44 | 44 | ||
45 | switch (mode) { | 45 | switch (mode) { |
46 | case CLOCK_EVT_MODE_PERIODIC: | 46 | case CLOCK_EVT_MODE_PERIODIC: |
47 | /* timer load already set up */ | ||
48 | ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | 47 | ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE |
49 | | TWD_TIMER_CONTROL_PERIODIC; | 48 | | TWD_TIMER_CONTROL_PERIODIC; |
50 | __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); | 49 | __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ), |
50 | twd_base + TWD_TIMER_LOAD); | ||
51 | break; | 51 | break; |
52 | case CLOCK_EVT_MODE_ONESHOT: | 52 | case CLOCK_EVT_MODE_ONESHOT: |
53 | /* period set, and timer enabled in 'next_event' hook */ | 53 | /* period set, and timer enabled in 'next_event' hook */ |