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-rw-r--r--arch/arm/kernel/dma-isa.c2
-rw-r--r--arch/arm/kernel/entry-armv.S42
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/kernel/time.c2
4 files changed, 44 insertions, 4 deletions
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c
index 0a3e9ad297d8..2f080a35a2d9 100644
--- a/arch/arm/kernel/dma-isa.c
+++ b/arch/arm/kernel/dma-isa.c
@@ -216,7 +216,7 @@ void __init isa_init_dma(dma_t *dma)
216 216
217 request_dma(DMA_ISA_CASCADE, "cascade"); 217 request_dma(DMA_ISA_CASCADE, "cascade");
218 218
219 for (i = 0; i < sizeof(dma_resources) / sizeof(dma_resources[0]); i++) 219 for (i = 0; i < ARRAY_SIZE(dma_resources); i++)
220 request_resource(&ioport_resource, dma_resources + i); 220 request_resource(&ioport_resource, dma_resources + i);
221 } 221 }
222} 222}
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 3727537f5825..a46d5b456765 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -11,8 +11,8 @@
11 * 11 *
12 * Low-level vector interface routines 12 * Low-level vector interface routines
13 * 13 *
14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction that causes 14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction
15 * it to save wrong values... Be aware! 15 * that causes it to save wrong values... Be aware!
16 */ 16 */
17 17
18#include <asm/memory.h> 18#include <asm/memory.h>
@@ -493,6 +493,13 @@ __und_usr:
493 * co-processor instructions. However, we have to watch out 493 * co-processor instructions. However, we have to watch out
494 * for the ARM6/ARM7 SWI bug. 494 * for the ARM6/ARM7 SWI bug.
495 * 495 *
496 * NEON is a special case that has to be handled here. Not all
497 * NEON instructions are co-processor instructions, so we have
498 * to make a special case of checking for them. Plus, there's
499 * five groups of them, so we have a table of mask/opcode pairs
500 * to check against, and if any match then we branch off into the
501 * NEON handler code.
502 *
496 * Emulators may wish to make use of the following registers: 503 * Emulators may wish to make use of the following registers:
497 * r0 = instruction opcode. 504 * r0 = instruction opcode.
498 * r2 = PC+4 505 * r2 = PC+4
@@ -501,6 +508,23 @@ __und_usr:
501 * lr = unrecognised instruction return address 508 * lr = unrecognised instruction return address
502 */ 509 */
503call_fpe: 510call_fpe:
511#ifdef CONFIG_NEON
512 adr r6, .LCneon_opcodes
5132:
514 ldr r7, [r6], #4 @ mask value
515 cmp r7, #0 @ end mask?
516 beq 1f
517 and r8, r0, r7
518 ldr r7, [r6], #4 @ opcode bits matching in mask
519 cmp r8, r7 @ NEON instruction?
520 bne 2b
521 get_thread_info r10
522 mov r7, #1
523 strb r7, [r10, #TI_USED_CP + 10] @ mark CP#10 as used
524 strb r7, [r10, #TI_USED_CP + 11] @ mark CP#11 as used
525 b do_vfp @ let VFP handler handle this
5261:
527#endif
504 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 528 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
505#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) 529#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
506 and r8, r0, #0x0f000000 @ mask out op-code bits 530 and r8, r0, #0x0f000000 @ mask out op-code bits
@@ -550,6 +574,20 @@ call_fpe:
550 mov pc, lr @ CP#14 (Debug) 574 mov pc, lr @ CP#14 (Debug)
551 mov pc, lr @ CP#15 (Control) 575 mov pc, lr @ CP#15 (Control)
552 576
577#ifdef CONFIG_NEON
578 .align 6
579
580.LCneon_opcodes:
581 .word 0xfe000000 @ mask
582 .word 0xf2000000 @ opcode
583
584 .word 0xff100000 @ mask
585 .word 0xf4000000 @ opcode
586
587 .word 0x00000000 @ mask
588 .word 0x00000000 @ opcode
589#endif
590
553do_fpe: 591do_fpe:
554 enable_irq 592 enable_irq
555 ldr r4, .LCfp 593 ldr r4, .LCfp
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 33e6cc2ffd3b..6c90c50a9ee3 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -72,7 +72,7 @@ no_work_pending:
72 ldr r1, [sp, #S_PSR] @ get calling cpsr 72 ldr r1, [sp, #S_PSR] @ get calling cpsr
73 ldr lr, [sp, #S_PC]! @ get pc 73 ldr lr, [sp, #S_PC]! @ get pc
74 msr spsr_cxsf, r1 @ save in spsr_svc 74 msr spsr_cxsf, r1 @ save in spsr_svc
75 ldmdb sp, {r0 - lr}^ @ get calling r1 - lr 75 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
76 mov r0, r0 76 mov r0, r0
77 add sp, sp, #S_FRAME_SIZE - S_PC 77 add sp, sp, #S_FRAME_SIZE - S_PC
78 movs pc, lr @ return & move spsr_svc into cpsr 78 movs pc, lr @ return & move spsr_svc into cpsr
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index e59b5b84168d..b5867eca1d0b 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -325,7 +325,9 @@ void timer_tick(void)
325 profile_tick(CPU_PROFILING); 325 profile_tick(CPU_PROFILING);
326 do_leds(); 326 do_leds();
327 do_set_rtc(); 327 do_set_rtc();
328 write_seqlock(&xtime_lock);
328 do_timer(1); 329 do_timer(1);
330 write_sequnlock(&xtime_lock);
329#ifndef CONFIG_SMP 331#ifndef CONFIG_SMP
330 update_process_times(user_mode(get_irq_regs())); 332 update_process_times(user_mode(get_irq_regs()));
331#endif 333#endif