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-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/fiq.c4
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index b8c1f1411440..b55cb0331809 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -115,6 +115,7 @@ ENTRY(mcount)
115 .globl mcount_call 115 .globl mcount_call
116mcount_call: 116mcount_call:
117 bl ftrace_stub 117 bl ftrace_stub
118 ldr lr, [fp, #-4] @ restore lr
118 ldmia sp!, {r0-r3, pc} 119 ldmia sp!, {r0-r3, pc}
119 120
120ENTRY(ftrace_caller) 121ENTRY(ftrace_caller)
@@ -126,6 +127,7 @@ ENTRY(ftrace_caller)
126 .globl ftrace_call 127 .globl ftrace_call
127ftrace_call: 128ftrace_call:
128 bl ftrace_stub 129 bl ftrace_stub
130 ldr lr, [fp, #-4] @ restore lr
129 ldmia sp!, {r0-r3, pc} 131 ldmia sp!, {r0-r3, pc}
130 132
131#else 133#else
@@ -137,6 +139,7 @@ ENTRY(mcount)
137 adr r0, ftrace_stub 139 adr r0, ftrace_stub
138 cmp r0, r2 140 cmp r0, r2
139 bne trace 141 bne trace
142 ldr lr, [fp, #-4] @ restore lr
140 ldmia sp!, {r0-r3, pc} 143 ldmia sp!, {r0-r3, pc}
141 144
142trace: 145trace:
@@ -145,6 +148,7 @@ trace:
145 sub r0, r0, #MCOUNT_INSN_SIZE 148 sub r0, r0, #MCOUNT_INSN_SIZE
146 mov lr, pc 149 mov lr, pc
147 mov pc, r2 150 mov pc, r2
151 mov lr, r1 @ restore lr
148 ldmia sp!, {r0-r3, pc} 152 ldmia sp!, {r0-r3, pc}
149 153
150#endif /* CONFIG_DYNAMIC_FTRACE */ 154#endif /* CONFIG_DYNAMIC_FTRACE */
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 36f81d967979..6ff7919613d7 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length)
88 * disable irqs for the duration. Note - these functions are almost 88 * disable irqs for the duration. Note - these functions are almost
89 * entirely coded in assembly. 89 * entirely coded in assembly.
90 */ 90 */
91void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs) 91void __naked set_fiq_regs(struct pt_regs *regs)
92{ 92{
93 register unsigned long tmp; 93 register unsigned long tmp;
94 asm volatile ( 94 asm volatile (
@@ -106,7 +106,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
106 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); 106 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
107} 107}
108 108
109void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs) 109void __naked get_fiq_regs(struct pt_regs *regs)
110{ 110{
111 register unsigned long tmp; 111 register unsigned long tmp;
112 asm volatile ( 112 asm volatile (