4 files changed, 15 insertions, 10 deletions

diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index 84849098c8e8..d4a0da1e48f4 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -74,9 +74,9 @@ EXPORT_SYMBOL(elf_set_personality);
  */
 int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
 {
-        if (executable_stack != EXSTACK_ENABLE_X)
+        if (executable_stack != EXSTACK_DISABLE_X)
                 return 1;
-        if (cpu_architecture() <= CPU_ARCH_ARMv6)
+        if (cpu_architecture() < CPU_ARCH_ARMv6)
                 return 1;
         return 0;
 }
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 49a6ba926c2b..159d0416f270 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -111,6 +111,7 @@ ENTRY(mcount)
         .globl mcount_call
 mcount_call:
         bl ftrace_stub
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 ENTRY(ftrace_caller)
@@ -122,6 +123,7 @@ ENTRY(ftrace_caller)
         .globl ftrace_call
 ftrace_call:
         bl ftrace_stub
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 #else
@@ -133,6 +135,7 @@ ENTRY(mcount)
         adr r0, ftrace_stub
         cmp r0, r2
         bne trace
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 trace:
@@ -141,6 +144,7 @@ trace:
         sub r0, r0, #MCOUNT_INSN_SIZE
         mov lr, pc
         mov pc, r2
+        mov lr, r1                              @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 #endif /* CONFIG_DYNAMIC_FTRACE */
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 36f81d967979..6ff7919613d7 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length)
  * disable irqs for the duration.  Note - these functions are almost
  * entirely coded in assembly.
  */
-void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
+void __naked set_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp;
         asm volatile (
@@ -106,7 +106,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
         : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
 }
 
-void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs)
+void __naked get_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp;
         asm volatile (
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7049815d66d5..68d6494c0389 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -233,12 +233,13 @@ static void __init cacheid_init(void)
         unsigned int cachetype = read_cpuid_cachetype();
         unsigned int arch = cpu_architecture();
 
-        if (arch >= CPU_ARCH_ARMv7) {
-                cacheid = CACHEID_VIPT_NONALIASING;
-                if ((cachetype & (3 << 14)) == 1 << 14)
-                        cacheid |= CACHEID_ASID_TAGGED;
-        } else if (arch >= CPU_ARCH_ARMv6) {
-                if (cachetype & (1 << 23))
+        if (arch >= CPU_ARCH_ARMv6) {
+                if ((cachetype & (7 << 29)) == 4 << 29) {
+                        /* ARMv7 register format */
+                        cacheid = CACHEID_VIPT_NONALIASING;
+                        if ((cachetype & (3 << 14)) == 1 << 14)
+                                cacheid |= CACHEID_ASID_TAGGED;
+                } else if (cachetype & (1 << 23))
                         cacheid = CACHEID_VIPT_ALIASING;
                 else
                         cacheid = CACHEID_VIPT_NONALIASING;