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Diffstat (limited to 'arch/arm/kernel/tcm.c')
-rw-r--r--arch/arm/kernel/tcm.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30e302d33e0a..01ec453bb924 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
180 */ 180 */
181void __init tcm_init(void) 181void __init tcm_init(void)
182{ 182{
183 u32 tcm_status = read_cpuid_tcmstatus(); 183 u32 tcm_status;
184 u8 dtcm_banks = (tcm_status >> 16) & 0x03; 184 u8 dtcm_banks;
185 u8 itcm_banks = (tcm_status & 0x03); 185 u8 itcm_banks;
186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; 186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; 187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
188 char *start; 188 char *start;
@@ -191,6 +191,22 @@ void __init tcm_init(void)
191 int ret; 191 int ret;
192 int i; 192 int i;
193 193
194 /*
195 * Prior to ARMv5 there is no TCM, and trying to read the status
196 * register will hang the processor.
197 */
198 if (cpu_architecture() < CPU_ARCH_ARMv5) {
199 if (dtcm_code_sz || itcm_code_sz)
200 pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
201 "ITCM code compiled in, but no TCM present "
202 "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
203 return;
204 }
205
206 tcm_status = read_cpuid_tcmstatus();
207 dtcm_banks = (tcm_status >> 16) & 0x03;
208 itcm_banks = (tcm_status & 0x03);
209
194 /* Values greater than 2 for D/ITCM banks are "reserved" */ 210 /* Values greater than 2 for D/ITCM banks are "reserved" */
195 if (dtcm_banks > 2) 211 if (dtcm_banks > 2)
196 dtcm_banks = 0; 212 dtcm_banks = 0;