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-rw-r--r--arch/arm/kernel/sleep.S5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index b907d9b790ab..1b880db2a033 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -127,6 +127,10 @@ ENDPROC(cpu_resume_after_mmu)
127 .align 127 .align
128ENTRY(cpu_resume) 128ENTRY(cpu_resume)
129ARM_BE8(setend be) @ ensure we are in BE mode 129ARM_BE8(setend be) @ ensure we are in BE mode
130#ifdef CONFIG_ARM_VIRT_EXT
131 bl __hyp_stub_install_secondary
132#endif
133 safe_svcmode_maskall r1
130 mov r1, #0 134 mov r1, #0
131 ALT_SMP(mrc p15, 0, r0, c0, c0, 5) 135 ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
132 ALT_UP_B(1f) 136 ALT_UP_B(1f)
@@ -144,7 +148,6 @@ ARM_BE8(setend be) @ ensure we are in BE mode
144 ldr r0, [r0, #SLEEP_SAVE_SP_PHYS] 148 ldr r0, [r0, #SLEEP_SAVE_SP_PHYS]
145 ldr r0, [r0, r1, lsl #2] 149 ldr r0, [r0, r1, lsl #2]
146 150
147 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
148 @ load phys pgd, stack, resume fn 151 @ load phys pgd, stack, resume fn
149 ARM( ldmia r0!, {r1, sp, pc} ) 152 ARM( ldmia r0!, {r1, sp, pc} )
150THUMB( ldmia r0!, {r1, r2, r3} ) 153THUMB( ldmia r0!, {r1, r2, r3} )