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-rw-r--r--arch/arm/kernel/setup.c28
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index bc5e4128f9f3..d4d4f77c91b2 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -25,6 +25,7 @@
25#include <linux/smp.h> 25#include <linux/smp.h>
26#include <linux/fs.h> 26#include <linux/fs.h>
27 27
28#include <asm/unified.h>
28#include <asm/cpu.h> 29#include <asm/cpu.h>
29#include <asm/cputype.h> 30#include <asm/cputype.h>
30#include <asm/elf.h> 31#include <asm/elf.h>
@@ -327,25 +328,38 @@ void cpu_init(void)
327 } 328 }
328 329
329 /* 330 /*
331 * Define the placement constraint for the inline asm directive below.
332 * In Thumb-2, msr with an immediate value is not allowed.
333 */
334#ifdef CONFIG_THUMB2_KERNEL
335#define PLC "r"
336#else
337#define PLC "I"
338#endif
339
340 /*
330 * setup stacks for re-entrant exception handlers 341 * setup stacks for re-entrant exception handlers
331 */ 342 */
332 __asm__ ( 343 __asm__ (
333 "msr cpsr_c, %1\n\t" 344 "msr cpsr_c, %1\n\t"
334 "add sp, %0, %2\n\t" 345 "add r14, %0, %2\n\t"
346 "mov sp, r14\n\t"
335 "msr cpsr_c, %3\n\t" 347 "msr cpsr_c, %3\n\t"
336 "add sp, %0, %4\n\t" 348 "add r14, %0, %4\n\t"
349 "mov sp, r14\n\t"
337 "msr cpsr_c, %5\n\t" 350 "msr cpsr_c, %5\n\t"
338 "add sp, %0, %6\n\t" 351 "add r14, %0, %6\n\t"
352 "mov sp, r14\n\t"
339 "msr cpsr_c, %7" 353 "msr cpsr_c, %7"
340 : 354 :
341 : "r" (stk), 355 : "r" (stk),
342 "I" (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), 356 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
343 "I" (offsetof(struct stack, irq[0])), 357 "I" (offsetof(struct stack, irq[0])),
344 "I" (PSR_F_BIT | PSR_I_BIT | ABT_MODE), 358 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
345 "I" (offsetof(struct stack, abt[0])), 359 "I" (offsetof(struct stack, abt[0])),
346 "I" (PSR_F_BIT | PSR_I_BIT | UND_MODE), 360 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
347 "I" (offsetof(struct stack, und[0])), 361 "I" (offsetof(struct stack, und[0])),
348 "I" (PSR_F_BIT | PSR_I_BIT | SVC_MODE) 362 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
349 : "r14"); 363 : "r14");
350} 364}
351 365