diff options
Diffstat (limited to 'arch/arm/kernel/setup.c')
-rw-r--r-- | arch/arm/kernel/setup.c | 279 |
1 files changed, 58 insertions, 221 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 2ca7038b67a7..1f1eecca7f55 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -26,11 +26,13 @@ | |||
26 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
27 | 27 | ||
28 | #include <asm/cpu.h> | 28 | #include <asm/cpu.h> |
29 | #include <asm/cputype.h> | ||
29 | #include <asm/elf.h> | 30 | #include <asm/elf.h> |
30 | #include <asm/procinfo.h> | 31 | #include <asm/procinfo.h> |
31 | #include <asm/setup.h> | 32 | #include <asm/setup.h> |
32 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
33 | #include <asm/cacheflush.h> | 34 | #include <asm/cacheflush.h> |
35 | #include <asm/cachetype.h> | ||
34 | #include <asm/tlbflush.h> | 36 | #include <asm/tlbflush.h> |
35 | 37 | ||
36 | #include <asm/mach/arch.h> | 38 | #include <asm/mach/arch.h> |
@@ -59,13 +61,14 @@ __setup("fpe=", fpe_setup); | |||
59 | 61 | ||
60 | extern void paging_init(struct meminfo *, struct machine_desc *desc); | 62 | extern void paging_init(struct meminfo *, struct machine_desc *desc); |
61 | extern void reboot_setup(char *str); | 63 | extern void reboot_setup(char *str); |
62 | extern int root_mountflags; | 64 | extern void _text, _etext, __data_start, _edata, _end; |
63 | extern void _stext, _text, _etext, __data_start, _edata, _end; | ||
64 | 65 | ||
65 | unsigned int processor_id; | 66 | unsigned int processor_id; |
66 | EXPORT_SYMBOL(processor_id); | 67 | EXPORT_SYMBOL(processor_id); |
67 | unsigned int __machine_arch_type; | 68 | unsigned int __machine_arch_type; |
68 | EXPORT_SYMBOL(__machine_arch_type); | 69 | EXPORT_SYMBOL(__machine_arch_type); |
70 | unsigned int cacheid; | ||
71 | EXPORT_SYMBOL(cacheid); | ||
69 | 72 | ||
70 | unsigned int __atags_pointer __initdata; | 73 | unsigned int __atags_pointer __initdata; |
71 | 74 | ||
@@ -81,8 +84,6 @@ EXPORT_SYMBOL(system_serial_high); | |||
81 | unsigned int elf_hwcap; | 84 | unsigned int elf_hwcap; |
82 | EXPORT_SYMBOL(elf_hwcap); | 85 | EXPORT_SYMBOL(elf_hwcap); |
83 | 86 | ||
84 | unsigned long __initdata vmalloc_reserve = 128 << 20; | ||
85 | |||
86 | 87 | ||
87 | #ifdef MULTI_CPU | 88 | #ifdef MULTI_CPU |
88 | struct processor processor; | 89 | struct processor processor; |
@@ -111,9 +112,6 @@ static struct stack stacks[NR_CPUS]; | |||
111 | char elf_platform[ELF_PLATFORM_SIZE]; | 112 | char elf_platform[ELF_PLATFORM_SIZE]; |
112 | EXPORT_SYMBOL(elf_platform); | 113 | EXPORT_SYMBOL(elf_platform); |
113 | 114 | ||
114 | unsigned long phys_initrd_start __initdata = 0; | ||
115 | unsigned long phys_initrd_size __initdata = 0; | ||
116 | |||
117 | static struct meminfo meminfo __initdata = { 0, }; | 115 | static struct meminfo meminfo __initdata = { 0, }; |
118 | static const char *cpu_name; | 116 | static const char *cpu_name; |
119 | static const char *machine_name; | 117 | static const char *machine_name; |
@@ -178,63 +176,6 @@ static struct resource io_res[] = { | |||
178 | #define lp1 io_res[1] | 176 | #define lp1 io_res[1] |
179 | #define lp2 io_res[2] | 177 | #define lp2 io_res[2] |
180 | 178 | ||
181 | static const char *cache_types[16] = { | ||
182 | "write-through", | ||
183 | "write-back", | ||
184 | "write-back", | ||
185 | "undefined 3", | ||
186 | "undefined 4", | ||
187 | "undefined 5", | ||
188 | "write-back", | ||
189 | "write-back", | ||
190 | "undefined 8", | ||
191 | "undefined 9", | ||
192 | "undefined 10", | ||
193 | "undefined 11", | ||
194 | "undefined 12", | ||
195 | "undefined 13", | ||
196 | "write-back", | ||
197 | "undefined 15", | ||
198 | }; | ||
199 | |||
200 | static const char *cache_clean[16] = { | ||
201 | "not required", | ||
202 | "read-block", | ||
203 | "cp15 c7 ops", | ||
204 | "undefined 3", | ||
205 | "undefined 4", | ||
206 | "undefined 5", | ||
207 | "cp15 c7 ops", | ||
208 | "cp15 c7 ops", | ||
209 | "undefined 8", | ||
210 | "undefined 9", | ||
211 | "undefined 10", | ||
212 | "undefined 11", | ||
213 | "undefined 12", | ||
214 | "undefined 13", | ||
215 | "cp15 c7 ops", | ||
216 | "undefined 15", | ||
217 | }; | ||
218 | |||
219 | static const char *cache_lockdown[16] = { | ||
220 | "not supported", | ||
221 | "not supported", | ||
222 | "not supported", | ||
223 | "undefined 3", | ||
224 | "undefined 4", | ||
225 | "undefined 5", | ||
226 | "format A", | ||
227 | "format B", | ||
228 | "undefined 8", | ||
229 | "undefined 9", | ||
230 | "undefined 10", | ||
231 | "undefined 11", | ||
232 | "undefined 12", | ||
233 | "undefined 13", | ||
234 | "format C", | ||
235 | "undefined 15", | ||
236 | }; | ||
237 | |||
238 | static const char *proc_arch[] = { | 179 | static const char *proc_arch[] = { |
239 | "undefined/unknown", | 180 | "undefined/unknown", |
240 | "3", | 181 | "3", |
@@ -255,61 +196,19 @@ static const char *proc_arch[] = { | |||
255 | "?(17)", | 196 | "?(17)", |
256 | }; | 197 | }; |
257 | 198 | ||
258 | #define CACHE_TYPE(x) (((x) >> 25) & 15) | ||
259 | #define CACHE_S(x) ((x) & (1 << 24)) | ||
260 | #define CACHE_DSIZE(x) (((x) >> 12) & 4095) /* only if S=1 */ | ||
261 | #define CACHE_ISIZE(x) ((x) & 4095) | ||
262 | |||
263 | #define CACHE_SIZE(y) (((y) >> 6) & 7) | ||
264 | #define CACHE_ASSOC(y) (((y) >> 3) & 7) | ||
265 | #define CACHE_M(y) ((y) & (1 << 2)) | ||
266 | #define CACHE_LINE(y) ((y) & 3) | ||
267 | |||
268 | static inline void dump_cache(const char *prefix, int cpu, unsigned int cache) | ||
269 | { | ||
270 | unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); | ||
271 | |||
272 | printk("CPU%u: %s: %d bytes, associativity %d, %d byte lines, %d sets\n", | ||
273 | cpu, prefix, | ||
274 | mult << (8 + CACHE_SIZE(cache)), | ||
275 | (mult << CACHE_ASSOC(cache)) >> 1, | ||
276 | 8 << CACHE_LINE(cache), | ||
277 | 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) - | ||
278 | CACHE_LINE(cache))); | ||
279 | } | ||
280 | |||
281 | static void __init dump_cpu_info(int cpu) | ||
282 | { | ||
283 | unsigned int info = read_cpuid(CPUID_CACHETYPE); | ||
284 | |||
285 | if (info != processor_id) { | ||
286 | printk("CPU%u: D %s %s cache\n", cpu, cache_is_vivt() ? "VIVT" : "VIPT", | ||
287 | cache_types[CACHE_TYPE(info)]); | ||
288 | if (CACHE_S(info)) { | ||
289 | dump_cache("I cache", cpu, CACHE_ISIZE(info)); | ||
290 | dump_cache("D cache", cpu, CACHE_DSIZE(info)); | ||
291 | } else { | ||
292 | dump_cache("cache", cpu, CACHE_ISIZE(info)); | ||
293 | } | ||
294 | } | ||
295 | |||
296 | if (arch_is_coherent()) | ||
297 | printk("Cache coherency enabled\n"); | ||
298 | } | ||
299 | |||
300 | int cpu_architecture(void) | 199 | int cpu_architecture(void) |
301 | { | 200 | { |
302 | int cpu_arch; | 201 | int cpu_arch; |
303 | 202 | ||
304 | if ((processor_id & 0x0008f000) == 0) { | 203 | if ((read_cpuid_id() & 0x0008f000) == 0) { |
305 | cpu_arch = CPU_ARCH_UNKNOWN; | 204 | cpu_arch = CPU_ARCH_UNKNOWN; |
306 | } else if ((processor_id & 0x0008f000) == 0x00007000) { | 205 | } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { |
307 | cpu_arch = (processor_id & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; | 206 | cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; |
308 | } else if ((processor_id & 0x00080000) == 0x00000000) { | 207 | } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) { |
309 | cpu_arch = (processor_id >> 16) & 7; | 208 | cpu_arch = (read_cpuid_id() >> 16) & 7; |
310 | if (cpu_arch) | 209 | if (cpu_arch) |
311 | cpu_arch += CPU_ARCH_ARMv3; | 210 | cpu_arch += CPU_ARCH_ARMv3; |
312 | } else if ((processor_id & 0x000f0000) == 0x000f0000) { | 211 | } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { |
313 | unsigned int mmfr0; | 212 | unsigned int mmfr0; |
314 | 213 | ||
315 | /* Revised CPUID format. Read the Memory Model Feature | 214 | /* Revised CPUID format. Read the Memory Model Feature |
@@ -330,6 +229,34 @@ int cpu_architecture(void) | |||
330 | return cpu_arch; | 229 | return cpu_arch; |
331 | } | 230 | } |
332 | 231 | ||
232 | static void __init cacheid_init(void) | ||
233 | { | ||
234 | unsigned int cachetype = read_cpuid_cachetype(); | ||
235 | unsigned int arch = cpu_architecture(); | ||
236 | |||
237 | if (arch >= CPU_ARCH_ARMv7) { | ||
238 | cacheid = CACHEID_VIPT_NONALIASING; | ||
239 | if ((cachetype & (3 << 14)) == 1 << 14) | ||
240 | cacheid |= CACHEID_ASID_TAGGED; | ||
241 | } else if (arch >= CPU_ARCH_ARMv6) { | ||
242 | if (cachetype & (1 << 23)) | ||
243 | cacheid = CACHEID_VIPT_ALIASING; | ||
244 | else | ||
245 | cacheid = CACHEID_VIPT_NONALIASING; | ||
246 | } else { | ||
247 | cacheid = CACHEID_VIVT; | ||
248 | } | ||
249 | |||
250 | printk("CPU: %s data cache, %s instruction cache\n", | ||
251 | cache_is_vivt() ? "VIVT" : | ||
252 | cache_is_vipt_aliasing() ? "VIPT aliasing" : | ||
253 | cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown", | ||
254 | cache_is_vivt() ? "VIVT" : | ||
255 | icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : | ||
256 | cache_is_vipt_aliasing() ? "VIPT aliasing" : | ||
257 | cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); | ||
258 | } | ||
259 | |||
333 | /* | 260 | /* |
334 | * These functions re-use the assembly code in head.S, which | 261 | * These functions re-use the assembly code in head.S, which |
335 | * already provide the required functionality. | 262 | * already provide the required functionality. |
@@ -346,10 +273,10 @@ static void __init setup_processor(void) | |||
346 | * types. The linker builds this table for us from the | 273 | * types. The linker builds this table for us from the |
347 | * entries in arch/arm/mm/proc-*.S | 274 | * entries in arch/arm/mm/proc-*.S |
348 | */ | 275 | */ |
349 | list = lookup_processor_type(processor_id); | 276 | list = lookup_processor_type(read_cpuid_id()); |
350 | if (!list) { | 277 | if (!list) { |
351 | printk("CPU configuration botched (ID %08x), unable " | 278 | printk("CPU configuration botched (ID %08x), unable " |
352 | "to continue.\n", processor_id); | 279 | "to continue.\n", read_cpuid_id()); |
353 | while (1); | 280 | while (1); |
354 | } | 281 | } |
355 | 282 | ||
@@ -369,7 +296,7 @@ static void __init setup_processor(void) | |||
369 | #endif | 296 | #endif |
370 | 297 | ||
371 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", | 298 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", |
372 | cpu_name, processor_id, (int)processor_id & 15, | 299 | cpu_name, read_cpuid_id(), read_cpuid_id() & 15, |
373 | proc_arch[cpu_architecture()], cr_alignment); | 300 | proc_arch[cpu_architecture()], cr_alignment); |
374 | 301 | ||
375 | sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); | 302 | sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); |
@@ -379,14 +306,14 @@ static void __init setup_processor(void) | |||
379 | elf_hwcap &= ~HWCAP_THUMB; | 306 | elf_hwcap &= ~HWCAP_THUMB; |
380 | #endif | 307 | #endif |
381 | 308 | ||
309 | cacheid_init(); | ||
382 | cpu_proc_init(); | 310 | cpu_proc_init(); |
383 | } | 311 | } |
384 | 312 | ||
385 | /* | 313 | /* |
386 | * cpu_init - initialise one CPU. | 314 | * cpu_init - initialise one CPU. |
387 | * | 315 | * |
388 | * cpu_init dumps the cache information, initialises SMP specific | 316 | * cpu_init sets up the per-CPU stacks. |
389 | * information, and sets up the per-CPU stacks. | ||
390 | */ | 317 | */ |
391 | void cpu_init(void) | 318 | void cpu_init(void) |
392 | { | 319 | { |
@@ -398,9 +325,6 @@ void cpu_init(void) | |||
398 | BUG(); | 325 | BUG(); |
399 | } | 326 | } |
400 | 327 | ||
401 | if (system_state == SYSTEM_BOOTING) | ||
402 | dump_cpu_info(cpu); | ||
403 | |||
404 | /* | 328 | /* |
405 | * setup stacks for re-entrant exception handlers | 329 | * setup stacks for re-entrant exception handlers |
406 | */ | 330 | */ |
@@ -443,20 +367,6 @@ static struct machine_desc * __init setup_machine(unsigned int nr) | |||
443 | return list; | 367 | return list; |
444 | } | 368 | } |
445 | 369 | ||
446 | static void __init early_initrd(char **p) | ||
447 | { | ||
448 | unsigned long start, size; | ||
449 | |||
450 | start = memparse(*p, p); | ||
451 | if (**p == ',') { | ||
452 | size = memparse((*p) + 1, p); | ||
453 | |||
454 | phys_initrd_start = start; | ||
455 | phys_initrd_size = size; | ||
456 | } | ||
457 | } | ||
458 | __early_param("initrd=", early_initrd); | ||
459 | |||
460 | static void __init arm_add_memory(unsigned long start, unsigned long size) | 370 | static void __init arm_add_memory(unsigned long start, unsigned long size) |
461 | { | 371 | { |
462 | struct membank *bank; | 372 | struct membank *bank; |
@@ -503,17 +413,6 @@ static void __init early_mem(char **p) | |||
503 | __early_param("mem=", early_mem); | 413 | __early_param("mem=", early_mem); |
504 | 414 | ||
505 | /* | 415 | /* |
506 | * vmalloc=size forces the vmalloc area to be exactly 'size' | ||
507 | * bytes. This can be used to increase (or decrease) the vmalloc | ||
508 | * area - the default is 128m. | ||
509 | */ | ||
510 | static void __init early_vmalloc(char **arg) | ||
511 | { | ||
512 | vmalloc_reserve = memparse(*arg, arg); | ||
513 | } | ||
514 | __early_param("vmalloc=", early_vmalloc); | ||
515 | |||
516 | /* | ||
517 | * Initial parsing of the command line. | 416 | * Initial parsing of the command line. |
518 | */ | 417 | */ |
519 | static void __init parse_cmdline(char **cmdline_p, char *from) | 418 | static void __init parse_cmdline(char **cmdline_p, char *from) |
@@ -527,12 +426,12 @@ static void __init parse_cmdline(char **cmdline_p, char *from) | |||
527 | struct early_params *p; | 426 | struct early_params *p; |
528 | 427 | ||
529 | for (p = &__early_begin; p < &__early_end; p++) { | 428 | for (p = &__early_begin; p < &__early_end; p++) { |
530 | int len = strlen(p->arg); | 429 | int arglen = strlen(p->arg); |
531 | 430 | ||
532 | if (memcmp(from, p->arg, len) == 0) { | 431 | if (memcmp(from, p->arg, arglen) == 0) { |
533 | if (to != command_line) | 432 | if (to != command_line) |
534 | to -= 1; | 433 | to -= 1; |
535 | from += len; | 434 | from += arglen; |
536 | p->fn(&from); | 435 | p->fn(&from); |
537 | 436 | ||
538 | while (*from != ' ' && *from != '\0') | 437 | while (*from != ' ' && *from != '\0') |
@@ -579,18 +478,13 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc) | |||
579 | kernel_data.end = virt_to_phys(&_end - 1); | 478 | kernel_data.end = virt_to_phys(&_end - 1); |
580 | 479 | ||
581 | for (i = 0; i < mi->nr_banks; i++) { | 480 | for (i = 0; i < mi->nr_banks; i++) { |
582 | unsigned long virt_start, virt_end; | ||
583 | |||
584 | if (mi->bank[i].size == 0) | 481 | if (mi->bank[i].size == 0) |
585 | continue; | 482 | continue; |
586 | 483 | ||
587 | virt_start = __phys_to_virt(mi->bank[i].start); | ||
588 | virt_end = virt_start + mi->bank[i].size - 1; | ||
589 | |||
590 | res = alloc_bootmem_low(sizeof(*res)); | 484 | res = alloc_bootmem_low(sizeof(*res)); |
591 | res->name = "System RAM"; | 485 | res->name = "System RAM"; |
592 | res->start = __virt_to_phys(virt_start); | 486 | res->start = mi->bank[i].start; |
593 | res->end = __virt_to_phys(virt_end); | 487 | res->end = mi->bank[i].start + mi->bank[i].size - 1; |
594 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | 488 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
595 | 489 | ||
596 | request_resource(&iomem_resource, res); | 490 | request_resource(&iomem_resource, res); |
@@ -694,26 +588,6 @@ static int __init parse_tag_ramdisk(const struct tag *tag) | |||
694 | 588 | ||
695 | __tagtable(ATAG_RAMDISK, parse_tag_ramdisk); | 589 | __tagtable(ATAG_RAMDISK, parse_tag_ramdisk); |
696 | 590 | ||
697 | static int __init parse_tag_initrd(const struct tag *tag) | ||
698 | { | ||
699 | printk(KERN_WARNING "ATAG_INITRD is deprecated; " | ||
700 | "please update your bootloader.\n"); | ||
701 | phys_initrd_start = __virt_to_phys(tag->u.initrd.start); | ||
702 | phys_initrd_size = tag->u.initrd.size; | ||
703 | return 0; | ||
704 | } | ||
705 | |||
706 | __tagtable(ATAG_INITRD, parse_tag_initrd); | ||
707 | |||
708 | static int __init parse_tag_initrd2(const struct tag *tag) | ||
709 | { | ||
710 | phys_initrd_start = tag->u.initrd.start; | ||
711 | phys_initrd_size = tag->u.initrd.size; | ||
712 | return 0; | ||
713 | } | ||
714 | |||
715 | __tagtable(ATAG_INITRD2, parse_tag_initrd2); | ||
716 | |||
717 | static int __init parse_tag_serialnr(const struct tag *tag) | 591 | static int __init parse_tag_serialnr(const struct tag *tag) |
718 | { | 592 | { |
719 | system_serial_low = tag->u.serialnr.low; | 593 | system_serial_low = tag->u.serialnr.low; |
@@ -901,28 +775,12 @@ static const char *hwcap_str[] = { | |||
901 | NULL | 775 | NULL |
902 | }; | 776 | }; |
903 | 777 | ||
904 | static void | ||
905 | c_show_cache(struct seq_file *m, const char *type, unsigned int cache) | ||
906 | { | ||
907 | unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); | ||
908 | |||
909 | seq_printf(m, "%s size\t\t: %d\n" | ||
910 | "%s assoc\t\t: %d\n" | ||
911 | "%s line length\t: %d\n" | ||
912 | "%s sets\t\t: %d\n", | ||
913 | type, mult << (8 + CACHE_SIZE(cache)), | ||
914 | type, (mult << CACHE_ASSOC(cache)) >> 1, | ||
915 | type, 8 << CACHE_LINE(cache), | ||
916 | type, 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) - | ||
917 | CACHE_LINE(cache))); | ||
918 | } | ||
919 | |||
920 | static int c_show(struct seq_file *m, void *v) | 778 | static int c_show(struct seq_file *m, void *v) |
921 | { | 779 | { |
922 | int i; | 780 | int i; |
923 | 781 | ||
924 | seq_printf(m, "Processor\t: %s rev %d (%s)\n", | 782 | seq_printf(m, "Processor\t: %s rev %d (%s)\n", |
925 | cpu_name, (int)processor_id & 15, elf_platform); | 783 | cpu_name, read_cpuid_id() & 15, elf_platform); |
926 | 784 | ||
927 | #if defined(CONFIG_SMP) | 785 | #if defined(CONFIG_SMP) |
928 | for_each_online_cpu(i) { | 786 | for_each_online_cpu(i) { |
@@ -949,47 +807,26 @@ static int c_show(struct seq_file *m, void *v) | |||
949 | if (elf_hwcap & (1 << i)) | 807 | if (elf_hwcap & (1 << i)) |
950 | seq_printf(m, "%s ", hwcap_str[i]); | 808 | seq_printf(m, "%s ", hwcap_str[i]); |
951 | 809 | ||
952 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24); | 810 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); |
953 | seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); | 811 | seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); |
954 | 812 | ||
955 | if ((processor_id & 0x0008f000) == 0x00000000) { | 813 | if ((read_cpuid_id() & 0x0008f000) == 0x00000000) { |
956 | /* pre-ARM7 */ | 814 | /* pre-ARM7 */ |
957 | seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4); | 815 | seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4); |
958 | } else { | 816 | } else { |
959 | if ((processor_id & 0x0008f000) == 0x00007000) { | 817 | if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { |
960 | /* ARM7 */ | 818 | /* ARM7 */ |
961 | seq_printf(m, "CPU variant\t: 0x%02x\n", | 819 | seq_printf(m, "CPU variant\t: 0x%02x\n", |
962 | (processor_id >> 16) & 127); | 820 | (read_cpuid_id() >> 16) & 127); |
963 | } else { | 821 | } else { |
964 | /* post-ARM7 */ | 822 | /* post-ARM7 */ |
965 | seq_printf(m, "CPU variant\t: 0x%x\n", | 823 | seq_printf(m, "CPU variant\t: 0x%x\n", |
966 | (processor_id >> 20) & 15); | 824 | (read_cpuid_id() >> 20) & 15); |
967 | } | 825 | } |
968 | seq_printf(m, "CPU part\t: 0x%03x\n", | 826 | seq_printf(m, "CPU part\t: 0x%03x\n", |
969 | (processor_id >> 4) & 0xfff); | 827 | (read_cpuid_id() >> 4) & 0xfff); |
970 | } | ||
971 | seq_printf(m, "CPU revision\t: %d\n", processor_id & 15); | ||
972 | |||
973 | { | ||
974 | unsigned int cache_info = read_cpuid(CPUID_CACHETYPE); | ||
975 | if (cache_info != processor_id) { | ||
976 | seq_printf(m, "Cache type\t: %s\n" | ||
977 | "Cache clean\t: %s\n" | ||
978 | "Cache lockdown\t: %s\n" | ||
979 | "Cache format\t: %s\n", | ||
980 | cache_types[CACHE_TYPE(cache_info)], | ||
981 | cache_clean[CACHE_TYPE(cache_info)], | ||
982 | cache_lockdown[CACHE_TYPE(cache_info)], | ||
983 | CACHE_S(cache_info) ? "Harvard" : "Unified"); | ||
984 | |||
985 | if (CACHE_S(cache_info)) { | ||
986 | c_show_cache(m, "I", CACHE_ISIZE(cache_info)); | ||
987 | c_show_cache(m, "D", CACHE_DSIZE(cache_info)); | ||
988 | } else { | ||
989 | c_show_cache(m, "Cache", CACHE_ISIZE(cache_info)); | ||
990 | } | ||
991 | } | ||
992 | } | 828 | } |
829 | seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); | ||
993 | 830 | ||
994 | seq_puts(m, "\n"); | 831 | seq_puts(m, "\n"); |
995 | 832 | ||