diff options
Diffstat (limited to 'arch/arm/kernel/probes-thumb.c')
-rw-r--r-- | arch/arm/kernel/probes-thumb.c | 882 |
1 files changed, 882 insertions, 0 deletions
diff --git a/arch/arm/kernel/probes-thumb.c b/arch/arm/kernel/probes-thumb.c new file mode 100644 index 000000000000..4131351e812f --- /dev/null +++ b/arch/arm/kernel/probes-thumb.c | |||
@@ -0,0 +1,882 @@ | |||
1 | /* | ||
2 | * arch/arm/kernel/probes-thumb.c | ||
3 | * | ||
4 | * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/stddef.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/module.h> | ||
14 | |||
15 | #include "probes.h" | ||
16 | #include "probes-thumb.h" | ||
17 | |||
18 | |||
19 | static const union decode_item t32_table_1110_100x_x0xx[] = { | ||
20 | /* Load/store multiple instructions */ | ||
21 | |||
22 | /* Rn is PC 1110 100x x0xx 1111 xxxx xxxx xxxx xxxx */ | ||
23 | DECODE_REJECT (0xfe4f0000, 0xe80f0000), | ||
24 | |||
25 | /* SRS 1110 1000 00x0 xxxx xxxx xxxx xxxx xxxx */ | ||
26 | /* RFE 1110 1000 00x1 xxxx xxxx xxxx xxxx xxxx */ | ||
27 | DECODE_REJECT (0xffc00000, 0xe8000000), | ||
28 | /* SRS 1110 1001 10x0 xxxx xxxx xxxx xxxx xxxx */ | ||
29 | /* RFE 1110 1001 10x1 xxxx xxxx xxxx xxxx xxxx */ | ||
30 | DECODE_REJECT (0xffc00000, 0xe9800000), | ||
31 | |||
32 | /* STM Rn, {...pc} 1110 100x x0x0 xxxx 1xxx xxxx xxxx xxxx */ | ||
33 | DECODE_REJECT (0xfe508000, 0xe8008000), | ||
34 | /* LDM Rn, {...lr,pc} 1110 100x x0x1 xxxx 11xx xxxx xxxx xxxx */ | ||
35 | DECODE_REJECT (0xfe50c000, 0xe810c000), | ||
36 | /* LDM/STM Rn, {...sp} 1110 100x x0xx xxxx xx1x xxxx xxxx xxxx */ | ||
37 | DECODE_REJECT (0xfe402000, 0xe8002000), | ||
38 | |||
39 | /* STMIA 1110 1000 10x0 xxxx xxxx xxxx xxxx xxxx */ | ||
40 | /* LDMIA 1110 1000 10x1 xxxx xxxx xxxx xxxx xxxx */ | ||
41 | /* STMDB 1110 1001 00x0 xxxx xxxx xxxx xxxx xxxx */ | ||
42 | /* LDMDB 1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */ | ||
43 | DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM), | ||
44 | |||
45 | DECODE_END | ||
46 | }; | ||
47 | |||
48 | static const union decode_item t32_table_1110_100x_x1xx[] = { | ||
49 | /* Load/store dual, load/store exclusive, table branch */ | ||
50 | |||
51 | /* STRD (immediate) 1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */ | ||
52 | /* LDRD (immediate) 1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */ | ||
53 | DECODE_OR (0xff600000, 0xe8600000), | ||
54 | /* STRD (immediate) 1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */ | ||
55 | /* LDRD (immediate) 1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */ | ||
56 | DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD, | ||
57 | REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), | ||
58 | |||
59 | /* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */ | ||
60 | /* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */ | ||
61 | DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, PROBES_T32_TABLE_BRANCH, | ||
62 | REGS(NOSP, 0, 0, 0, NOSPPC)), | ||
63 | |||
64 | /* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */ | ||
65 | /* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */ | ||
66 | /* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */ | ||
67 | /* STREXH 1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */ | ||
68 | /* STREXD 1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */ | ||
69 | /* LDREXB 1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */ | ||
70 | /* LDREXH 1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */ | ||
71 | /* LDREXD 1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */ | ||
72 | /* And unallocated instructions... */ | ||
73 | DECODE_END | ||
74 | }; | ||
75 | |||
76 | static const union decode_item t32_table_1110_101x[] = { | ||
77 | /* Data-processing (shifted register) */ | ||
78 | |||
79 | /* TST 1110 1010 0001 xxxx xxxx 1111 xxxx xxxx */ | ||
80 | /* TEQ 1110 1010 1001 xxxx xxxx 1111 xxxx xxxx */ | ||
81 | DECODE_EMULATEX (0xff700f00, 0xea100f00, PROBES_T32_TST, | ||
82 | REGS(NOSPPC, 0, 0, 0, NOSPPC)), | ||
83 | |||
84 | /* CMN 1110 1011 0001 xxxx xxxx 1111 xxxx xxxx */ | ||
85 | DECODE_OR (0xfff00f00, 0xeb100f00), | ||
86 | /* CMP 1110 1011 1011 xxxx xxxx 1111 xxxx xxxx */ | ||
87 | DECODE_EMULATEX (0xfff00f00, 0xebb00f00, PROBES_T32_TST, | ||
88 | REGS(NOPC, 0, 0, 0, NOSPPC)), | ||
89 | |||
90 | /* MOV 1110 1010 010x 1111 xxxx xxxx xxxx xxxx */ | ||
91 | /* MVN 1110 1010 011x 1111 xxxx xxxx xxxx xxxx */ | ||
92 | DECODE_EMULATEX (0xffcf0000, 0xea4f0000, PROBES_T32_MOV, | ||
93 | REGS(0, 0, NOSPPC, 0, NOSPPC)), | ||
94 | |||
95 | /* ??? 1110 1010 101x xxxx xxxx xxxx xxxx xxxx */ | ||
96 | /* ??? 1110 1010 111x xxxx xxxx xxxx xxxx xxxx */ | ||
97 | DECODE_REJECT (0xffa00000, 0xeaa00000), | ||
98 | /* ??? 1110 1011 001x xxxx xxxx xxxx xxxx xxxx */ | ||
99 | DECODE_REJECT (0xffe00000, 0xeb200000), | ||
100 | /* ??? 1110 1011 100x xxxx xxxx xxxx xxxx xxxx */ | ||
101 | DECODE_REJECT (0xffe00000, 0xeb800000), | ||
102 | /* ??? 1110 1011 111x xxxx xxxx xxxx xxxx xxxx */ | ||
103 | DECODE_REJECT (0xffe00000, 0xebe00000), | ||
104 | |||
105 | /* ADD/SUB SP, SP, Rm, LSL #0..3 */ | ||
106 | /* 1110 1011 x0xx 1101 x000 1101 xx00 xxxx */ | ||
107 | DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d00, PROBES_T32_ADDSUB, | ||
108 | REGS(SP, 0, SP, 0, NOSPPC)), | ||
109 | |||
110 | /* ADD/SUB SP, SP, Rm, shift */ | ||
111 | /* 1110 1011 x0xx 1101 xxxx 1101 xxxx xxxx */ | ||
112 | DECODE_REJECT (0xff4f0f00, 0xeb0d0d00), | ||
113 | |||
114 | /* ADD/SUB Rd, SP, Rm, shift */ | ||
115 | /* 1110 1011 x0xx 1101 xxxx xxxx xxxx xxxx */ | ||
116 | DECODE_EMULATEX (0xff4f0000, 0xeb0d0000, PROBES_T32_ADDSUB, | ||
117 | REGS(SP, 0, NOPC, 0, NOSPPC)), | ||
118 | |||
119 | /* AND 1110 1010 000x xxxx xxxx xxxx xxxx xxxx */ | ||
120 | /* BIC 1110 1010 001x xxxx xxxx xxxx xxxx xxxx */ | ||
121 | /* ORR 1110 1010 010x xxxx xxxx xxxx xxxx xxxx */ | ||
122 | /* ORN 1110 1010 011x xxxx xxxx xxxx xxxx xxxx */ | ||
123 | /* EOR 1110 1010 100x xxxx xxxx xxxx xxxx xxxx */ | ||
124 | /* PKH 1110 1010 110x xxxx xxxx xxxx xxxx xxxx */ | ||
125 | /* ADD 1110 1011 000x xxxx xxxx xxxx xxxx xxxx */ | ||
126 | /* ADC 1110 1011 010x xxxx xxxx xxxx xxxx xxxx */ | ||
127 | /* SBC 1110 1011 011x xxxx xxxx xxxx xxxx xxxx */ | ||
128 | /* SUB 1110 1011 101x xxxx xxxx xxxx xxxx xxxx */ | ||
129 | /* RSB 1110 1011 110x xxxx xxxx xxxx xxxx xxxx */ | ||
130 | DECODE_EMULATEX (0xfe000000, 0xea000000, PROBES_T32_LOGICAL, | ||
131 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), | ||
132 | |||
133 | DECODE_END | ||
134 | }; | ||
135 | |||
136 | static const union decode_item t32_table_1111_0x0x___0[] = { | ||
137 | /* Data-processing (modified immediate) */ | ||
138 | |||
139 | /* TST 1111 0x00 0001 xxxx 0xxx 1111 xxxx xxxx */ | ||
140 | /* TEQ 1111 0x00 1001 xxxx 0xxx 1111 xxxx xxxx */ | ||
141 | DECODE_EMULATEX (0xfb708f00, 0xf0100f00, PROBES_T32_TST, | ||
142 | REGS(NOSPPC, 0, 0, 0, 0)), | ||
143 | |||
144 | /* CMN 1111 0x01 0001 xxxx 0xxx 1111 xxxx xxxx */ | ||
145 | DECODE_OR (0xfbf08f00, 0xf1100f00), | ||
146 | /* CMP 1111 0x01 1011 xxxx 0xxx 1111 xxxx xxxx */ | ||
147 | DECODE_EMULATEX (0xfbf08f00, 0xf1b00f00, PROBES_T32_CMP, | ||
148 | REGS(NOPC, 0, 0, 0, 0)), | ||
149 | |||
150 | /* MOV 1111 0x00 010x 1111 0xxx xxxx xxxx xxxx */ | ||
151 | /* MVN 1111 0x00 011x 1111 0xxx xxxx xxxx xxxx */ | ||
152 | DECODE_EMULATEX (0xfbcf8000, 0xf04f0000, PROBES_T32_MOV, | ||
153 | REGS(0, 0, NOSPPC, 0, 0)), | ||
154 | |||
155 | /* ??? 1111 0x00 101x xxxx 0xxx xxxx xxxx xxxx */ | ||
156 | DECODE_REJECT (0xfbe08000, 0xf0a00000), | ||
157 | /* ??? 1111 0x00 110x xxxx 0xxx xxxx xxxx xxxx */ | ||
158 | /* ??? 1111 0x00 111x xxxx 0xxx xxxx xxxx xxxx */ | ||
159 | DECODE_REJECT (0xfbc08000, 0xf0c00000), | ||
160 | /* ??? 1111 0x01 001x xxxx 0xxx xxxx xxxx xxxx */ | ||
161 | DECODE_REJECT (0xfbe08000, 0xf1200000), | ||
162 | /* ??? 1111 0x01 100x xxxx 0xxx xxxx xxxx xxxx */ | ||
163 | DECODE_REJECT (0xfbe08000, 0xf1800000), | ||
164 | /* ??? 1111 0x01 111x xxxx 0xxx xxxx xxxx xxxx */ | ||
165 | DECODE_REJECT (0xfbe08000, 0xf1e00000), | ||
166 | |||
167 | /* ADD Rd, SP, #imm 1111 0x01 000x 1101 0xxx xxxx xxxx xxxx */ | ||
168 | /* SUB Rd, SP, #imm 1111 0x01 101x 1101 0xxx xxxx xxxx xxxx */ | ||
169 | DECODE_EMULATEX (0xfb4f8000, 0xf10d0000, PROBES_T32_ADDSUB, | ||
170 | REGS(SP, 0, NOPC, 0, 0)), | ||
171 | |||
172 | /* AND 1111 0x00 000x xxxx 0xxx xxxx xxxx xxxx */ | ||
173 | /* BIC 1111 0x00 001x xxxx 0xxx xxxx xxxx xxxx */ | ||
174 | /* ORR 1111 0x00 010x xxxx 0xxx xxxx xxxx xxxx */ | ||
175 | /* ORN 1111 0x00 011x xxxx 0xxx xxxx xxxx xxxx */ | ||
176 | /* EOR 1111 0x00 100x xxxx 0xxx xxxx xxxx xxxx */ | ||
177 | /* ADD 1111 0x01 000x xxxx 0xxx xxxx xxxx xxxx */ | ||
178 | /* ADC 1111 0x01 010x xxxx 0xxx xxxx xxxx xxxx */ | ||
179 | /* SBC 1111 0x01 011x xxxx 0xxx xxxx xxxx xxxx */ | ||
180 | /* SUB 1111 0x01 101x xxxx 0xxx xxxx xxxx xxxx */ | ||
181 | /* RSB 1111 0x01 110x xxxx 0xxx xxxx xxxx xxxx */ | ||
182 | DECODE_EMULATEX (0xfa008000, 0xf0000000, PROBES_T32_LOGICAL, | ||
183 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), | ||
184 | |||
185 | DECODE_END | ||
186 | }; | ||
187 | |||
188 | static const union decode_item t32_table_1111_0x1x___0[] = { | ||
189 | /* Data-processing (plain binary immediate) */ | ||
190 | |||
191 | /* ADDW Rd, PC, #imm 1111 0x10 0000 1111 0xxx xxxx xxxx xxxx */ | ||
192 | DECODE_OR (0xfbff8000, 0xf20f0000), | ||
193 | /* SUBW Rd, PC, #imm 1111 0x10 1010 1111 0xxx xxxx xxxx xxxx */ | ||
194 | DECODE_EMULATEX (0xfbff8000, 0xf2af0000, PROBES_T32_ADDWSUBW_PC, | ||
195 | REGS(PC, 0, NOSPPC, 0, 0)), | ||
196 | |||
197 | /* ADDW SP, SP, #imm 1111 0x10 0000 1101 0xxx 1101 xxxx xxxx */ | ||
198 | DECODE_OR (0xfbff8f00, 0xf20d0d00), | ||
199 | /* SUBW SP, SP, #imm 1111 0x10 1010 1101 0xxx 1101 xxxx xxxx */ | ||
200 | DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d00, PROBES_T32_ADDWSUBW, | ||
201 | REGS(SP, 0, SP, 0, 0)), | ||
202 | |||
203 | /* ADDW 1111 0x10 0000 xxxx 0xxx xxxx xxxx xxxx */ | ||
204 | DECODE_OR (0xfbf08000, 0xf2000000), | ||
205 | /* SUBW 1111 0x10 1010 xxxx 0xxx xxxx xxxx xxxx */ | ||
206 | DECODE_EMULATEX (0xfbf08000, 0xf2a00000, PROBES_T32_ADDWSUBW, | ||
207 | REGS(NOPCX, 0, NOSPPC, 0, 0)), | ||
208 | |||
209 | /* MOVW 1111 0x10 0100 xxxx 0xxx xxxx xxxx xxxx */ | ||
210 | /* MOVT 1111 0x10 1100 xxxx 0xxx xxxx xxxx xxxx */ | ||
211 | DECODE_EMULATEX (0xfb708000, 0xf2400000, PROBES_T32_MOVW, | ||
212 | REGS(0, 0, NOSPPC, 0, 0)), | ||
213 | |||
214 | /* SSAT16 1111 0x11 0010 xxxx 0000 xxxx 00xx xxxx */ | ||
215 | /* SSAT 1111 0x11 00x0 xxxx 0xxx xxxx xxxx xxxx */ | ||
216 | /* USAT16 1111 0x11 1010 xxxx 0000 xxxx 00xx xxxx */ | ||
217 | /* USAT 1111 0x11 10x0 xxxx 0xxx xxxx xxxx xxxx */ | ||
218 | DECODE_EMULATEX (0xfb508000, 0xf3000000, PROBES_T32_SAT, | ||
219 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), | ||
220 | |||
221 | /* SFBX 1111 0x11 0100 xxxx 0xxx xxxx xxxx xxxx */ | ||
222 | /* UFBX 1111 0x11 1100 xxxx 0xxx xxxx xxxx xxxx */ | ||
223 | DECODE_EMULATEX (0xfb708000, 0xf3400000, PROBES_T32_BITFIELD, | ||
224 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), | ||
225 | |||
226 | /* BFC 1111 0x11 0110 1111 0xxx xxxx xxxx xxxx */ | ||
227 | DECODE_EMULATEX (0xfbff8000, 0xf36f0000, PROBES_T32_BITFIELD, | ||
228 | REGS(0, 0, NOSPPC, 0, 0)), | ||
229 | |||
230 | /* BFI 1111 0x11 0110 xxxx 0xxx xxxx xxxx xxxx */ | ||
231 | DECODE_EMULATEX (0xfbf08000, 0xf3600000, PROBES_T32_BITFIELD, | ||
232 | REGS(NOSPPCX, 0, NOSPPC, 0, 0)), | ||
233 | |||
234 | DECODE_END | ||
235 | }; | ||
236 | |||
237 | static const union decode_item t32_table_1111_0xxx___1[] = { | ||
238 | /* Branches and miscellaneous control */ | ||
239 | |||
240 | /* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */ | ||
241 | DECODE_OR (0xfff0d7ff, 0xf3a08001), | ||
242 | /* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */ | ||
243 | DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, PROBES_T32_SEV), | ||
244 | /* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */ | ||
245 | /* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */ | ||
246 | /* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */ | ||
247 | DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, PROBES_T32_WFE), | ||
248 | |||
249 | /* MRS Rd, CPSR 1111 0011 1110 xxxx 10x0 xxxx xxxx xxxx */ | ||
250 | DECODE_SIMULATEX(0xfff0d000, 0xf3e08000, PROBES_T32_MRS, | ||
251 | REGS(0, 0, NOSPPC, 0, 0)), | ||
252 | |||
253 | /* | ||
254 | * Unsupported instructions | ||
255 | * 1111 0x11 1xxx xxxx 10x0 xxxx xxxx xxxx | ||
256 | * | ||
257 | * MSR 1111 0011 100x xxxx 10x0 xxxx xxxx xxxx | ||
258 | * DBG hint 1111 0011 1010 xxxx 10x0 x000 1111 xxxx | ||
259 | * Unallocated hints 1111 0011 1010 xxxx 10x0 x000 xxxx xxxx | ||
260 | * CPS 1111 0011 1010 xxxx 10x0 xxxx xxxx xxxx | ||
261 | * CLREX/DSB/DMB/ISB 1111 0011 1011 xxxx 10x0 xxxx xxxx xxxx | ||
262 | * BXJ 1111 0011 1100 xxxx 10x0 xxxx xxxx xxxx | ||
263 | * SUBS PC,LR,#<imm8> 1111 0011 1101 xxxx 10x0 xxxx xxxx xxxx | ||
264 | * MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx | ||
265 | * SMC 1111 0111 1111 xxxx 1000 xxxx xxxx xxxx | ||
266 | * UNDEFINED 1111 0111 1111 xxxx 1010 xxxx xxxx xxxx | ||
267 | * ??? 1111 0111 1xxx xxxx 1010 xxxx xxxx xxxx | ||
268 | */ | ||
269 | DECODE_REJECT (0xfb80d000, 0xf3808000), | ||
270 | |||
271 | /* Bcc 1111 0xxx xxxx xxxx 10x0 xxxx xxxx xxxx */ | ||
272 | DECODE_CUSTOM (0xf800d000, 0xf0008000, PROBES_T32_BRANCH_COND), | ||
273 | |||
274 | /* BLX 1111 0xxx xxxx xxxx 11x0 xxxx xxxx xxx0 */ | ||
275 | DECODE_OR (0xf800d001, 0xf000c000), | ||
276 | /* B 1111 0xxx xxxx xxxx 10x1 xxxx xxxx xxxx */ | ||
277 | /* BL 1111 0xxx xxxx xxxx 11x1 xxxx xxxx xxxx */ | ||
278 | DECODE_SIMULATE (0xf8009000, 0xf0009000, PROBES_T32_BRANCH), | ||
279 | |||
280 | DECODE_END | ||
281 | }; | ||
282 | |||
283 | static const union decode_item t32_table_1111_100x_x0x1__1111[] = { | ||
284 | /* Memory hints */ | ||
285 | |||
286 | /* PLD (literal) 1111 1000 x001 1111 1111 xxxx xxxx xxxx */ | ||
287 | /* PLI (literal) 1111 1001 x001 1111 1111 xxxx xxxx xxxx */ | ||
288 | DECODE_SIMULATE (0xfe7ff000, 0xf81ff000, PROBES_T32_PLDI), | ||
289 | |||
290 | /* PLD{W} (immediate) 1111 1000 10x1 xxxx 1111 xxxx xxxx xxxx */ | ||
291 | DECODE_OR (0xffd0f000, 0xf890f000), | ||
292 | /* PLD{W} (immediate) 1111 1000 00x1 xxxx 1111 1100 xxxx xxxx */ | ||
293 | DECODE_OR (0xffd0ff00, 0xf810fc00), | ||
294 | /* PLI (immediate) 1111 1001 1001 xxxx 1111 xxxx xxxx xxxx */ | ||
295 | DECODE_OR (0xfff0f000, 0xf990f000), | ||
296 | /* PLI (immediate) 1111 1001 0001 xxxx 1111 1100 xxxx xxxx */ | ||
297 | DECODE_SIMULATEX(0xfff0ff00, 0xf910fc00, PROBES_T32_PLDI, | ||
298 | REGS(NOPCX, 0, 0, 0, 0)), | ||
299 | |||
300 | /* PLD{W} (register) 1111 1000 00x1 xxxx 1111 0000 00xx xxxx */ | ||
301 | DECODE_OR (0xffd0ffc0, 0xf810f000), | ||
302 | /* PLI (register) 1111 1001 0001 xxxx 1111 0000 00xx xxxx */ | ||
303 | DECODE_SIMULATEX(0xfff0ffc0, 0xf910f000, PROBES_T32_PLDI, | ||
304 | REGS(NOPCX, 0, 0, 0, NOSPPC)), | ||
305 | |||
306 | /* Other unallocated instructions... */ | ||
307 | DECODE_END | ||
308 | }; | ||
309 | |||
310 | static const union decode_item t32_table_1111_100x[] = { | ||
311 | /* Store/Load single data item */ | ||
312 | |||
313 | /* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */ | ||
314 | DECODE_REJECT (0xfe600000, 0xf8600000), | ||
315 | |||
316 | /* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */ | ||
317 | DECODE_REJECT (0xfff00000, 0xf9500000), | ||
318 | |||
319 | /* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */ | ||
320 | DECODE_REJECT (0xfe800d00, 0xf8000800), | ||
321 | |||
322 | /* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */ | ||
323 | /* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */ | ||
324 | /* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */ | ||
325 | /* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */ | ||
326 | /* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */ | ||
327 | /* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */ | ||
328 | /* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */ | ||
329 | /* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */ | ||
330 | DECODE_REJECT (0xfe800f00, 0xf8000e00), | ||
331 | |||
332 | /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */ | ||
333 | DECODE_REJECT (0xff1f0000, 0xf80f0000), | ||
334 | |||
335 | /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */ | ||
336 | DECODE_REJECT (0xff10f000, 0xf800f000), | ||
337 | |||
338 | /* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */ | ||
339 | DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, PROBES_T32_LDR_LIT, | ||
340 | REGS(PC, ANY, 0, 0, 0)), | ||
341 | |||
342 | /* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */ | ||
343 | /* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */ | ||
344 | DECODE_OR (0xffe00800, 0xf8400800), | ||
345 | /* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */ | ||
346 | /* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */ | ||
347 | DECODE_EMULATEX (0xffe00000, 0xf8c00000, PROBES_T32_LDRSTR, | ||
348 | REGS(NOPCX, ANY, 0, 0, 0)), | ||
349 | |||
350 | /* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */ | ||
351 | /* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */ | ||
352 | DECODE_EMULATEX (0xffe00fc0, 0xf8400000, PROBES_T32_LDRSTR, | ||
353 | REGS(NOPCX, ANY, 0, 0, NOSPPC)), | ||
354 | |||
355 | /* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */ | ||
356 | /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */ | ||
357 | /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */ | ||
358 | /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */ | ||
359 | DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, PROBES_T32_LDR_LIT, | ||
360 | REGS(PC, NOSPPCX, 0, 0, 0)), | ||
361 | |||
362 | /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */ | ||
363 | /* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */ | ||
364 | /* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */ | ||
365 | /* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */ | ||
366 | /* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */ | ||
367 | /* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */ | ||
368 | DECODE_OR (0xfec00800, 0xf8000800), | ||
369 | /* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */ | ||
370 | /* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */ | ||
371 | /* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */ | ||
372 | /* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */ | ||
373 | /* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */ | ||
374 | /* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */ | ||
375 | DECODE_EMULATEX (0xfec00000, 0xf8800000, PROBES_T32_LDRSTR, | ||
376 | REGS(NOPCX, NOSPPCX, 0, 0, 0)), | ||
377 | |||
378 | /* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */ | ||
379 | /* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */ | ||
380 | /* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */ | ||
381 | /* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */ | ||
382 | /* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */ | ||
383 | /* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */ | ||
384 | DECODE_EMULATEX (0xfe800fc0, 0xf8000000, PROBES_T32_LDRSTR, | ||
385 | REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)), | ||
386 | |||
387 | /* Other unallocated instructions... */ | ||
388 | DECODE_END | ||
389 | }; | ||
390 | |||
391 | static const union decode_item t32_table_1111_1010___1111[] = { | ||
392 | /* Data-processing (register) */ | ||
393 | |||
394 | /* ??? 1111 1010 011x xxxx 1111 xxxx 1xxx xxxx */ | ||
395 | DECODE_REJECT (0xffe0f080, 0xfa60f080), | ||
396 | |||
397 | /* SXTH 1111 1010 0000 1111 1111 xxxx 1xxx xxxx */ | ||
398 | /* UXTH 1111 1010 0001 1111 1111 xxxx 1xxx xxxx */ | ||
399 | /* SXTB16 1111 1010 0010 1111 1111 xxxx 1xxx xxxx */ | ||
400 | /* UXTB16 1111 1010 0011 1111 1111 xxxx 1xxx xxxx */ | ||
401 | /* SXTB 1111 1010 0100 1111 1111 xxxx 1xxx xxxx */ | ||
402 | /* UXTB 1111 1010 0101 1111 1111 xxxx 1xxx xxxx */ | ||
403 | DECODE_EMULATEX (0xff8ff080, 0xfa0ff080, PROBES_T32_SIGN_EXTEND, | ||
404 | REGS(0, 0, NOSPPC, 0, NOSPPC)), | ||
405 | |||
406 | |||
407 | /* ??? 1111 1010 1xxx xxxx 1111 xxxx 0x11 xxxx */ | ||
408 | DECODE_REJECT (0xff80f0b0, 0xfa80f030), | ||
409 | /* ??? 1111 1010 1x11 xxxx 1111 xxxx 0xxx xxxx */ | ||
410 | DECODE_REJECT (0xffb0f080, 0xfab0f000), | ||
411 | |||
412 | /* SADD16 1111 1010 1001 xxxx 1111 xxxx 0000 xxxx */ | ||
413 | /* SASX 1111 1010 1010 xxxx 1111 xxxx 0000 xxxx */ | ||
414 | /* SSAX 1111 1010 1110 xxxx 1111 xxxx 0000 xxxx */ | ||
415 | /* SSUB16 1111 1010 1101 xxxx 1111 xxxx 0000 xxxx */ | ||
416 | /* SADD8 1111 1010 1000 xxxx 1111 xxxx 0000 xxxx */ | ||
417 | /* SSUB8 1111 1010 1100 xxxx 1111 xxxx 0000 xxxx */ | ||
418 | |||
419 | /* QADD16 1111 1010 1001 xxxx 1111 xxxx 0001 xxxx */ | ||
420 | /* QASX 1111 1010 1010 xxxx 1111 xxxx 0001 xxxx */ | ||
421 | /* QSAX 1111 1010 1110 xxxx 1111 xxxx 0001 xxxx */ | ||
422 | /* QSUB16 1111 1010 1101 xxxx 1111 xxxx 0001 xxxx */ | ||
423 | /* QADD8 1111 1010 1000 xxxx 1111 xxxx 0001 xxxx */ | ||
424 | /* QSUB8 1111 1010 1100 xxxx 1111 xxxx 0001 xxxx */ | ||
425 | |||
426 | /* SHADD16 1111 1010 1001 xxxx 1111 xxxx 0010 xxxx */ | ||
427 | /* SHASX 1111 1010 1010 xxxx 1111 xxxx 0010 xxxx */ | ||
428 | /* SHSAX 1111 1010 1110 xxxx 1111 xxxx 0010 xxxx */ | ||
429 | /* SHSUB16 1111 1010 1101 xxxx 1111 xxxx 0010 xxxx */ | ||
430 | /* SHADD8 1111 1010 1000 xxxx 1111 xxxx 0010 xxxx */ | ||
431 | /* SHSUB8 1111 1010 1100 xxxx 1111 xxxx 0010 xxxx */ | ||
432 | |||
433 | /* UADD16 1111 1010 1001 xxxx 1111 xxxx 0100 xxxx */ | ||
434 | /* UASX 1111 1010 1010 xxxx 1111 xxxx 0100 xxxx */ | ||
435 | /* USAX 1111 1010 1110 xxxx 1111 xxxx 0100 xxxx */ | ||
436 | /* USUB16 1111 1010 1101 xxxx 1111 xxxx 0100 xxxx */ | ||
437 | /* UADD8 1111 1010 1000 xxxx 1111 xxxx 0100 xxxx */ | ||
438 | /* USUB8 1111 1010 1100 xxxx 1111 xxxx 0100 xxxx */ | ||
439 | |||
440 | /* UQADD16 1111 1010 1001 xxxx 1111 xxxx 0101 xxxx */ | ||
441 | /* UQASX 1111 1010 1010 xxxx 1111 xxxx 0101 xxxx */ | ||
442 | /* UQSAX 1111 1010 1110 xxxx 1111 xxxx 0101 xxxx */ | ||
443 | /* UQSUB16 1111 1010 1101 xxxx 1111 xxxx 0101 xxxx */ | ||
444 | /* UQADD8 1111 1010 1000 xxxx 1111 xxxx 0101 xxxx */ | ||
445 | /* UQSUB8 1111 1010 1100 xxxx 1111 xxxx 0101 xxxx */ | ||
446 | |||
447 | /* UHADD16 1111 1010 1001 xxxx 1111 xxxx 0110 xxxx */ | ||
448 | /* UHASX 1111 1010 1010 xxxx 1111 xxxx 0110 xxxx */ | ||
449 | /* UHSAX 1111 1010 1110 xxxx 1111 xxxx 0110 xxxx */ | ||
450 | /* UHSUB16 1111 1010 1101 xxxx 1111 xxxx 0110 xxxx */ | ||
451 | /* UHADD8 1111 1010 1000 xxxx 1111 xxxx 0110 xxxx */ | ||
452 | /* UHSUB8 1111 1010 1100 xxxx 1111 xxxx 0110 xxxx */ | ||
453 | DECODE_OR (0xff80f080, 0xfa80f000), | ||
454 | |||
455 | /* SXTAH 1111 1010 0000 xxxx 1111 xxxx 1xxx xxxx */ | ||
456 | /* UXTAH 1111 1010 0001 xxxx 1111 xxxx 1xxx xxxx */ | ||
457 | /* SXTAB16 1111 1010 0010 xxxx 1111 xxxx 1xxx xxxx */ | ||
458 | /* UXTAB16 1111 1010 0011 xxxx 1111 xxxx 1xxx xxxx */ | ||
459 | /* SXTAB 1111 1010 0100 xxxx 1111 xxxx 1xxx xxxx */ | ||
460 | /* UXTAB 1111 1010 0101 xxxx 1111 xxxx 1xxx xxxx */ | ||
461 | DECODE_OR (0xff80f080, 0xfa00f080), | ||
462 | |||
463 | /* QADD 1111 1010 1000 xxxx 1111 xxxx 1000 xxxx */ | ||
464 | /* QDADD 1111 1010 1000 xxxx 1111 xxxx 1001 xxxx */ | ||
465 | /* QSUB 1111 1010 1000 xxxx 1111 xxxx 1010 xxxx */ | ||
466 | /* QDSUB 1111 1010 1000 xxxx 1111 xxxx 1011 xxxx */ | ||
467 | DECODE_OR (0xfff0f0c0, 0xfa80f080), | ||
468 | |||
469 | /* SEL 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ | ||
470 | DECODE_OR (0xfff0f0f0, 0xfaa0f080), | ||
471 | |||
472 | /* LSL 1111 1010 000x xxxx 1111 xxxx 0000 xxxx */ | ||
473 | /* LSR 1111 1010 001x xxxx 1111 xxxx 0000 xxxx */ | ||
474 | /* ASR 1111 1010 010x xxxx 1111 xxxx 0000 xxxx */ | ||
475 | /* ROR 1111 1010 011x xxxx 1111 xxxx 0000 xxxx */ | ||
476 | DECODE_EMULATEX (0xff80f0f0, 0xfa00f000, PROBES_T32_MEDIA, | ||
477 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), | ||
478 | |||
479 | /* CLZ 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ | ||
480 | DECODE_OR (0xfff0f0f0, 0xfab0f080), | ||
481 | |||
482 | /* REV 1111 1010 1001 xxxx 1111 xxxx 1000 xxxx */ | ||
483 | /* REV16 1111 1010 1001 xxxx 1111 xxxx 1001 xxxx */ | ||
484 | /* RBIT 1111 1010 1001 xxxx 1111 xxxx 1010 xxxx */ | ||
485 | /* REVSH 1111 1010 1001 xxxx 1111 xxxx 1011 xxxx */ | ||
486 | DECODE_EMULATEX (0xfff0f0c0, 0xfa90f080, PROBES_T32_REVERSE, | ||
487 | REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)), | ||
488 | |||
489 | /* Other unallocated instructions... */ | ||
490 | DECODE_END | ||
491 | }; | ||
492 | |||
493 | static const union decode_item t32_table_1111_1011_0[] = { | ||
494 | /* Multiply, multiply accumulate, and absolute difference */ | ||
495 | |||
496 | /* ??? 1111 1011 0000 xxxx 1111 xxxx 0001 xxxx */ | ||
497 | DECODE_REJECT (0xfff0f0f0, 0xfb00f010), | ||
498 | /* ??? 1111 1011 0111 xxxx 1111 xxxx 0001 xxxx */ | ||
499 | DECODE_REJECT (0xfff0f0f0, 0xfb70f010), | ||
500 | |||
501 | /* SMULxy 1111 1011 0001 xxxx 1111 xxxx 00xx xxxx */ | ||
502 | DECODE_OR (0xfff0f0c0, 0xfb10f000), | ||
503 | /* MUL 1111 1011 0000 xxxx 1111 xxxx 0000 xxxx */ | ||
504 | /* SMUAD{X} 1111 1011 0010 xxxx 1111 xxxx 000x xxxx */ | ||
505 | /* SMULWy 1111 1011 0011 xxxx 1111 xxxx 000x xxxx */ | ||
506 | /* SMUSD{X} 1111 1011 0100 xxxx 1111 xxxx 000x xxxx */ | ||
507 | /* SMMUL{R} 1111 1011 0101 xxxx 1111 xxxx 000x xxxx */ | ||
508 | /* USAD8 1111 1011 0111 xxxx 1111 xxxx 0000 xxxx */ | ||
509 | DECODE_EMULATEX (0xff80f0e0, 0xfb00f000, PROBES_T32_MUL_ADD, | ||
510 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), | ||
511 | |||
512 | /* ??? 1111 1011 0111 xxxx xxxx xxxx 0001 xxxx */ | ||
513 | DECODE_REJECT (0xfff000f0, 0xfb700010), | ||
514 | |||
515 | /* SMLAxy 1111 1011 0001 xxxx xxxx xxxx 00xx xxxx */ | ||
516 | DECODE_OR (0xfff000c0, 0xfb100000), | ||
517 | /* MLA 1111 1011 0000 xxxx xxxx xxxx 0000 xxxx */ | ||
518 | /* MLS 1111 1011 0000 xxxx xxxx xxxx 0001 xxxx */ | ||
519 | /* SMLAD{X} 1111 1011 0010 xxxx xxxx xxxx 000x xxxx */ | ||
520 | /* SMLAWy 1111 1011 0011 xxxx xxxx xxxx 000x xxxx */ | ||
521 | /* SMLSD{X} 1111 1011 0100 xxxx xxxx xxxx 000x xxxx */ | ||
522 | /* SMMLA{R} 1111 1011 0101 xxxx xxxx xxxx 000x xxxx */ | ||
523 | /* SMMLS{R} 1111 1011 0110 xxxx xxxx xxxx 000x xxxx */ | ||
524 | /* USADA8 1111 1011 0111 xxxx xxxx xxxx 0000 xxxx */ | ||
525 | DECODE_EMULATEX (0xff8000c0, 0xfb000000, PROBES_T32_MUL_ADD2, | ||
526 | REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)), | ||
527 | |||
528 | /* Other unallocated instructions... */ | ||
529 | DECODE_END | ||
530 | }; | ||
531 | |||
532 | static const union decode_item t32_table_1111_1011_1[] = { | ||
533 | /* Long multiply, long multiply accumulate, and divide */ | ||
534 | |||
535 | /* UMAAL 1111 1011 1110 xxxx xxxx xxxx 0110 xxxx */ | ||
536 | DECODE_OR (0xfff000f0, 0xfbe00060), | ||
537 | /* SMLALxy 1111 1011 1100 xxxx xxxx xxxx 10xx xxxx */ | ||
538 | DECODE_OR (0xfff000c0, 0xfbc00080), | ||
539 | /* SMLALD{X} 1111 1011 1100 xxxx xxxx xxxx 110x xxxx */ | ||
540 | /* SMLSLD{X} 1111 1011 1101 xxxx xxxx xxxx 110x xxxx */ | ||
541 | DECODE_OR (0xffe000e0, 0xfbc000c0), | ||
542 | /* SMULL 1111 1011 1000 xxxx xxxx xxxx 0000 xxxx */ | ||
543 | /* UMULL 1111 1011 1010 xxxx xxxx xxxx 0000 xxxx */ | ||
544 | /* SMLAL 1111 1011 1100 xxxx xxxx xxxx 0000 xxxx */ | ||
545 | /* UMLAL 1111 1011 1110 xxxx xxxx xxxx 0000 xxxx */ | ||
546 | DECODE_EMULATEX (0xff9000f0, 0xfb800000, PROBES_T32_MUL_ADD_LONG, | ||
547 | REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)), | ||
548 | |||
549 | /* SDIV 1111 1011 1001 xxxx xxxx xxxx 1111 xxxx */ | ||
550 | /* UDIV 1111 1011 1011 xxxx xxxx xxxx 1111 xxxx */ | ||
551 | /* Other unallocated instructions... */ | ||
552 | DECODE_END | ||
553 | }; | ||
554 | |||
555 | const union decode_item probes_decode_thumb32_table[] = { | ||
556 | |||
557 | /* | ||
558 | * Load/store multiple instructions | ||
559 | * 1110 100x x0xx xxxx xxxx xxxx xxxx xxxx | ||
560 | */ | ||
561 | DECODE_TABLE (0xfe400000, 0xe8000000, t32_table_1110_100x_x0xx), | ||
562 | |||
563 | /* | ||
564 | * Load/store dual, load/store exclusive, table branch | ||
565 | * 1110 100x x1xx xxxx xxxx xxxx xxxx xxxx | ||
566 | */ | ||
567 | DECODE_TABLE (0xfe400000, 0xe8400000, t32_table_1110_100x_x1xx), | ||
568 | |||
569 | /* | ||
570 | * Data-processing (shifted register) | ||
571 | * 1110 101x xxxx xxxx xxxx xxxx xxxx xxxx | ||
572 | */ | ||
573 | DECODE_TABLE (0xfe000000, 0xea000000, t32_table_1110_101x), | ||
574 | |||
575 | /* | ||
576 | * Coprocessor instructions | ||
577 | * 1110 11xx xxxx xxxx xxxx xxxx xxxx xxxx | ||
578 | */ | ||
579 | DECODE_REJECT (0xfc000000, 0xec000000), | ||
580 | |||
581 | /* | ||
582 | * Data-processing (modified immediate) | ||
583 | * 1111 0x0x xxxx xxxx 0xxx xxxx xxxx xxxx | ||
584 | */ | ||
585 | DECODE_TABLE (0xfa008000, 0xf0000000, t32_table_1111_0x0x___0), | ||
586 | |||
587 | /* | ||
588 | * Data-processing (plain binary immediate) | ||
589 | * 1111 0x1x xxxx xxxx 0xxx xxxx xxxx xxxx | ||
590 | */ | ||
591 | DECODE_TABLE (0xfa008000, 0xf2000000, t32_table_1111_0x1x___0), | ||
592 | |||
593 | /* | ||
594 | * Branches and miscellaneous control | ||
595 | * 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx | ||
596 | */ | ||
597 | DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1), | ||
598 | |||
599 | /* | ||
600 | * Advanced SIMD element or structure load/store instructions | ||
601 | * 1111 1001 xxx0 xxxx xxxx xxxx xxxx xxxx | ||
602 | */ | ||
603 | DECODE_REJECT (0xff100000, 0xf9000000), | ||
604 | |||
605 | /* | ||
606 | * Memory hints | ||
607 | * 1111 100x x0x1 xxxx 1111 xxxx xxxx xxxx | ||
608 | */ | ||
609 | DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111), | ||
610 | |||
611 | /* | ||
612 | * Store single data item | ||
613 | * 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx | ||
614 | * Load single data items | ||
615 | * 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx | ||
616 | */ | ||
617 | DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x), | ||
618 | |||
619 | /* | ||
620 | * Data-processing (register) | ||
621 | * 1111 1010 xxxx xxxx 1111 xxxx xxxx xxxx | ||
622 | */ | ||
623 | DECODE_TABLE (0xff00f000, 0xfa00f000, t32_table_1111_1010___1111), | ||
624 | |||
625 | /* | ||
626 | * Multiply, multiply accumulate, and absolute difference | ||
627 | * 1111 1011 0xxx xxxx xxxx xxxx xxxx xxxx | ||
628 | */ | ||
629 | DECODE_TABLE (0xff800000, 0xfb000000, t32_table_1111_1011_0), | ||
630 | |||
631 | /* | ||
632 | * Long multiply, long multiply accumulate, and divide | ||
633 | * 1111 1011 1xxx xxxx xxxx xxxx xxxx xxxx | ||
634 | */ | ||
635 | DECODE_TABLE (0xff800000, 0xfb800000, t32_table_1111_1011_1), | ||
636 | |||
637 | /* | ||
638 | * Coprocessor instructions | ||
639 | * 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx | ||
640 | */ | ||
641 | DECODE_END | ||
642 | }; | ||
643 | #ifdef CONFIG_ARM_KPROBES_TEST_MODULE | ||
644 | EXPORT_SYMBOL_GPL(probes_decode_thumb32_table); | ||
645 | #endif | ||
646 | |||
647 | static const union decode_item t16_table_1011[] = { | ||
648 | /* Miscellaneous 16-bit instructions */ | ||
649 | |||
650 | /* ADD (SP plus immediate) 1011 0000 0xxx xxxx */ | ||
651 | /* SUB (SP minus immediate) 1011 0000 1xxx xxxx */ | ||
652 | DECODE_SIMULATE (0xff00, 0xb000, PROBES_T16_ADD_SP), | ||
653 | |||
654 | /* CBZ 1011 00x1 xxxx xxxx */ | ||
655 | /* CBNZ 1011 10x1 xxxx xxxx */ | ||
656 | DECODE_SIMULATE (0xf500, 0xb100, PROBES_T16_CBZ), | ||
657 | |||
658 | /* SXTH 1011 0010 00xx xxxx */ | ||
659 | /* SXTB 1011 0010 01xx xxxx */ | ||
660 | /* UXTH 1011 0010 10xx xxxx */ | ||
661 | /* UXTB 1011 0010 11xx xxxx */ | ||
662 | /* REV 1011 1010 00xx xxxx */ | ||
663 | /* REV16 1011 1010 01xx xxxx */ | ||
664 | /* ??? 1011 1010 10xx xxxx */ | ||
665 | /* REVSH 1011 1010 11xx xxxx */ | ||
666 | DECODE_REJECT (0xffc0, 0xba80), | ||
667 | DECODE_EMULATE (0xf500, 0xb000, PROBES_T16_SIGN_EXTEND), | ||
668 | |||
669 | /* PUSH 1011 010x xxxx xxxx */ | ||
670 | DECODE_CUSTOM (0xfe00, 0xb400, PROBES_T16_PUSH), | ||
671 | /* POP 1011 110x xxxx xxxx */ | ||
672 | DECODE_CUSTOM (0xfe00, 0xbc00, PROBES_T16_POP), | ||
673 | |||
674 | /* | ||
675 | * If-Then, and hints | ||
676 | * 1011 1111 xxxx xxxx | ||
677 | */ | ||
678 | |||
679 | /* YIELD 1011 1111 0001 0000 */ | ||
680 | DECODE_OR (0xffff, 0xbf10), | ||
681 | /* SEV 1011 1111 0100 0000 */ | ||
682 | DECODE_EMULATE (0xffff, 0xbf40, PROBES_T16_SEV), | ||
683 | /* NOP 1011 1111 0000 0000 */ | ||
684 | /* WFE 1011 1111 0010 0000 */ | ||
685 | /* WFI 1011 1111 0011 0000 */ | ||
686 | DECODE_SIMULATE (0xffcf, 0xbf00, PROBES_T16_WFE), | ||
687 | /* Unassigned hints 1011 1111 xxxx 0000 */ | ||
688 | DECODE_REJECT (0xff0f, 0xbf00), | ||
689 | /* IT 1011 1111 xxxx xxxx */ | ||
690 | DECODE_CUSTOM (0xff00, 0xbf00, PROBES_T16_IT), | ||
691 | |||
692 | /* SETEND 1011 0110 010x xxxx */ | ||
693 | /* CPS 1011 0110 011x xxxx */ | ||
694 | /* BKPT 1011 1110 xxxx xxxx */ | ||
695 | /* And unallocated instructions... */ | ||
696 | DECODE_END | ||
697 | }; | ||
698 | |||
699 | const union decode_item probes_decode_thumb16_table[] = { | ||
700 | |||
701 | /* | ||
702 | * Shift (immediate), add, subtract, move, and compare | ||
703 | * 00xx xxxx xxxx xxxx | ||
704 | */ | ||
705 | |||
706 | /* CMP (immediate) 0010 1xxx xxxx xxxx */ | ||
707 | DECODE_EMULATE (0xf800, 0x2800, PROBES_T16_CMP), | ||
708 | |||
709 | /* ADD (register) 0001 100x xxxx xxxx */ | ||
710 | /* SUB (register) 0001 101x xxxx xxxx */ | ||
711 | /* LSL (immediate) 0000 0xxx xxxx xxxx */ | ||
712 | /* LSR (immediate) 0000 1xxx xxxx xxxx */ | ||
713 | /* ASR (immediate) 0001 0xxx xxxx xxxx */ | ||
714 | /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */ | ||
715 | /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */ | ||
716 | /* MOV (immediate) 0010 0xxx xxxx xxxx */ | ||
717 | /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */ | ||
718 | /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */ | ||
719 | DECODE_EMULATE (0xc000, 0x0000, PROBES_T16_ADDSUB), | ||
720 | |||
721 | /* | ||
722 | * 16-bit Thumb data-processing instructions | ||
723 | * 0100 00xx xxxx xxxx | ||
724 | */ | ||
725 | |||
726 | /* TST (register) 0100 0010 00xx xxxx */ | ||
727 | DECODE_EMULATE (0xffc0, 0x4200, PROBES_T16_CMP), | ||
728 | /* CMP (register) 0100 0010 10xx xxxx */ | ||
729 | /* CMN (register) 0100 0010 11xx xxxx */ | ||
730 | DECODE_EMULATE (0xff80, 0x4280, PROBES_T16_CMP), | ||
731 | /* AND (register) 0100 0000 00xx xxxx */ | ||
732 | /* EOR (register) 0100 0000 01xx xxxx */ | ||
733 | /* LSL (register) 0100 0000 10xx xxxx */ | ||
734 | /* LSR (register) 0100 0000 11xx xxxx */ | ||
735 | /* ASR (register) 0100 0001 00xx xxxx */ | ||
736 | /* ADC (register) 0100 0001 01xx xxxx */ | ||
737 | /* SBC (register) 0100 0001 10xx xxxx */ | ||
738 | /* ROR (register) 0100 0001 11xx xxxx */ | ||
739 | /* RSB (immediate) 0100 0010 01xx xxxx */ | ||
740 | /* ORR (register) 0100 0011 00xx xxxx */ | ||
741 | /* MUL 0100 0011 00xx xxxx */ | ||
742 | /* BIC (register) 0100 0011 10xx xxxx */ | ||
743 | /* MVN (register) 0100 0011 10xx xxxx */ | ||
744 | DECODE_EMULATE (0xfc00, 0x4000, PROBES_T16_LOGICAL), | ||
745 | |||
746 | /* | ||
747 | * Special data instructions and branch and exchange | ||
748 | * 0100 01xx xxxx xxxx | ||
749 | */ | ||
750 | |||
751 | /* BLX pc 0100 0111 1111 1xxx */ | ||
752 | DECODE_REJECT (0xfff8, 0x47f8), | ||
753 | |||
754 | /* BX (register) 0100 0111 0xxx xxxx */ | ||
755 | /* BLX (register) 0100 0111 1xxx xxxx */ | ||
756 | DECODE_SIMULATE (0xff00, 0x4700, PROBES_T16_BLX), | ||
757 | |||
758 | /* ADD pc, pc 0100 0100 1111 1111 */ | ||
759 | DECODE_REJECT (0xffff, 0x44ff), | ||
760 | |||
761 | /* ADD (register) 0100 0100 xxxx xxxx */ | ||
762 | /* CMP (register) 0100 0101 xxxx xxxx */ | ||
763 | /* MOV (register) 0100 0110 xxxx xxxx */ | ||
764 | DECODE_CUSTOM (0xfc00, 0x4400, PROBES_T16_HIREGOPS), | ||
765 | |||
766 | /* | ||
767 | * Load from Literal Pool | ||
768 | * LDR (literal) 0100 1xxx xxxx xxxx | ||
769 | */ | ||
770 | DECODE_SIMULATE (0xf800, 0x4800, PROBES_T16_LDR_LIT), | ||
771 | |||
772 | /* | ||
773 | * 16-bit Thumb Load/store instructions | ||
774 | * 0101 xxxx xxxx xxxx | ||
775 | * 011x xxxx xxxx xxxx | ||
776 | * 100x xxxx xxxx xxxx | ||
777 | */ | ||
778 | |||
779 | /* STR (register) 0101 000x xxxx xxxx */ | ||
780 | /* STRH (register) 0101 001x xxxx xxxx */ | ||
781 | /* STRB (register) 0101 010x xxxx xxxx */ | ||
782 | /* LDRSB (register) 0101 011x xxxx xxxx */ | ||
783 | /* LDR (register) 0101 100x xxxx xxxx */ | ||
784 | /* LDRH (register) 0101 101x xxxx xxxx */ | ||
785 | /* LDRB (register) 0101 110x xxxx xxxx */ | ||
786 | /* LDRSH (register) 0101 111x xxxx xxxx */ | ||
787 | /* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */ | ||
788 | /* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */ | ||
789 | /* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */ | ||
790 | /* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */ | ||
791 | DECODE_EMULATE (0xc000, 0x4000, PROBES_T16_LDRHSTRH), | ||
792 | /* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */ | ||
793 | /* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */ | ||
794 | DECODE_EMULATE (0xf000, 0x8000, PROBES_T16_LDRHSTRH), | ||
795 | /* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */ | ||
796 | /* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */ | ||
797 | DECODE_SIMULATE (0xf000, 0x9000, PROBES_T16_LDRSTR), | ||
798 | |||
799 | /* | ||
800 | * Generate PC-/SP-relative address | ||
801 | * ADR (literal) 1010 0xxx xxxx xxxx | ||
802 | * ADD (SP plus immediate) 1010 1xxx xxxx xxxx | ||
803 | */ | ||
804 | DECODE_SIMULATE (0xf000, 0xa000, PROBES_T16_ADR), | ||
805 | |||
806 | /* | ||
807 | * Miscellaneous 16-bit instructions | ||
808 | * 1011 xxxx xxxx xxxx | ||
809 | */ | ||
810 | DECODE_TABLE (0xf000, 0xb000, t16_table_1011), | ||
811 | |||
812 | /* STM 1100 0xxx xxxx xxxx */ | ||
813 | /* LDM 1100 1xxx xxxx xxxx */ | ||
814 | DECODE_EMULATE (0xf000, 0xc000, PROBES_T16_LDMSTM), | ||
815 | |||
816 | /* | ||
817 | * Conditional branch, and Supervisor Call | ||
818 | */ | ||
819 | |||
820 | /* Permanently UNDEFINED 1101 1110 xxxx xxxx */ | ||
821 | /* SVC 1101 1111 xxxx xxxx */ | ||
822 | DECODE_REJECT (0xfe00, 0xde00), | ||
823 | |||
824 | /* Conditional branch 1101 xxxx xxxx xxxx */ | ||
825 | DECODE_CUSTOM (0xf000, 0xd000, PROBES_T16_BRANCH_COND), | ||
826 | |||
827 | /* | ||
828 | * Unconditional branch | ||
829 | * B 1110 0xxx xxxx xxxx | ||
830 | */ | ||
831 | DECODE_SIMULATE (0xf800, 0xe000, PROBES_T16_BRANCH), | ||
832 | |||
833 | DECODE_END | ||
834 | }; | ||
835 | #ifdef CONFIG_ARM_KPROBES_TEST_MODULE | ||
836 | EXPORT_SYMBOL_GPL(probes_decode_thumb16_table); | ||
837 | #endif | ||
838 | |||
839 | static unsigned long __kprobes thumb_check_cc(unsigned long cpsr) | ||
840 | { | ||
841 | if (unlikely(in_it_block(cpsr))) | ||
842 | return probes_condition_checks[current_cond(cpsr)](cpsr); | ||
843 | return true; | ||
844 | } | ||
845 | |||
846 | static void __kprobes thumb16_singlestep(probes_opcode_t opcode, | ||
847 | struct arch_probes_insn *asi, | ||
848 | struct pt_regs *regs) | ||
849 | { | ||
850 | regs->ARM_pc += 2; | ||
851 | asi->insn_handler(opcode, asi, regs); | ||
852 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); | ||
853 | } | ||
854 | |||
855 | static void __kprobes thumb32_singlestep(probes_opcode_t opcode, | ||
856 | struct arch_probes_insn *asi, | ||
857 | struct pt_regs *regs) | ||
858 | { | ||
859 | regs->ARM_pc += 4; | ||
860 | asi->insn_handler(opcode, asi, regs); | ||
861 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); | ||
862 | } | ||
863 | |||
864 | enum probes_insn __kprobes | ||
865 | thumb16_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, | ||
866 | bool emulate, const union decode_action *actions) | ||
867 | { | ||
868 | asi->insn_singlestep = thumb16_singlestep; | ||
869 | asi->insn_check_cc = thumb_check_cc; | ||
870 | return probes_decode_insn(insn, asi, probes_decode_thumb16_table, true, | ||
871 | emulate, actions); | ||
872 | } | ||
873 | |||
874 | enum probes_insn __kprobes | ||
875 | thumb32_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, | ||
876 | bool emulate, const union decode_action *actions) | ||
877 | { | ||
878 | asi->insn_singlestep = thumb32_singlestep; | ||
879 | asi->insn_check_cc = thumb_check_cc; | ||
880 | return probes_decode_insn(insn, asi, probes_decode_thumb32_table, true, | ||
881 | emulate, actions); | ||
882 | } | ||