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-rw-r--r--arch/arm/kernel/perf_event.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 3875d99cc40f..9e70f2053f9a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -332,7 +332,8 @@ armpmu_reserve_hardware(void)
332 332
333 for (i = 0; i < pmu_irqs->num_irqs; ++i) { 333 for (i = 0; i < pmu_irqs->num_irqs; ++i) {
334 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, 334 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
335 IRQF_DISABLED, "armpmu", NULL); 335 IRQF_DISABLED | IRQF_NOBALANCING,
336 "armpmu", NULL);
336 if (err) { 337 if (err) {
337 pr_warning("unable to request IRQ%d for ARM " 338 pr_warning("unable to request IRQ%d for ARM "
338 "perf counters\n", pmu_irqs->irqs[i]); 339 "perf counters\n", pmu_irqs->irqs[i]);
@@ -1624,7 +1625,7 @@ enum armv7_counters {
1624/* 1625/*
1625 * EVTSEL: Event selection reg 1626 * EVTSEL: Event selection reg
1626 */ 1627 */
1627#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */ 1628#define ARMV7_EVTSEL_MASK 0xff /* Mask for writable bits */
1628 1629
1629/* 1630/*
1630 * SELECT: Counter selection reg 1631 * SELECT: Counter selection reg