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-rw-r--r--arch/arm/kernel/iwmmxt.S16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index 2452dd1bef53..a5599cfc43cb 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -18,6 +18,7 @@
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21#include <asm/assembler.h>
21 22
22#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) 23#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
23#define PJ4(code...) code 24#define PJ4(code...) code
@@ -65,17 +66,18 @@
65 * r9 = ret_from_exception 66 * r9 = ret_from_exception
66 * lr = undefined instr exit 67 * lr = undefined instr exit
67 * 68 *
68 * called from prefetch exception handler with interrupts disabled 69 * called from prefetch exception handler with interrupts enabled
69 */ 70 */
70 71
71ENTRY(iwmmxt_task_enable) 72ENTRY(iwmmxt_task_enable)
73 inc_preempt_count r10, r3
72 74
73 XSC(mrc p15, 0, r2, c15, c1, 0) 75 XSC(mrc p15, 0, r2, c15, c1, 0)
74 PJ4(mrc p15, 0, r2, c1, c0, 2) 76 PJ4(mrc p15, 0, r2, c1, c0, 2)
75 @ CP0 and CP1 accessible? 77 @ CP0 and CP1 accessible?
76 XSC(tst r2, #0x3) 78 XSC(tst r2, #0x3)
77 PJ4(tst r2, #0xf) 79 PJ4(tst r2, #0xf)
78 movne pc, lr @ if so no business here 80 bne 4f @ if so no business here
79 @ enable access to CP0 and CP1 81 @ enable access to CP0 and CP1
80 XSC(orr r2, r2, #0x3) 82 XSC(orr r2, r2, #0x3)
81 XSC(mcr p15, 0, r2, c15, c1, 0) 83 XSC(mcr p15, 0, r2, c15, c1, 0)
@@ -136,7 +138,7 @@ concan_dump:
136 wstrd wR15, [r1, #MMX_WR15] 138 wstrd wR15, [r1, #MMX_WR15]
137 139
1382: teq r0, #0 @ anything to load? 1402: teq r0, #0 @ anything to load?
139 moveq pc, lr 141 beq 3f
140 142
141concan_load: 143concan_load:
142 144
@@ -169,8 +171,14 @@ concan_load:
169 @ clear CUP/MUP (only if r1 != 0) 171 @ clear CUP/MUP (only if r1 != 0)
170 teq r1, #0 172 teq r1, #0
171 mov r2, #0 173 mov r2, #0
172 moveq pc, lr 174 beq 3f
173 tmcr wCon, r2 175 tmcr wCon, r2
176
1773:
178#ifdef CONFIG_PREEMPT_COUNT
179 get_thread_info r10
180#endif
1814: dec_preempt_count r10, r3
174 mov pc, lr 182 mov pc, lr
175 183
176/* 184/*